CN103198803B - The driving control unit of a kind of display base plate, drive circuit and driving control method - Google Patents

Abstract

The invention discloses the driving control unit of a kind of display base plate, drive circuit and drive control method, including time schedule controller and delay controller, described time schedule controller is to delay controller transmission timing control signal, the impedance of the delay controller drive signal line for being connected according to the pixel of described display base plate, regulate described timing control signal, in the range of making the actual charging duration of pixel be in default duration.The present invention is according to the timing control signal of the position change pixel of pixel on liquid crystal panel, the timing control signal making diverse location pixel is different, control signal with different timings, compensate the charging interval error caused due to holding wire delay, it is ensured that the pixel charging effect concordance of liquid crystal panel diverse location.

Description

A driving control unit, a driving circuit and a driving control method of a display substrate

technical field

The invention belongs to the field of display technology, in particular to a drive control unit, a drive circuit and a drive control method of a display substrate.

Background technique

The traditional liquid crystal panel driving architecture includes a source driver and a gate driver. When the source driver and the gate driver drive pixels at different positions on the panel, the timing control signals used are consistent, that is, the distance between the source driver and the gate driver The near point and far point pixels use the same timing control signal. When the gate driver drives the pixels of each row, the time for loading the deflection voltage on the data line is fixed, and the pixels at different positions in the same row of pixels are turned on. The time is fixed.

Due to the limitation of the process characteristics of the liquid crystal panel, there is a certain impedance between the signal lines connecting the near point and the far point, which causes the gate driver and the source driver to load the same signal. The performance of the pixels is inconsistent, so that when the same timing control signal is used for the near point and the far point, the actual charging time of the pixels is not the same, resulting in different charging effects of the pixels at different positions on the panel, and the image consistency is affected. In large-sized panels, this problem is more pronounced due to the higher impedance of signal lines; and this problem exists not only in liquid crystal panels, but also in other types of display substrates using thin film transistor arrays.

Contents of the invention

In view of the problems existing in the prior art, the purpose of the present invention is to provide a display substrate drive control unit, drive circuit and drive control method that adjusts the timing control signal of each pixel on the panel according to the position of the pixel to improve picture consistency.

In order to achieve the above object, the drive control unit of the display substrate of the present invention includes a timing controller and a delay controller, wherein:

The timing controller is used to send a timing control signal to the delay controller;

The delay controller is used to adjust the timing control signal according to the impedance of the driving signal line connected to the pixels of the display substrate, so that the actual charging time of the pixels is within a preset time range.

Further, the delay controller is used to adjust the timing control signal according to the impedance of the driving signal line connected to the pixel point of the display substrate, which refers to:

The delay controller adjusts the timing control signal according to the length and resistivity of the driving signal line connected between the pixel point and the pixel display driver.

Further, the delay controller is used to adjust the timing control signal in the following manner:

Taking the timing control signal of the first pixel point on the display panel as a reference, according to the impedance of the driving signal line connected between the second pixel point on the display panel and the pixel display driver and the first pixel point and the second pixel point on the display panel The difference in impedance of the driving signal lines connected between the pixel display drivers is used to adjust the delay time of the timing control signal of the second pixel relative to the timing control signal of the first pixel.

Further, the first pixel point is the pixel point on the display panel that is farthest from the pixel display driver, called the pixel far point; the second pixel point is any pixel on the display panel except the pixel far point point.

Further, the delay controller is used to adjust the timing control signal in the following manner:

Taking the timing control signal of the pixel far point as a reference, first adjust the delay time of the timing control signal of the second pixel point in the same row as the pixel far point, and then adjust the delay time of the second pixel point in the same column as the pixel far point Timing control signal delay time.

Further, the delay controller is used to adjust the timing control signal in the following manner:

Taking the timing control signal of the first pixel on the display panel as a reference, the timing control signal is adjusted so that the delay time of the timing control signal of the second pixel is proportional to the magnitude of the impedance difference.

Further, the pixel display driver refers to a gate driver or a source driver.

Further, the preset duration range includes a preset duration value.

The driving circuit of the display substrate of the present invention includes the above-mentioned driving control unit.

In the drive control method of the display substrate of the present invention, the drive device of the display substrate includes a timing controller and a delay controller; the method includes:

making the timing controller send a timing control signal to the delay controller;

The delay controller is configured to adjust the timing control signal according to the impedance of the driving signal line connected to the pixels of the display substrate, so that the actual charging time of the pixels is within a preset time range.

Further, the delay controller adjusts the timing control signal, including:

Taking the timing control signal of the first pixel point on the display panel as a reference, according to the impedance of the driving signal line connected between the second pixel point on the display panel and the pixel display driver and the first pixel point and the second pixel point on the display panel The difference in impedance of the driving signal lines connected between the pixel display drivers is used to adjust the delay time of the timing control signal of the second pixel relative to the timing control signal of the first pixel.

Further, the timing control signal is a gate driver control signal, and the gate driver control signal controls the turn-on time of the thin film transistor of the pixel, and the delay controller adjusts the second TFT by adjusting the turn-on time of the thin film transistor. The delay time of the timing control signal of the pixel relative to the timing control signal of the first pixel; or,

The timing control signal is a source driver control signal, the source driver control signal controls the deflection voltage loading time of the pixel point, and the delay controller adjusts the second pixel point by adjusting the deflection voltage loading time The delay time of the timing control signal relative to the first pixel timing control signal.

Further, the timing control signal is a pulse signal.

Further, the step of adjusting the timing control signal by the delay controller is: taking the timing control signal of the first pixel point on the display substrate as a reference, according to the second pixel point on the display substrate and the pixel display driver The difference between the impedance of the driving signal line connected between the first pixel point and the impedance of the driving signal line connected between the pixel display driver is used to adjust the timing control signal of the second pixel point relative to the pixel display driver. The delay time of the first pixel timing control signal.

Further, the first pixel point is the pixel point on the display panel that is farthest from the pixel display driver, called the pixel far point; the second pixel point is any pixel on the display panel except the pixel far point point.

Further, the delay controller is used to adjust the timing control signal in the following manner:

Based on the timing control signal of the first pixel, first adjust the delay time of the timing control signal of the second pixel in the same row as the first pixel; and/or, based on the timing control of the first pixel The signal is used as a reference to adjust the delay time of the timing control signal of the second pixel point in the same column as the first pixel point.

Further, the delay controller is used to adjust the timing control signal in the following manner:

Taking the timing control signal of the first pixel on the display panel as a reference, the timing control signal is adjusted so that the delay time of the timing control signal of the second pixel is proportional to the magnitude of the impedance difference.

The present invention changes the timing control signal of the pixel according to the position of the pixel on the liquid crystal panel, so that the timing control signals of pixels at different positions are different, and compensates the charging time error caused by the delay of the signal line with different timing control signals to ensure that the liquid crystal The charging effect of pixels in different positions of the panel is consistent.

Description of drawings

FIG. 1 is a schematic structural diagram of an existing liquid crystal panel;

2 is a schematic diagram of the input and output of the gate driver control signal and the source driver control signal of the delay controller provided by the embodiment of the present invention;

FIG. 3 is a comparison diagram of the delay time of the gate driver signal lines at points A, B, and C on the liquid crystal panel in FIG. 1;

FIG. 4 is a comparison diagram of the delay time of the source driver signal lines at points A, D, and E on the liquid crystal panel in FIG. 1;

Figure 5 is a comparison chart of the actual charging time of points A, B, and C after being adjusted by the delay controller;

Fig. 6 is a comparison chart of the actual charging time of points A, D, and E after being adjusted by the delay controller.

detailed description

The specific implementation manners of the present invention will be further described in detail below in conjunction with the accompanying drawings and embodiments. The following examples serve to illustrate the invention, but do not limit the scope of the invention.

This implementation mode provides an example of a drive control unit for a display substrate, where the drive control unit includes a timing controller and a delay controller, wherein:

The timing controller is used to send a timing control signal to the delay controller;

The delay controller is used to: adjust the timing control signal according to the impedance of the driving signal line connected to the pixels of the display substrate, so that the actual charging time of the pixels is within a preset time range.

Due to the difference in the arrangement position of the pixels on the display substrate, the length of the driving signal line between it and the pixel display driver is different, or the resistivity difference caused by factors such as metal materials and pattern design makes different pixels connected. The impedance of the driving signal line is different, so the delay time of the charging signal obtained by different pixels is different, which eventually leads to uneven display effect. In this embodiment, the delay controller adjusts the timing control signal according to the impedance of the driving signal line connected to the pixels of the display substrate, so that the actual charging time of each pixel tends to be consistent. , that is, they are all a preset charging duration value, or have an acceptable error range from the preset charging duration value, that is, they are within the preset duration range.

As a result, different timing control signals are used to compensate for differences in charging time, thereby ensuring the consistency of pixel charging effects at different positions on the display substrate.

This embodiment also provides a driving circuit for a display substrate, including the above-mentioned driving control unit.

It should be noted that the embodiments of the present invention are not limited to liquid crystal display panels, and can also be applied to other types of display substrates using thin film transistor array substrates; the pixel display driver can be a gate driver or a source driver, When the impedance difference on the gate line is large, only compensating the delay of the gate drive signal can solve the problem of uneven pixel display effect caused by the difference in charging delay; similarly, when the impedance difference on the data line When it is larger, only the delay of the source drive signal can be compensated, and the problem of uneven pixel display effect caused by the difference in charging delay can also be solved; of course, the delay of both the gate driver and the source drive signal can be compensated, which can To better solve this problem, and the order of compensation for each pixel, the selection of the pixels to be compensated (full compensation or partial compensation, and which pixels to compensate) are not limited, and all the methods covered can be To solve the above-mentioned technical problems, the technical solutions covered by them are all within the protection scope of the claims of the present invention.

Below, the preferred embodiments of the various situations that the present invention is applied to are enumerated, wherein, the liquid crystal panel is preferred as the preferred embodiment of the display substrate; the source driver 1 and the gate driver 2 are selected as the preferred implementation of the pixel display driver In addition, the preferred pixel compensation sequence and execution steps are listed for introduction, and the embodiments of the present invention are not limited to these sequences and steps.

As shown in Figure 1, it is a schematic structural diagram of an existing liquid crystal panel; the liquid crystal panel includes a source driver 1, a gate driver 2 and a plurality of pixels, and the control signal output by the gate driver 2 controls the thin film transistor of each pixel Turn-on time; the control signal output by the source driver 1 controls the deflection voltage loading time of each pixel point; by controlling the timing of the control signal output by the source driver 1 and the control signal output by the gate driver 2 (for example, the turn-on of the pixel point time, or the overlap time between the turn-on time of the pixel and the deflection voltage loading time of the corresponding pixel), the pixel can be charged. Without considering the impedance of the signal lines on the liquid crystal panel, when the same control signal is loaded on the gate driver 2 and the source driver 1, the charging time of all pixels on the liquid crystal panel is the same, and the charging effect is consistent. However, in practice, limited by the process of the liquid crystal panel, there is a certain impedance between the signal lines connecting the same row and the same column of pixels. If the same control signal is applied to the gate driver 2 and the source driver 1, it will cause The charging effects of pixels at different positions on the panel are different, and the consistency of the picture is affected. In a large-sized panel, this problem will be more obvious due to the higher impedance of the signal line. For example: as shown in Figure 1, for the three pixel points A, B, and C in the same row on the liquid crystal panel, due to the delay of the control signal of the gate driver 2 on the glass substrate trace, the turn-on time of the thin film transistor at each point is different , as shown in Figure 3, that is, t1>t2>t3, if the control signal of the source driver 1 remains unchanged, the actual charging time of A, B, and C will be different, resulting in different charging degrees of the pixels at the three positions. Similarly, for the three pixel points A, D, and E in the same column on the liquid crystal panel, due to the delay of the control signal of the source driver 1 on the glass substrate trace, the loading time of the deflection voltage at the three points A, D, and E is different. As shown in Figure 4, that is, t4>t5>t6, if the control signal of the gate driver 2 remains unchanged, the actual charging time of the three points A, D, and E will be different, resulting in different charging degrees of the pixels at the three positions.

As shown in Figure 2, the gate control signal and source control signal are signals sent by the original timing controller, and the gate control signal ' and source control signal' are signals adjusted by the delay controller. Each pulse of the gate control signal corresponds to the charging of a row of pixels, and the low level is the time when the gate is turned on. The delay controller adjusts the time of the low level to change the gate turn-on time of pixels in different rows. Each pulse of the source control signal corresponds to the loading time of the pixel deflection voltage, and the delay controller advances or delays the pulse signal to control when the pixel deflection voltage is loaded to both ends of the liquid crystal.

Taking the gate control signal as an example, the original gate control signal enters the delay controller, divides it into a delay unit signal with a small pulse width, and sets the delay unit signal that needs to be superimposed for each row through the internal register The number of timing signals can be superimposed through the internal timing signals to achieve the purpose of separately controlling the timing signals of different rows. Similarly, the delay control principle of the source control signal can be obtained. After the signal is adjusted by the delay controller, as shown in Figures 5 and 6, the actual charging time of the three points A, B, and C and the three points A, D, and E are the same.

Example 1

As shown in Figure 1, if the scanning order of the gate lines and data lines on the LCD panel is from left to right and from top to bottom, the pixel point F in the last row and column on the LCD panel is the same as the pixel point F in the first row on the LCD panel. The charging time difference of the pixel point A in the row and the first column is the largest, therefore, preferably, the delay controller is based on the timing control signal of the pixel farthest point F away from the source driver and the gate driver on the liquid crystal panel, To adjust, the preferred adjustment method is as follows:

According to the difference between the impedance of the driving signal line connected between the second pixel point on the display substrate and the pixel display driver and the impedance of the driving signal line connected between the first pixel point and the pixel display driver The value is adjusted according to the difference between the impedance of the driving signal line connected between the pixel far point F and the source driver and the impedance of the driving signal line connected between the pixel point of the same row and the source driver. The delay time of the timing control signal of the pixel point, the impedance difference between the pixel point E and the pixel far point F is the largest, it is necessary to adjust the delay time of the timing control signal of the column where the pixel point E is located, so that the timing control signal of the column of the pixel point E is The timing control signal is output later than the column where the pixel far point F is located, so as to compensate the delay between the pixel points E and F due to the control signal of the gate driver on the glass substrate wiring. The impedance difference between the pixel point E and the pixel point F between the pixel points E and F is smaller than the impedance difference value between the pixel point E and the pixel point F, so the required delay compensation is relatively small, and the delay of the signal needs to be controlled according to the timing The time and the distance between the pixel far point F and the impedance difference between other pixels in the same row are adjusted in a proportional relationship;

Then adjust the delay time of the timing control signal of the pixel points in the same column as the pixel far point F according to the impedance difference between the pixel far point F and the pixel points in the same column, and the impedance difference between the pixel point C and the pixel far point F is the largest , it is necessary to adjust the delay time of the timing control signal of the row where the pixel point C is located, so that the timing control signal of the row where the pixel point C is located is later than the timing control signal output of the row where the pixel point F is located, so as to compensate for the difference between the pixel point C and F due to The source driver controls the delay of the signal on the traces on the glass substrate. The impedance difference between the pixel point C and F and the pixel point F is smaller than the impedance difference between the pixel point C and the pixel point F, so the required delay compensation is relatively small, and the delay time of the signal needs to be controlled according to the timing It is adjusted in direct proportion to the impedance difference between the pixel far point F and other pixel points in the same row. Finally, the charging time of all pixels is basically consistent with the charging time of the pixel far point F, and the adjustment is completed;

It should be noted that the above-mentioned adjustment method is only a preferred embodiment, and the embodiments of the present invention are not limited to this adjustment method. For example, it is not limited to only using the timing control signal of point F as a reference for adjustment, and other adjustment methods can also be selected. Adjust the pixels of the panel, as long as the charging time of all or most of the pixels in the panel is adjusted to be the same or basically the same; it is not limited to adjusting all the pixels, as long as it can achieve acceptable The consistency effect is sufficient, and the specific degree of consistency can be controlled by those skilled in the art according to needs; since there are many scanning methods, not limited to top-to-bottom, left-to-right, this embodiment is not limited to The pixel in the upper left corner is compared with the pixel in the lower right corner. As long as there are two pixels with different charging times caused by the trace impedance of the gate line or data line and the sequence of the scanning sequence, they can be compared. Thereby, the charging time is adjusted, and finally the purpose of adjusting the charging time of the pixel points of the panel is realized, thereby improving the consistency of the display and improving the display effect.

The following embodiments are the cases where different adjustment sequences are selected and different pixel points are selected as reference points for adjustment.

Example 2

As shown in Figure 1, the charging time difference between the pixel point F in the last row and the last column on the LCD panel and the pixel point A in the first row and the first column on the LCD panel is the largest, and the delay controller is based on the distance from the source on the LCD panel The timing control signal of the farthest pixel point F of the driver and the gate driver is used as a reference, and the timing control of the pixels in the same column as the pixel far point F is adjusted according to the impedance difference between the pixel point F and the pixels in the same column The delay time of the signal, the impedance difference between the pixel point C and the pixel far point F is the largest, it is necessary to adjust the delay time of the timing control signal of the row where the pixel point C is located, so that the timing control signal of the row where the pixel point C is located is later than the pixel point F The timing control signal of the row is output, so as to compensate the delay between the pixel points C and F due to the source driver control signal on the glass substrate wiring. The difference in impedance between pixels C and F and pixel F is smaller than the difference in impedance between pixel C and pixel F, so the required delay compensation is relatively small, and it needs to be controlled according to the gate driver control signal The delay time of the pixel is adjusted in direct proportion to the impedance difference between the pixel far point F and other pixel points in the same row. Then adjust the delay time of the timing control signal of the pixel point in the same row as the pixel point F according to the difference in impedance between the pixel point F and the pixel point in the same row, and the difference in impedance between the pixel point E and the pixel point F is the largest , it is necessary to adjust the delay time of the timing control signal of the column where the pixel point E is located, so that the timing control signal of the column where the pixel point E is located is later than the output of the timing driver control signal of the column where the pixel point F is located, thereby compensating the distance between the pixel point E and F Delay due to gate driver control signals on glass substrate traces. The difference in impedance between pixels E and F between the pixel point and pixel point F is smaller than the difference in impedance between pixel point E and pixel point F, so the required delay compensation is relatively small, and the delay of the signal needs to be controlled according to the timing The time is adjusted in direct proportion to the difference in impedance between the far point of the pixel and other pixels in the same row. Finally, adjust until the charging time of all pixels is basically consistent with the charging time of the pixel far point F, and the adjustment is completed.

Example 3

The delay controller adjusts the timing control signal based on the timing control signal of the pixel point C on the same row of the liquid crystal panel farthest from the gate driver, and according to the impedance difference between the pixel point C and the pixel point A and B of the same row The value adjusts the delay time of the timing control signal of the pixel point in the same row as the pixel point farthest from the gate driver in each row. The difference in impedance between pixel point A and pixel point C is the largest, and the timing of the column where pixel point A is located needs to be adjusted. The delay time of the control signal makes the output of the timing control signal of the column where the pixel point A is located later than the timing control signal of the column where the pixel point C is located, so as to compensate for the fact that the control signal of the gate driver between the pixel points A and C is on the glass substrate trace Delay. The difference in impedance between pixel A and pixel C and pixel C is smaller than the difference in impedance between pixel A and pixel C, so the required delay compensation is relatively small, and the delay of the signal needs to be controlled according to the timing The time is adjusted in direct proportion to the magnitude of the impedance difference between the pixel point C and other pixel points in the same row. Similarly, other lines on the LCD panel are also adjusted according to the above steps. Then adjust the delay time of the timing control signal according to the impedance difference between the last line on the LCD panel and other lines. For example, the impedance difference between the last line of the LCD panel and the first line on the LCD panel is the largest, and the timing of the first line needs to be adjusted. The control signal is output later than the timing control signal of the last row, so as to compensate the delay between the first row and the last row due to the source driver control signal on the glass substrate trace. The impedance difference between the first row and the last row and the last row is smaller than the impedance difference between the first row and the last row, so the delay compensation required is relatively small, and the delay time of the signal and the liquid crystal need to be controlled according to the timing The impedance difference between the last line on the panel and other lines is proportional to the adjustment. Finally, adjust until the charging time of all pixels on the liquid crystal panel is basically the same, then the adjustment is completed.

Example 4

The delay controller adjusts the timing control signal based on the timing control signal of the pixel point E farthest from the source driver in the same column on the liquid crystal panel, and according to the impedance difference between the pixel point E and the pixel points A and D in the same column The value adjusts the delay time of the timing control signal of the pixel point in the same column as the pixel point farthest from the source driver in each column. The impedance difference between pixel point A and pixel point E is the largest, and the timing of the row where pixel point A is located needs to be adjusted. The delay time of the control signal makes the output of the timing control signal of the row where the pixel point A is located later than the timing control signal of the row of the pixel point E, so as to compensate the source driver control signal between the pixel points A and E on the glass substrate trace Delay. The difference between the pixel point between pixel point A and pixel point E, and the impedance difference between pixel point E is smaller than the difference value between pixel point A and pixel point E, so the required delay compensation is relatively small, and the signal needs to be controlled according to the timing The delay time of the pixel point E is adjusted in direct proportion to the difference in impedance between the pixel point E and other pixel points in the same row. Similarly, other columns on the LCD panel are also adjusted according to the above steps. Then adjust the delay time of the timing control signal according to the impedance difference between the last column on the LCD panel and other columns. The timing control signal is output later than the timing control signal of the last column, so as to compensate for the delay between the first column and the last column due to the gate driver control signal on the glass substrate routing. For the column between the first column and the last column, the difference between the impedance of the last column and the last column is smaller than the difference between the impedance of the first column and the last column, so the delay compensation required is relatively small, and it needs to be controlled according to the source driver. Signal The delay time of the LCD panel is adjusted in proportion to the impedance difference between the last column and other columns. Finally, adjust until the charging time of all pixels on the liquid crystal panel is basically the same, then the adjustment is completed.

Claims (9)

1. A driving control unit of a display substrate, comprising a timing controller and a delay controller, wherein:

the time sequence controller is used for sending a time sequence control signal to the time delay controller;

the time delay controller is used for adjusting the time sequence control signal according to the impedance of a driving signal line connected with a pixel point of the display substrate, so that the actual charging time of the pixel point is in a preset time range;

the delay controller is configured to adjust the timing control signal according to impedance of a driving signal line connected to a pixel of the display substrate, where the adjusting is performed by:

the time delay controller is used for adjusting the time sequence control signal according to the following modes: for a first pixel point and a second pixel point which are connected to the same driving signal line, taking a time sequence control signal of the first pixel point on a display panel as a reference, and adjusting the delay time of the time sequence control signal of the second pixel point relative to the time sequence control signal of the first pixel point according to the difference value of the impedance of the driving signal line between a second pixel point on the display panel and a pixel display driver and the impedance of the driving signal line between the first pixel point and the pixel display driver so as to enable the actual charging time of the first pixel point to be consistent with the actual charging time of the second pixel point;

the first pixel point is a pixel point which is farthest away from the pixel display driver on the display panel and is called a pixel far point; the second pixel point is any pixel point on the display panel except the pixel far point;

wherein,

the time delay controller is used for adjusting the time sequence control signal according to the following modes:

and taking the time sequence control signal of the pixel far point as a reference, firstly adjusting the delay time of the time sequence control signal of the second pixel point on the same row as the pixel far point, and then adjusting the delay time of the time sequence control signal of the second pixel point on the same column as the pixel far point.

2. The drive control unit of claim 1,

the time delay controller is used for adjusting the time sequence control signal according to the following modes:

and taking the time sequence control signal of the first pixel point on the display panel as a reference, and adjusting the time sequence control signal to enable the delay time of the time sequence control signal of the second pixel point to be in direct proportion to the difference value of the impedance.

3. The drive control unit of claim 1,

the pixel display driver refers to a gate driver or a source driver.

4. The drive control unit of claim 1, wherein the predetermined time period range includes a predetermined time period value.

5. A drive circuit of a display substrate comprising the drive control unit according to any one of claims 1 to 4.

6. A drive control method of a display substrate comprises a time schedule controller and a time delay controller; characterized in that the method comprises:

enabling the time sequence controller to send a time sequence control signal to the time delay controller;

enabling the time delay controller to adjust the time sequence control signal according to the impedance of a driving signal line connected with a pixel point of the display substrate, and enabling the actual charging time of the pixel point to be within a preset time range;

the delay controller adjusts the timing control signal, including:

taking a time sequence control signal of a first pixel point on a display panel as a reference, for the first pixel point and a second pixel point which are connected to the same driving signal line, adjusting the delay time of the time sequence control signal of the second pixel point relative to the time sequence control signal of the first pixel point according to the difference value of the impedance of the driving signal line between the second pixel point on the display panel and a pixel display driver and the impedance of the driving signal line between the first pixel point and the pixel display driver, so that the actual charging time of the first pixel point is consistent with the actual charging time of the second pixel point;

the first pixel point is a pixel point which is farthest away from the pixel display driver on the display panel and is called a pixel far point; the second pixel point is any pixel point on the display panel except the pixel far point;

wherein the delay controller is configured to adjust the timing control signal in the following manner:

taking the time sequence control signal of the first pixel point as a reference, firstly adjusting the delay time of the time sequence control signal of a second pixel point in the same line with the first pixel point; and adjusting the delay time of the time sequence control signal of a second pixel point in the same row with the first pixel point by taking the time sequence control signal of the first pixel point as a reference.

7. The drive control method according to claim 6,

the time sequence control signal is a gate driver control signal, the gate driver control signal controls the on time of a thin film transistor of a pixel point, and the delay controller adjusts the delay time of the time sequence control signal of the second pixel point relative to the time sequence control signal of the first pixel point by adjusting the on time of the thin film transistor; or,

the time sequence control signal is a source driver control signal, the source driver control signal controls the deflection voltage loading time of the pixel point, and the delay controller adjusts the delay time of the time sequence control signal of the second pixel point relative to the time sequence control signal of the first pixel point by adjusting the deflection voltage loading time.

8. The drive control method according to claim 6, wherein the timing control signal is a pulse signal.

9. The drive control method according to claim 6,

the time delay controller is used for adjusting the time sequence control signal according to the following modes:

and taking the time sequence control signal of the first pixel point on the display panel as a reference, and adjusting the time sequence control signal to enable the delay time of the time sequence control signal of the second pixel point to be in direct proportion to the difference value of the impedance.