CN102931347A - Resistive random access memory and preparation method thereof - Google Patents

Abstract

The invention discloses a resistive variable memory and a preparation method thereof, and relates to the technical fields of microelectronics and memory. The structure of the resistive memory proposed by the present invention includes: a substrate; a lower electrode formed on the substrate; a first functional layer thin film formed on the lower electrode; an intermediate electrode formed on the first functional layer thin film; The second functional layer thin film formed on the middle electrode; and the upper electrode formed on the second functional layer thin film. The resistive variable memory proposed by the present invention can effectively suppress the read crosstalk problem in the cross array of the prior art resistive variable memory, so that this new type of resistive variable memory is beneficial to the integration of the cross array structure. In addition, the resistive variable memory proposed by the present invention has the advantages of simple structure and easy integration, which is beneficial to the wide popularization and application of the present invention.

Description

A kind of resistive memory and its preparation method

technical field

The invention relates to the technical field of microelectronics and memory, in particular to a resistive variable memory and a preparation method thereof.

Background technique

Non-volatile memory is a type of memory that is widely used and generally recognized at present. Its biggest advantage is that the stored data can still be kept for a long time when there is no power supply. With the increasing popularity of portable personal devices such as mobile phones, MP3, MP4 and notebook computers, non-volatile memory plays an increasingly important role in the semiconductor industry. Due to the disadvantages of the current mainstream non-volatile memory Flash in the process of reducing the size of semiconductor devices, such as large operating voltage, slow operating speed, insufficient durability, and insufficient memory time, this largely limits its market and Due to the wide application in high-tech fields, the development of new non-volatile memory with better performance has become a current research hotspot.

The newly developed non-volatile memory includes ferroelectric memory (FeRAM), magnetic memory (MRAM), phase change memory (PRAM) and resistive change memory (RRAM). Among these memories, RRAM is considered to be a potential candidate for next-generation memory. Resistive variable memory is based on the basic working principle that the resistance of the thin film material can be reversibly switched between the high resistance state (HRS) and the low resistance state (LRS) under the action of an applied voltage, and it is used as a memory method. RRAM has the characteristics of simple device structure, low power consumption, fast reading and writing speed, low manufacturing cost, high storage density and good scalability.

Since the resistive memory has a small cell area, the cross-array structure is considered to be promising for the integration of the resistive memory. However, interleaved arrays currently suffer from severe read crosstalk problems. As shown in Figure 1, in the simplest 2×2 cross-array structure, if there is a memory cell A in a high-impedance state and the other three memory cells B, C, and D are in a low-impedance state, when reading the memory cell In the state of A, the current will form a leakage channel along the three memory cells in the low-resistance state, as shown by the dotted line in Figure 1, so that the read resistance value is not the real resistance value of memory cell A, that is, the so-called read Crosstalk problem. When the array m×n (m, n>2) becomes very large, the leakage channels will increase, and the misreading phenomenon will be more serious. It can be seen that the integration using the traditional 1R structure is greatly restricted.

Contents of the invention

(1) Technical problems to be solved

In view of this, the main purpose of the present invention is to provide a resistive memory and its preparation method to solve the problem of read crosstalk of 1R structure in interleaved array integration.

(2) Technical solution

In order to solve the above technical problems, the present invention provides a resistive variable memory, comprising: a substrate 100; a lower electrode 101 formed on the substrate 100; a first functional layer film 102 formed on the lower electrode 101; The middle electrode 103 on the first functional layer film 102 ; the second functional layer film 104 formed on the middle electrode 103 ; and the upper electrode 105 formed on the second functional layer film 104 .

In order to solve the above technical problems, the present invention provides a method for preparing a resistive variable memory, comprising: providing a substrate 100; forming a lower electrode 101 on the substrate 100; forming a first functional layer film 102 on the lower electrode 101; An intermediate electrode 103 is formed on the first functional layer film 102 ; a second functional layer film 104 is formed on the intermediate electrode 103 ; and an upper electrode 105 is formed on the second functional layer film 104 .

(3) Beneficial effects

As can be seen from the foregoing technical solutions, the present invention has the following beneficial effects:

1. The resistive memory provided by the present invention and its manufacturing method, since the information resistance of the resistive memory stored in the present invention to store data "1" and data "0" all exhibit high resistance values, when reading data in the cross array , the current can only flow through the memory device from one direction, so that the leakage channel shown by the dotted line in Figure 1 is cut off, thereby effectively suppressing the read crosstalk problem in the integration of the cross-array structure, making this new type of resistive memory. Applied to the cross array structure, the storage density of the memory is improved.

2. The resistive memory and the manufacturing method thereof provided by the present invention have the advantages of simple structure and easy integration, which are beneficial to the wide popularization and application of the present invention.

Description of drawings

FIG. 1 is a schematic diagram of the read crosstalk problem in a resistive variable memory interleaved array in the prior art;

2 is a schematic diagram of the basic structure of the resistive memory provided by the present invention;

Fig. 3 is a flowchart of a method for manufacturing a resistive memory provided by the present invention;

FIG. 4 is a schematic structural diagram of a resistive variable memory according to an embodiment of the present invention.

Detailed ways

In order to make the object, technical solution and advantages of the present invention clearer, the present invention will be described in further detail below in conjunction with specific embodiments and with reference to the accompanying drawings.

The drawings and their descriptions provided herein are only for illustrating embodiments of the present invention. The shapes and dimensions in the respective drawings are for schematic illustration only, and do not strictly reflect actual shapes and dimensional ratios. Furthermore, the illustrated embodiments of the invention should not be construed as limited to the specific shapes of the regions shown in the figures, the representations in which are schematic and are not intended to limit the scope of the invention.

As shown in FIG. 2, FIG. 2 is a schematic diagram of the basic structure of the resistive memory provided by the present invention. The resistive memory includes a substrate 100, a lower electrode 101, a first functional layer film 102, an intermediate electrode 103, and a first functional layer from bottom to top. Two functional layer films 104 and an upper electrode 105 . Wherein, the lower electrode 101 is formed on the substrate 100, the first functional layer film 102 is formed on the lower electrode 101, the intermediate electrode 103 is formed on the first functional layer film 102, and the second functional layer film 104 is formed in the middle On the electrode 103 , the upper electrode 105 is formed on the second functional layer film 104 .

The geometrical shape and material constituting the substrate 100 are not limited, and generally consist of silicon dioxide, silicon nitride, glass and other insulating materials. The material constituting the lower electrode 101 and the upper electrode 105 is an inert metal or conductive compound under the action of an electric field. Preferably, the metal is W or Pt, and the conductive compound is TiN. The thickness of the lower electrode 101 and the upper electrode 105 is not limited. It can be understood that the thickness of the lower electrode 101 and the upper electrode 105 may be the same or different. The lower electrode 101 and the upper electrode 105 can be formed by electron beam evaporation, sputtering, thermal evaporation and other physical vapor deposition or chemical vapor deposition methods.

The material constituting the intermediate electrode 103 is a metal that is easily oxidized into metal ions under the action of an electric field, preferably Cu or Ag. The thickness of the intermediate electrode 103 is not limited, and it can be formed by electron beam evaporation, sputtering, thermal evaporation and other physical vapor deposition or chemical vapor deposition methods.

The first functional layer film 102 and the second functional layer film 104 are made of Cu ₂ S, As ₂ S, Cu-Ge-S, Ag-Ge-Se, ZnCdS, Ag-Ge-As, Ag-Ge-S or AgI, etc. Chalcogenide solid electrolyte material, ZrO ₂ , HfO ₂ , SiO ₂ , WO ₃ or ZnO and other metal oxide solid electrolyte materials are composed of any material, or any of the above materials can be modified by doping The formed solid electrolyte material is composed. It can be understood that the materials of the first functional layer film 102 and the second functional layer film 104 may be the same or different. The thicknesses of the first functional layer film 102 and the second functional layer film 104 are not limited, and can be formed by electron beam evaporation, sputtering and other physical vapor deposition or chemical vapor deposition methods.

Based on the schematic diagram of the basic structure of the resistive memory provided by the present invention shown in FIG. 2, FIG. 3 shows a flowchart of a method for manufacturing a resistive memory provided by the present invention. The method includes the following steps: providing a substrate 100; Form the lower electrode 101 on the 100; form the first functional layer film 102 on the lower electrode 101; form the intermediate electrode 103 on the first functional layer film 102; form the second functional layer film 104 on the intermediate electrode 103; An upper electrode 105 is formed on the thin film 104 .

It can be known from the above that the resistive variable memory of the present invention can be regarded as being composed of two solid electrolyte resistive variable memories A and B having a sandwich structure connected in series back to back, as shown in FIG. 4 . For RRAM based on solid electrolyte, the resistance transition of the device is mainly based on the formation and disappearance of nano-conductive filaments under the action of an electric field. When a positive voltage is applied on the easily oxidized active metal electrode (Cu or Ag), a nano-metal conductive filament is formed, and the device changes from a high-resistance state to a low-resistance state; under the action of a reverse voltage, the nano-metal conductive filament disconnected, the device returns to the high-impedance state.

It can be seen from Fig. 4 that the resistive variable memory proposed by the present invention is actually composed of two basic solid electrolyte resistive variable memories A and B connected in series back to back. When a negative voltage is applied to the top and the inert lower electrode is grounded, it is equivalent to applying a positive voltage to the active electrode of the solid electrolyte resistive variable memory A, and a negative voltage is applied to the active electrode of the solid electrolyte resistive variable memory B. As the voltage increases, a conductive channel is formed in the solid electrolyte resistive variable memory A, and its resistance becomes LRS, while the resistance of the solid electrolyte resistive variable memory B is still HRS. At this time, LRS/HRS is used to store data "1 ”, the resistance of the whole device still exhibits a high resistance value. At this time, a forward voltage is applied to the inert upper electrode of the device, which is equivalent to applying a positive voltage to the active electrode of the solid electrolyte RRAM B. Since the resistance of the solid electrolyte resistive variable memory A is LRS, and the resistance of the solid electrolyte resistive variable memory B is HRS, the voltage mainly drops on the solid electrolyte resistive variable memory B, so a conductive channel is formed in the solid electrolyte resistive variable memory A There will be no breakage. As the forward voltage increases, a conductive channel is also formed in the solid electrolyte resistive variable memory B. At this time, the resistances of the solid electrolyte resistive variable memory A and the solid electrolyte resistive variable memory B are both LRS , the positive voltage is equally distributed across the two devices. As the positive voltage continues to increase, the conductive filament in the solid electrolyte resistive variable memory A breaks, and its resistance becomes HRS, while the resistance of the solid electrolyte resistive variable memory B remains at LRS. At this time, HRS/LRS Used to store data "0", the resistance of the entire device exhibits a high resistance value.

To sum up, since the information resistances of the resistive memory storage data "1" and data "0" proposed by the present invention are both high-resistance values, when reading data in the cross array, the current can only flow through one direction The memory device causes the leakage channel shown by the dotted line in FIG. 1 to be cut off, thereby effectively suppressing the crosstalk phenomenon in the integration of the cross-array structure. In addition, the structure and preparation method of the resistive memory provided by the present invention are simple, which is beneficial to the integration and application of the memory.

The specific embodiments described above have further described the purpose, technical solutions and beneficial effects of the present invention in detail. It should be understood that the above descriptions are only specific embodiments of the present invention and are not intended to limit the present invention. Any modifications, equivalent replacements, improvements, etc. made within the spirit and principles of the present invention shall be included within the protection scope of the present invention.

Claims (20)

1. A resistive variable memory, characterized in that, comprising: Substrate (100); a lower electrode (101) formed on the substrate (100); A first functional layer film (102) formed on the lower electrode (101); an intermediate electrode (103) formed on the first functional layer film (102); A second functional layer film (104) formed on the intermediate electrode (103); and An upper electrode (105) formed on the second functional layer film (104). 2. The resistive variable memory according to claim 1, characterized in that the substrate (100) is made of silicon dioxide, silicon nitride or glass. 3. The resistive variable memory according to claim 1, characterized in that the upper electrode (105) or the lower electrode (101) is made of a metal or a conductive compound that is inert under the action of an electric field. 4. The resistive variable memory according to claim 3, wherein the metal is W or Pt, and the conductive compound is TiN. 5. The resistive variable memory according to claim 1, characterized in that the intermediate electrode (103) is made of a metal that is easily oxidized into metal ions under the action of an electric field. 6 . The resistive variable memory according to claim 5 , wherein the metal that is easily oxidized to metal ions under the action of an electric field is Cu or Ag. 7. The resistive variable memory according to claim 1, characterized in that, the lower electrode (101), middle electrode (103) or upper electrode (105) is formed by physical vapor deposition or chemical vapor deposition, The physical vapor deposition is electron beam evaporation, sputtering or thermal evaporation. 8. The resistive variable memory according to claim 1, characterized in that, the first functional layer film (102) or the second functional layer film (104) is made of a sulfur-based solid electrolyte material or a metal oxide solid electrolyte material, or a solid electrolyte material formed by doping and modifying a sulfur-based solid electrolyte material or a metal oxide solid electrolyte material. 9. The resistive variable memory according to claim 8, wherein the chalcogenide solid electrolyte material is Cu ₂ S, As ₂ S, Cu-Ge-S, Ag-Ge-Se, ZnCdS, Ag- Ge-As, Ag-Ge-S or AgI, the metal oxide solid electrolyte material is ZrO ₂ , HfO ₂ , SiO ₂ , WO ₃ or ZnO. 10. The resistive variable memory according to claim 1, characterized in that, the first functional layer film (102) or the second functional layer film (104) is formed by physical vapor deposition or chemical vapor deposition, The physical vapor deposition is electron beam evaporation or sputtering. 11. A method for preparing the resistive memory according to claim 1, comprising: providing a substrate (100); forming a lower electrode (101) on the substrate (100); forming a first functional layer film (102) on the lower electrode (101); forming an intermediate electrode (103) on the first functional layer film (102); forming a second functional layer film (104) on the intermediate electrode (103); and An upper electrode (105) is formed on the second functional layer film (104). 12. The method for manufacturing a resistive variable memory according to claim 11, characterized in that the substrate (100) is made of silicon dioxide, silicon nitride or glass. 13. The method for preparing a resistive variable memory according to claim 11, characterized in that, the upper electrode (105) or the lower electrode (101) adopts a metal or a conductive compound that is inert under the action of an electric field. 14. The method for preparing a resistive variable memory according to claim 13, wherein the metal is W or Pt, and the conductive compound is TiN. 15. The method for preparing a resistive variable memory according to claim 11, characterized in that the intermediate electrode (103) is made of a metal that is easily oxidized into metal ions under the action of an electric field. 16. The method for preparing a resistive variable memory according to claim 15, wherein the metal that is easily oxidized to metal ions under the action of an electric field is Cu or Ag. 17. The method for preparing a resistive variable memory according to claim 11, characterized in that, the lower electrode (101), middle electrode (103) or upper electrode (105) adopts physical vapor deposition or chemical vapor deposition method, the physical vapor deposition is electron beam evaporation, sputtering or thermal evaporation. 18. The method for preparing a resistive variable memory according to claim 11, characterized in that, the first functional layer film (102) or the second functional layer film (104) is made of a sulfur-based solid electrolyte material or a metal oxide A solid electrolyte material, or a solid electrolyte material formed by doping and modifying a sulfur-based solid electrolyte material or a metal oxide solid electrolyte material. 19. The method for preparing a resistive variable memory according to claim 18, wherein the chalcogenide solid electrolyte material is Cu ₂ S, As ₂ S, Cu-Ge-S, Ag-Ge-Se, ZnCdS , Ag-Ge-As, Ag-Ge-S or AgI, the metal oxide solid electrolyte material is ZrO ₂ , HfO ₂ , SiO ₂ , WO ₃ or ZnO. 20. The method for preparing a resistive variable memory according to claim 11, characterized in that, the first functional layer film (102) or the second functional layer film (104) adopts physical vapor deposition or chemical vapor deposition method, the physical vapor deposition is electron beam evaporation or sputtering.

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