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CN1029166C - 具有先行存贮器控制信号的个人计算机 - Google Patents

具有先行存贮器控制信号的个人计算机 Download PDF

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Publication number
CN1029166C
CN1029166C CN92103107A CN92103107A CN1029166C CN 1029166 C CN1029166 C CN 1029166C CN 92103107 A CN92103107 A CN 92103107A CN 92103107 A CN92103107 A CN 92103107A CN 1029166 C CN1029166 C CN 1029166C
Authority
CN
China
Prior art keywords
bus
data bus
local processor
main control
access
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
CN92103107A
Other languages
English (en)
Chinese (zh)
Other versions
CN1067126A (zh
Inventor
丹尼尔·保尔·弗科
路易斯·安东尼奥·赫恩兹
艾里克·马西森
丹尼斯·李·莫勒尔
朱纳塞恩·亨利·雷蒙德
伊斯梅尔·塔夏库里
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
Original Assignee
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Business Machines Corp filed Critical International Business Machines Corp
Publication of CN1067126A publication Critical patent/CN1067126A/zh
Application granted granted Critical
Publication of CN1029166C publication Critical patent/CN1029166C/zh
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/36—Handling requests for interconnection or transfer for access to common bus or bus system
    • G06F13/362—Handling requests for interconnection or transfer for access to common bus or bus system with centralised access control

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Bus Control (AREA)
  • Memory System (AREA)
  • Absorbent Articles And Supports Therefor (AREA)
CN92103107A 1991-05-28 1992-04-28 具有先行存贮器控制信号的个人计算机 Expired - Fee Related CN1029166C (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US07/706,534 US5353417A (en) 1991-05-28 1991-05-28 Personal computer with bus interface controller coupled directly with local processor and input/output data buses and for anticipating memory control changes on arbitration for bus access
US706,534 1991-05-28

Publications (2)

Publication Number Publication Date
CN1067126A CN1067126A (zh) 1992-12-16
CN1029166C true CN1029166C (zh) 1995-06-28

Family

ID=24838034

Family Applications (1)

Application Number Title Priority Date Filing Date
CN92103107A Expired - Fee Related CN1029166C (zh) 1991-05-28 1992-04-28 具有先行存贮器控制信号的个人计算机

Country Status (12)

Country Link
US (1) US5353417A (pt)
EP (1) EP0518503A1 (pt)
JP (1) JPH0769884B2 (pt)
KR (1) KR950008231B1 (pt)
CN (1) CN1029166C (pt)
AU (1) AU660667B2 (pt)
BR (1) BR9201974A (pt)
CA (1) CA2067602C (pt)
FI (1) FI922350A7 (pt)
MY (1) MY108101A (pt)
NO (1) NO922091L (pt)
SG (1) SG42881A1 (pt)

Families Citing this family (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CA2065989C (en) * 1991-06-07 1998-03-31 Don Steven Keener Personal computer data flow control
JP3515142B2 (ja) * 1992-06-11 2004-04-05 セイコーエプソン株式会社 データ転送制御装置
US6401158B1 (en) * 1993-07-16 2002-06-04 Compaq Computer Corporation Apparatus for providing a CPU cluster via a disk I/O bus using a CPU brick which fits into a disk cavity
EP0654743A1 (en) * 1993-11-19 1995-05-24 International Business Machines Corporation Computer system having a DSP local bus
US5426740A (en) * 1994-01-14 1995-06-20 Ast Research, Inc. Signaling protocol for concurrent bus access in a multiprocessor system
US5546547A (en) * 1994-01-28 1996-08-13 Apple Computer, Inc. Memory bus arbiter for a computer system having a dsp co-processor
US5632020A (en) * 1994-03-25 1997-05-20 Advanced Micro Devices, Inc. System for docking a portable computer to a host computer without suspending processor operation by a docking agent driving the bus inactive during docking
US5721882A (en) * 1994-08-05 1998-02-24 Intel Corporation Method and apparatus for interfacing memory devices operating at different speeds to a computer system bus
US5513302A (en) * 1994-11-21 1996-04-30 Winbond Electronics Corp. Dual purpose printer interface device capable of connecting a printer and a joystick to a portable host computer
US5687393A (en) * 1995-06-07 1997-11-11 International Business Machines Corporation System for controlling responses to requests over a data bus between a plurality of master controllers and a slave storage controller by inserting control characters
EP0834135B1 (en) * 1995-06-15 2003-01-02 Intel Corporation Architecture for an i/o processor that integrates a pci to pci bridge
US6324592B1 (en) 1997-02-25 2001-11-27 Keystone Aerospace Apparatus and method for a mobile computer architecture and input/output management system
US6115551A (en) * 1997-03-27 2000-09-05 Industrial Technology Research Institute System for minimizing the number of control signals and maximizing channel utilization between an I/O bridge and a data buffer
US6317801B1 (en) * 1998-07-27 2001-11-13 Intel Corporation System for post-driving and pre-driving bus agents on a terminated data bus
US6519666B1 (en) * 1999-10-05 2003-02-11 International Business Machines Corporation Arbitration scheme for optimal performance
JP2002041445A (ja) * 2000-05-19 2002-02-08 Matsushita Electric Ind Co Ltd 高性能ｄｍａコントローラ
AU2002252173A1 (en) * 2001-02-28 2002-09-12 Brecis Communications Corporation A security system with an intelligent dma controller

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4623986A (en) * 1984-02-23 1986-11-18 Texas Instruments Incorporated Memory access controller having cycle number register for storing the number of column address cycles in a multiple column address/single row address memory access cycle
US4701843A (en) * 1985-04-01 1987-10-20 Ncr Corporation Refresh system for a page addressable memory
US4719621A (en) * 1985-07-15 1988-01-12 Raytheon Company Packet fastbus
JPS62190999U (pt) * 1986-05-23 1987-12-04
US5029074A (en) * 1987-06-29 1991-07-02 Digital Equipment Corporation Bus adapter unit for digital processing system
US5034917A (en) * 1988-05-26 1991-07-23 Bland Patrick M Computer system including a page mode memory with decreased access time and method of operation thereof
US5003463A (en) * 1988-06-30 1991-03-26 Wang Laboratories, Inc. Interface controller with first and second buffer storage area for receiving and transmitting data between I/O bus and high speed system bus
US5179667A (en) * 1988-09-14 1993-01-12 Silicon Graphics, Inc. Synchronized DRAM control apparatus using two different clock rates
JPH077955B2 (ja) * 1989-05-13 1995-01-30 株式会社東芝 データ通信制御装置
US5220651A (en) * 1989-10-11 1993-06-15 Micral, Inc. Cpu-bus controller for accomplishing transfer operations between a controller and devices coupled to an input/output bus
US5202857A (en) * 1990-11-07 1993-04-13 Emc Corporation System for generating memory timing and reducing memory access time

Also Published As

Publication number Publication date
FI922350A0 (fi) 1992-05-22
NO922091D0 (no) 1992-05-26
JPH05197672A (ja) 1993-08-06
KR920022113A (ko) 1992-12-19
KR950008231B1 (ko) 1995-07-26
CA2067602C (en) 1998-05-05
BR9201974A (pt) 1993-01-12
MY108101A (en) 1996-08-15
AU660667B2 (en) 1995-07-06
FI922350A7 (fi) 1992-11-29
CA2067602A1 (en) 1992-11-29
CN1067126A (zh) 1992-12-16
JPH0769884B2 (ja) 1995-07-31
AU1520092A (en) 1992-12-03
US5353417A (en) 1994-10-04
EP0518503A1 (en) 1992-12-16
NO922091L (no) 1992-11-30
SG42881A1 (en) 1997-10-17

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C19 Lapse of patent right due to non-payment of the annual fee
CF01 Termination of patent right due to non-payment of annual fee