CN102916675B - Piezoelectric acoustic-wave filter and chip-packaging structure - Google Patents

Abstract

The invention provides a piezoelectric acoustic wave filter and a chip packaging structure. By introducing mutual inductance between inductances connected to the piezoelectric acoustic wave filter, the position of the transmission zero point of the piezoelectric acoustic wave filter is adjusted. The piezoelectric acoustic wave filter of the present invention includes a plurality of piezoelectric acoustic wave resonators, and a plurality of inductors connected to the piezoelectric acoustic wave resonators, and among the inductors, at least two inductors have a mutual inductance The inductance value is in the interval [0.01nH, 1nH]. In the chip package structure of the present invention, the mutual inductance between at least two bonding wires or the series body of the substrate trace and the inductor is within the interval [0.01nH, 1nH]. Adopting the technical solution of the invention also helps to improve the high-frequency performance of the filter and save the space occupied by the inductor.

Description

Piezoelectric Acoustic Filter and Chip Package Structure

technical field

The invention relates to the technical field of semiconductor integrated circuits, in particular to piezoelectric acoustic wave filters and chip packaging structures.

Background technique

Piezoelectric acoustic wave filter (hereinafter referred to as "filter") is a widely used semiconductor device. In order to make the filter have a strong suppression effect on the input signal in specific frequency bands such as ISM frequency band and GSM frequency band, the filter is usually made to have transmission zeros in these frequency bands. By selecting the inductance value of the inductor in the filter, the frequency points corresponding to these transmission zero points can be adjusted, and this action can also be referred to as adjusting the filter transmission zero point.

Fig. 1 is a schematic diagram of a circuit principle of a piezoelectric acoustic wave filter according to the prior art. Figure 1 shows a common ladder network structure, which consists of several piezoelectric acoustic resonators in series (X11, X12, X13) and several parallel piezoelectric acoustic resonators (Y11, Y12, Y13 )constitute. It is also possible to include more piezoacoustic resonators in the actual ladder network structure. The circuit shown in Figure 1 can be manufactured in a chip using integrated circuit manufacturing technology, that is, a filter chip is obtained. The circuit principle shown in Figure 1 also includes several inductive components. The inductance element may represent an inductor inside the filter chip.

When placing transmission zeros at low frequencies far from the passband of the filter to achieve signal rejection, the inductors (such as L11, L12, and L13 in Figure 1) are often required to have large inductance values. In the process of realizing the present invention, the inventors found that such a large inductance value will bring many disadvantages, such as deteriorating the high-frequency performance of the filter and occupying a large space by the inductor.

Contents of the invention

In view of this, the present invention provides a piezoelectric acoustic wave filter and a chip packaging structure to overcome the disadvantages mentioned above.

The piezoelectric acoustic wave filter provided by the present invention includes a plurality of piezoelectric acoustic wave resonators, and a plurality of inductors connected in series with the piezoelectric acoustic wave resonators, and among the inductors, at least two The mutual inductance value is in the interval [0.01nH, 1nH].

Optionally, the inductance value of the inductor is within the interval (0nH, 10nH].

A chip packaging structure provided by the present invention includes a piezoelectric acoustic wave filter chip and a packaging substrate, and the piezoelectric acoustic wave filter includes a plurality of piezoelectric acoustic wave resonators, and a plurality of inductors connected to the piezoelectric acoustic wave resonators There are a plurality of metal bonding wires between the piezoelectric acoustic wave filter and the packaging substrate, and for a plurality of series bodies formed by the inductor and the metal bonding wires, one of the metal bonding wires The relative position between them makes the mutual inductance value between at least two series bodies be in the interval [0.01nH, 1nH].

Optionally, the inductance value of the inductor is within the interval (0nH, 10nH].

Another chip packaging structure provided by the present invention includes a piezoelectric acoustic wave filter chip and a packaging substrate, the piezoelectric acoustic wave filter includes a plurality of piezoelectric acoustic wave resonators, the connection between the piezoelectric acoustic wave filter and the packaging substrate There are a plurality of metal bonding wires between them, and the metal bonding wires are respectively connected in series with the inductors on the packaging substrate. The relative position between the joint lines makes the mutual inductance value between at least two series bodies be within the interval [0.01nH, 1nH].

Optionally, the inductance value of the inductor is within the interval (0nH, 10nH].

Another chip packaging structure provided by the present invention includes a piezoelectric acoustic wave filter chip and a packaging substrate, the piezoelectric acoustic wave filter includes a plurality of piezoelectric acoustic wave resonators, and a plurality of piezoelectric acoustic wave resonators connected Inductor, the piezoelectric acoustic wave filter is welded on the packaging substrate, and the welding place is connected to the inductor and the substrate wiring of the packaging substrate at the same time. For the inductor and the substrate wiring formed A plurality of series bodies, the relative positions between the substrate traces make the mutual inductance value between at least two series bodies within the interval [0.01nH, 1nH].

Optionally, the inductance value of the inductor is within the interval (0nH, 10nH].

Another chip packaging structure provided by the present invention includes a piezoelectric acoustic wave filter chip and a packaging substrate, the piezoelectric acoustic wave filter includes a plurality of piezoelectric acoustic wave resonators, and the piezoelectric acoustic wave filter is welded on the packaging substrate Above, each welding place is connected to the substrate traces of the substrate, and each substrate trace is connected in series with the inductor on the package substrate, and for multiple series bodies formed by the inductor and the substrate traces, The relative position between the traces on the substrate makes the mutual inductance value between at least two serial bodies within the interval [0.01nH, 1nH].

Optionally, the inductance value of the inductor is within the interval (0nH, 10nH].

Another chip packaging structure provided by the present invention includes a piezoelectric acoustic wave filter chip and a packaging substrate, the piezoelectric acoustic wave filter includes a plurality of piezoelectric acoustic wave resonators, and a plurality of piezoelectric acoustic wave resonators connected Inductor, there are a plurality of metal bonding wires between the piezoelectric acoustic wave filter chip and the packaging substrate, and the metal bonding wires are respectively connected in series with the inductors on the packaging substrate, for the piezoelectric acoustic wave The inductor connected to the resonator, the metal bonding wire, and the inductor on the packaging substrate are sequentially connected to form a plurality of series bodies, and the relative position between the metal bonding wires is such that there are at least two series bodies The mutual inductance value between is located in the interval [0.01nH, 1nH].

Further, the inductance value of the inductor connected to the piezoelectric acoustic resonator is located in the interval (0nH, 10nH]; and/or, the inductance value of the inductor on the packaging substrate is located in the interval (0nH, 10nH] .

Another chip packaging structure provided by the present invention includes a piezoelectric acoustic wave filter chip and a packaging substrate, the piezoelectric acoustic wave filter includes a plurality of piezoelectric acoustic wave resonators, and a plurality of piezoelectric acoustic wave resonators connected Inductor, the piezoelectric acoustic wave filter chip is welded on the packaging substrate, each welding place is connected with the substrate wiring of the substrate, and each substrate wiring is connected in series with the inductor on the packaging substrate, for The inductors connected to the piezoelectric acoustic wave resonator, the substrate traces, and the inductors on the package substrate are sequentially connected to form a plurality of series bodies, and the relative positions between the substrate traces make at least two The mutual inductance value between the series bodies is in the interval [0.01nH, 1nH].

Further, the inductance value of the inductor connected to the piezoelectric acoustic resonator is located in the interval (0nH, 10nH]; and/or, the inductance value of the inductor on the packaging substrate is located in the interval (0nH, 10nH] .

Another chip packaging structure provided by the present invention includes a piezoelectric acoustic wave filter chip and a packaging substrate, the piezoelectric acoustic wave filter includes a plurality of piezoelectric acoustic wave resonators, and the connection between the piezoelectric acoustic wave filter and the packaging substrate is There are multiple metal bonding wires between them, and the mutual inductance value between at least two of the metal bonding wires is within the interval [0.01nH, 1nH].

Another chip packaging structure provided by the present invention includes a piezoelectric acoustic wave filter chip and a packaging substrate, the piezoelectric acoustic wave filter includes a plurality of piezoelectric acoustic wave resonators, and the piezoelectric acoustic wave filter is welded on the packaging substrate Above, each welding place is connected to the substrate traces of the substrate, and the mutual inductance value between at least two substrate traces is within the interval [0.01nH, 1nH].

According to the technical solution of the present invention, the transmission zero point of the filter can be designed by introducing mutual inductance between inductors. In the case of using the above mutual inductance, it has little effect on the signal suppression performance of the filter, but the relevant inductor can choose a smaller inductance value, which is conducive to obtaining better high-frequency performance of the filter, and the smaller inductance value Inductors also take up less space, which also facilitates debugging during the product development phase.

Description of drawings

The accompanying drawings are used for better understanding of the present invention, and do not constitute an improper limitation of the present invention. in:

Fig. 1 is the schematic diagram according to the circuit principle of a kind of piezoelectric acoustic wave filter in the prior art;

2A is a schematic diagram of a situation where mutual inductance exists in a filter circuit related to an embodiment of the present invention;

2B is a schematic diagram of another situation where mutual inductance exists in the filter circuit related to the embodiment of the present invention;

Fig. 3 is a schematic diagram according to the general structure of the filter chip related to the embodiment of the present invention;

4A is a schematic diagram of a first chip packaging structure according to an embodiment of the present invention;

4B is a schematic diagram of a second chip packaging structure according to an embodiment of the present invention;

4C is a schematic diagram of a third chip packaging structure according to an embodiment of the present invention;

5A is a schematic diagram of a fourth chip packaging structure according to an embodiment of the present invention;

5B is a schematic diagram of a fifth chip packaging structure according to an embodiment of the present invention;

5C is a schematic diagram of a sixth chip packaging structure according to an embodiment of the present invention;

6A is a schematic diagram of a seventh chip packaging structure according to an embodiment of the present invention;

6B is a schematic diagram of an eighth chip packaging structure according to an embodiment of the present invention;

FIG. 7A is a schematic diagram of a filter frequency response related to an embodiment of the present invention;

FIG. 7B is another schematic diagram of the frequency response of a filter related to an embodiment of the present invention.

Detailed ways

Exemplary embodiments of the present invention are described below in conjunction with the accompanying drawings, which include various details of the embodiments of the present invention to facilitate understanding, and they should be regarded as exemplary only. Accordingly, those of ordinary skill in the art will recognize that various changes and modifications of the embodiments described herein can be made without departing from the scope and spirit of the invention. Also, descriptions of well-known functions and constructions are omitted in the following description for clarity and conciseness.

In the process of implementing the present invention, the inventors found that the transmission zero point of the filter is affected by the mutual inductance between inductive devices in the circuit. Referring to FIG. 2A and FIG. 2B , FIG. 2A is a schematic diagram of a situation where mutual inductance exists in a filter circuit related to an embodiment of the present invention. As shown in FIG. 2A , there is a mutual inductance M1 between the inductor L21 and the inductor L22 , and the terminal with the same name is shown as a black dot at the end of each inductor, such as a black dot 20 . In this way, when M1 increases, the transmission zero point of the filter moves to the direction of low frequency, and when M1 decreases, the transmission zero point of the filter moves to the direction of high frequency. FIG. 2B is a schematic diagram of another situation where mutual inductance exists in the filter circuit related to the embodiment of the present invention. In FIG. 2B, there is a mutual inductance M2 between the inductor L22 and the inductor L25. When M2 increases, the transmission zero of the filter moves to a higher frequency direction, and when M2 decreases, the filter transmission zero moves to a lower frequency. Therefore, the mutual inductance can be used to adjust the transmission zero of the filter.

The method of using mutual inductance to adjust the transmission zero point of the filter can be applied to various practical structures of piezoelectric acoustic wave filters, as illustrated below.

The mutual inductance between the inductors within the filter chip can be used to adjust the transmission zero of the filter. Fig. 3 is a schematic diagram of a general structure of a filter chip according to an embodiment of the present invention.

As shown in FIG. 3 , there are a plurality of piezoelectric acoustic wave resonators inside the filter chip 30 , and the whole of these piezoelectric acoustic wave resonators is represented by a box 31 . FIG. 3 shows two inductors 32 , 33 connected to a piezoelectric acoustic resonator ensemble 31 with mutual inductance. By adjusting the mutual inductance between the inductors 32, 33, the transmission zero of the filter can be adjusted. Other inductors are not shown.

For the filter chip connected to the packaging substrate, the corresponding mutual inductance adjustment method can be selected according to the packaging method. A common connection method between the filter chip and the packaging substrate is to use metal bonding wires (hereinafter referred to as "bonding wires"). Because in the radio frequency (RF) frequency band, the bonding wire not only plays the role of electrically connecting the filter chip and the packaging substrate, but also exhibits inductance characteristics. For example, at about 2GHz, the inductance of a bonding wire with a diameter of 1mil is about 1nH/ mm, so the bonding wire can act as part of the inductance of the filter chip. In the radio frequency band, the bonding wires will radiate electromagnetic fields outward, so there is mutual coupling between the bonding wires, that is, mutual inductance. Therefore, the transmission zero point of the filter can be adjusted by adjusting the mutual inductance between the bonding wires. The mutual inductance between the bonding wires can be realized by adjusting the relative position between the bonding wires.

Referring to Fig. 2A or Fig. 2B, the five inductances in the figure can be the series body of the inductor inside the filter chip, the external bonding wire and the external inductance, or it can be a filter chip with no inductor inside, which means The series body of the external bonding wire and the external inductor (there are pins of the chip between the bonding wire and the inductor, for the sake of simplicity of description, the description of the pins is omitted, the same below). When the relative position between the bonding wires is adjusted, the mutual inductance between the series body formed by the bonding wires and the inductor is changed.

FIG. 4A is a schematic diagram of a first chip packaging structure according to an embodiment of the present invention. As shown in FIG. 4A , a filter chip 41 is fixed on the packaging substrate 40 , and there are inductors 421 , 431 and other inductors not shown in the filter chip 41 . The inductor 421 and the bonding wire 422 connected in series form a series body 42 , and the inductor 431 and the bonding wire 432 connected in series form a series body 43 . Adjusting the relative position between the bonding wires 422 and 432 can change the magnitude of the mutual inductance between the series bodies 42 and 43 . Other bond wires are not shown.

FIG. 4B is a schematic diagram of a second chip packaging structure according to an embodiment of the present invention. The difference between FIG. 4B and FIG. 4A is that there is no inductor in the filter chip 45 in FIG. 4B, and the inductors 462, 472 are located on the packaging substrate 44, and are respectively connected to the bonding wires 461, 471 to form series bodies 46, 47 respectively. . Adjusting the relative position between the bonding wires 461 and 471 can change the magnitude of the mutual inductance between the series bodies 46 and 47 . Other bond wires are not shown.

FIG. 4C is a schematic diagram of a third chip packaging structure according to an embodiment of the present invention. In FIG. 4C , there are no inductors inside and outside the filter chip 49 , and are connected to the packaging substrate 48 by bonding wires. The mutual inductance between the bonding wires can be adjusted by adjusting the relative position between the bonding wires, for example, adjusting the relative position between the bonding wires 491 and 492 can change the mutual inductance between the bonding wires 491 and 492 . Other bond wires are not shown.

A flip-chip method can also be used between the filter chip and the packaging substrate, that is, the pins of the chip face the surface of the packaging substrate and are directly welded on the packaging substrate. Since the substrate traces also have inductance-related physical properties similar to the bonding wires, the mutual inductance between the substrate traces can be adjusted by adjusting the relative positions of the substrate traces. The inductance in Figure 2A or Figure 2B can represent the series body of the inductor inside the filter chip, the external substrate wiring and the external inductance, or it can be a type of filter chip without an internal inductor, which means the external substrate wiring and external inductor in series. When the relative position between the substrate traces is adjusted, the mutual inductance between the substrate traces and the series body composed of the inductor is changed.

FIG. 5A is a schematic diagram of a fourth chip packaging structure according to an embodiment of the present invention. As shown in FIG. 5A , a filter chip 51 is fixed on the package substrate 50 , and there are inductors 521 , 531 and other inductors not shown in the filter chip 51 . The inductor 521 and the substrate wiring 522 connected in series form a series body 52 , and the inductor 531 and the substrate wiring 532 connected in series form a series body 53 . Adjusting the relative position between the substrate traces 522 and 532 can change the mutual inductance between the serial bodies 52 and 53 . Other substrate traces are not shown.

FIG. 5B is a schematic diagram of a fifth chip packaging structure according to an embodiment of the present invention. The difference between FIG. 5B and FIG. 5A is that there is no inductor in the filter chip 55 in FIG. 5B, and the inductors 562 and 572 are located on the packaging substrate 54, and are respectively connected to the substrate traces 561 and 571 to form series bodies 56 and 57 respectively. . The mutual inductance between the serial bodies 56 and 57 can be changed by adjusting the relative position between the substrate traces 561 and 571 .

FIG. 5C is a schematic diagram of a sixth chip packaging structure according to an embodiment of the present invention. As shown in FIG. 5C , the filter chip 59 is welded on the package substrate 58 , and the package substrate 58 has substrate traces. The mutual inductance between the substrate traces can be adjusted by adjusting the relative position between the substrate traces. For example, adjusting the relative position between the substrate traces 591 and 592 can change the mutual inductance between the substrate traces 591 and 592 . Other substrate traces are not shown.

FIG. 6A is a schematic diagram of a seventh chip packaging structure according to an embodiment of the present invention. As shown in FIG. 6A , a filter chip 61 is fixed on the packaging substrate 60 , and there are inductors 621 , 631 and other inductors not shown in the filter chip 61 . The inductor 621 , the bonding wire 622 , and the inductor 623 on the packaging substrate form a series body 62 ; the inductor 631 , the bonding wire 632 , and the inductor 633 on the packaging substrate form a series body 63 . Adjusting the relative position between the bonding wires 622 and 632 can change the magnitude of the mutual inductance between the series bodies 62 and 63 . Other bond wires are not shown.

FIG. 6B is a schematic diagram of an eighth chip packaging structure according to an embodiment of the present invention. As shown in FIG. 6B , a filter chip 65 is fixed on the packaging substrate 64 , and there are inductors 661 , 671 and other inductors not shown in the filter chip 65 . The inductor 661 , the substrate wiring 662 , and the inductor 663 on the packaging substrate form a series body 66 ; the inductor 671 , the substrate wiring 672 , and the inductor 673 on the packaging substrate form a series body 67 . The mutual inductance between the serial bodies 66 and 67 can be changed by adjusting the relative position between the substrate traces 662 and 672 . Other substrate traces are not shown.

It can be seen from the above description that by adjusting the relative position between the bonding wires or the substrate traces, the mutual inductance between the bonding wires or the substrate traces and the series body of the inductor can be changed. In fact, mutual inductance may also exist between inductors such as inductors 421 and 431 or between inductors 462 and 472. When inductors such as planar spiral inductors and surface mount inductors are selected and their positions are fixed, they The resulting mutual inductance is then fixed, and then the position of the bonding wire or the substrate wiring is adjusted to change the mutual inductance between the above-mentioned series bodies. During debugging, the mutual inductance between inductors can be retained or eliminated, and then the position of the bonding wire or the substrate trace can be adjusted. Generally speaking, the adjustment method can be selected in combination with the results of circuit simulation analysis.

After testing, the inductance value of the mutual inductance between the inductors 32 and 33 shown in FIG. 3 can be adjusted within the interval [0.01nH, 1nH]. In this way, the inductance value of the inductor can be selected within the interval (0nH, 10nH]. The inductance value of the mutual inductance between the bonding wire or the substrate trace and the series body of the inductor in Figure 4A to Figure 5B can be adjusted to the interval [ 0.01nH, 1nH]. In this way, the inductance value of the inductor can be selected in the interval (0nH, 10nH].

The effect of using the mutual inductance to adjust the zero point of the filter will be described below with reference to FIG. 7A and FIG. 7B . FIG. 7A is a schematic diagram of the frequency response of a filter related to an embodiment of the present invention. In FIG. 7A , the abscissa is the frequency, the unit is GHz, and the ordinate is the insertion loss of the filter, the unit is dB. Curve 71 represents the frequency response curve when mutual inductance is not used. At this time, a transmission zero point of the filter is located at 1.905 GHz, and the filter suppresses the signal by about 55 dB, as shown by the hollow circle on curve 71 . In the case of using the mutual inductance M1 between the inductor L21 and the inductor L22 in FIG. 2A, the frequency response curve of the filter is shown in curve 72. At this time, a transmission zero point of the filter is located at a frequency of 1.864GHz, and the suppression of the signal Approximately 54dB, as shown by the solid circle on curve 72 . It can be seen that after using mutual inductance, the transmission zero point can be significantly displaced, but the signal suppression effect on the transmission zero point is very small.

FIG. 7B is another schematic diagram of the frequency response of a filter related to an embodiment of the present invention. FIG. 7B shows the frequency response curve of the filter when there is a mutual inductance M2 between the inductor L22 and the inductor L25 shown in FIG. 2B .

In FIG. 7B , the abscissa is the frequency, the unit is GHz, and the ordinate is the insertion loss of the filter, the unit is dB. Curve 73 represents the frequency response curve when mutual inductance is not used. At this time, a transmission zero point of the filter is located at 1.905 GHz, and the suppression of the signal by the filter is about 55 dB, as shown by the hollow circle on curve 72 . In the case of using the mutual inductance M2 between the inductance L22 and the inductance L25 shown in FIG. 2B, the frequency response curve of the filter is shown in curve 74. At this time, a transmission zero point of the filter is located at a frequency of 1.943 GHz, and the signal The rejection is about 57dB, as shown by the solid circles on curve 72 . It can be seen that after using mutual inductance, the transmission zero point can be significantly displaced, but the signal suppression effect on the transmission zero point is very small.

In the case of using the above-mentioned mutual inductance, it has little effect on the suppression effect of the signal, but the inductor can choose a smaller inductance value, which is beneficial to obtain better high-frequency performance of the filter, and the inductor with a smaller inductance value occupies the There is also less space.

The above specific implementation methods do not constitute a limitation to the protection scope of the present invention. It should be apparent to those skilled in the art that various modifications, combinations, sub-combinations and substitutions may occur depending on design requirements and other factors. Any modifications, equivalent replacements and improvements made within the spirit and principles of the present invention shall be included within the protection scope of the present invention.

Claims (10)

1. a kind of piezoelectric acoustic-wave filter, the piezoelectric acoustic-wave filter includes multiple piezoelectric acoustic wave resonators, and it is multiple with The inductor of the piezoelectric acoustic wave resonator series connection, it is characterised in that

In the inductor, the mutual inductance inductance value between at least two inductors is located in section [0.01nH, 1nH].

2. piezoelectric acoustic-wave filter according to claim 1, it is characterised in that the inductance value of the inductor is located at section (0nH, 10nH] in.

3. a kind of chip-packaging structure, piezoelectric sound wave filtering chip and package substrate, institute are included in the chip-packaging structure Stating piezoelectric acoustic-wave filter includes multiple piezoelectric acoustic wave resonators, and multiple inductance connected with the piezoelectric acoustic wave resonator Device, there is a plurality of metallic bond zygonema between the piezoelectric acoustic-wave filter and the package substrate, it is characterised in that

The multiple concatermers formed for the inductor and the metallic bond zygonema, the relative position between the metallic bond zygonema Putting makes the mutual inductance inductance value between at least two concatermers be located in section [0.01nH, 1nH].

4. chip-packaging structure according to claim 3, it is characterised in that the inductance value of the inductor is located at section (0nH, 10nH] in.

5. a kind of chip-packaging structure, piezoelectric sound wave filtering chip and package substrate, institute are included in the chip-packaging structure Stating piezoelectric acoustic-wave filter includes multiple piezoelectric acoustic wave resonators, and multiple inductance connected with the piezoelectric acoustic wave resonator Device, piezoelectric acoustic-wave filter welding on the package substrate, weld simultaneously with the inductor and the encapsulation The substrate cabling connection of substrate, it is characterised in that

For the inductor and multiple concatermers of substrate cabling composition, the relative position between the substrate cabling makes Mutual inductance inductance value between at least two concatermers is located in section [0.01nH, 1nH].

6. chip-packaging structure according to claim 5, it is characterised in that the inductance value of the inductor is located at section (0nH, 10nH] in.

7. a kind of chip-packaging structure, piezoelectric sound wave filtering chip and package substrate, institute are included in the chip-packaging structure Stating piezoelectric acoustic-wave filter includes multiple piezoelectric acoustic wave resonators, and multiple inductance connected with the piezoelectric acoustic wave resonator Device, there is a plurality of metallic bond zygonema, the metallic bond zygonema point between the piezoelectric sound wave filtering chip and the package substrate Do not connected with the inductor on the package substrate, it is characterised in that

For the electricity on the inductor, the metallic bond zygonema and the package substrate that are connected with the piezoelectric acoustic wave resonator Sensor is sequentially connected multiple concatermers of composition, the relative position between the metallic bond zygonema make at least two concatermers it Between mutual inductance inductance value be located in section [0.01nH, 1nH].

8. chip-packaging structure according to claim 7, it is characterised in that

The inductance value for the inductor being connected with the piezoelectric acoustic wave resonator be located at section (0nH, 10nH] in；And/or

The inductance value of inductor on the package substrate be located at section (0nH, 10nH] in.

9. a kind of chip-packaging structure, piezoelectric sound wave filtering chip and package substrate, institute are included in the chip-packaging structure Stating piezoelectric acoustic-wave filter includes multiple piezoelectric acoustic wave resonators, and multiple inductance connected with the piezoelectric acoustic wave resonator Device, on the package substrate, the substrate cabling of each weld and the substrate connects for the piezoelectric sound wave filtering chip welding Connect, each bar substrate cabling is connected with the inductor on the package substrate respectively, it is characterised in that

For the inductance on the inductor, the substrate cabling and the package substrate that are connected with the piezoelectric acoustic wave resonator Device is sequentially connected multiple concatermers of composition, and the relative position between the substrate cabling makes between at least two concatermers Mutual inductance inductance value is located in section [0.01nH, 1nH].

10. chip-packaging structure according to claim 9, it is characterised in that

The inductance value for the inductor being connected with the piezoelectric acoustic wave resonator be located at section (0nH, 10nH] in；And/or

The inductance value of inductor on the package substrate be located at section (0nH, 10nH] in.