CN102903671A - Method for forming novel chip back-side TSV (through silicon via) structure - Google Patents
Method for forming novel chip back-side TSV (through silicon via) structure Download PDFInfo
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- CN102903671A CN102903671A CN2012103859592A CN201210385959A CN102903671A CN 102903671 A CN102903671 A CN 102903671A CN 2012103859592 A CN2012103859592 A CN 2012103859592A CN 201210385959 A CN201210385959 A CN 201210385959A CN 102903671 A CN102903671 A CN 102903671A
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- 238000000034 method Methods 0.000 title claims abstract description 49
- 229910052710 silicon Inorganic materials 0.000 title claims description 42
- 239000010703 silicon Substances 0.000 title claims description 42
- 238000001312 dry etching Methods 0.000 claims abstract description 15
- 238000004519 manufacturing process Methods 0.000 claims description 14
- 238000005530 etching Methods 0.000 claims description 8
- 230000015572 biosynthetic process Effects 0.000 claims description 4
- 238000004026 adhesive bonding Methods 0.000 claims description 3
- 238000004380 ashing Methods 0.000 claims description 3
- 230000007797 corrosion Effects 0.000 claims description 3
- 238000005260 corrosion Methods 0.000 claims description 3
- 238000005553 drilling Methods 0.000 claims description 3
- 239000003814 drug Substances 0.000 claims description 3
- 239000007788 liquid Substances 0.000 claims description 3
- 238000011946 reduction process Methods 0.000 claims description 3
- 239000002184 metal Substances 0.000 abstract description 7
- 230000007547 defect Effects 0.000 abstract description 3
- 239000004065 semiconductor Substances 0.000 abstract description 3
- 238000009413 insulation Methods 0.000 abstract 1
- 230000004888 barrier function Effects 0.000 description 5
- 238000005516 engineering process Methods 0.000 description 3
- 230000007812 deficiency Effects 0.000 description 2
- 230000002950 deficient Effects 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 238000005538 encapsulation Methods 0.000 description 2
- 229920002120 photoresistant polymer Polymers 0.000 description 2
- 238000007493 shaping process Methods 0.000 description 2
- 241000237509 Patinopecten sp. Species 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 239000000084 colloidal system Substances 0.000 description 1
- 230000005496 eutectics Effects 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 238000002161 passivation Methods 0.000 description 1
- 235000020637 scallop Nutrition 0.000 description 1
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Abstract
The invention relates to a method for forming a novel chip back-side TSV structure, which belongs to the technical field of semiconductor chip package. The novel chip back-side TSV structure comprises a chip body (1), and a chip electrode (2) arranged on the front side of the chip body (1), wherein a TSV (101) formed by two dry etching steps is arranged on the back side of the chip body (1); the TSV (101) has a horn-shaped structure with a large outer section and a small inner section; and the bottom of the TSV (101) reaches the lower surface of the chip electrode (2). The horn-shaped TSV (101) formed by the method provided by the invention has high wall smoothness, eliminates the defects of wall corrugation and lateral recession, and has good process compatibility, thereby facilitating the subsequent steps of covering an intact insulation layer and filling metal in the hole.
Description
Technical field
The present invention relates to the manufacturing process of chip back through-silicon via structure, belong to the semiconductor die package technical field.
Background technology
Development along with semiconductor technology, silicon through hole interconnection technique has appearred, namely with the silicon through hole of filling metal in the vertical direction (Z-direction) redistribution electrode or circuit, realize interconnectedly transferring to opposite side from chip one side, in conjunction with the rewiring technology on (X, Y plane) on the plane so that interconnected can be at whole X, Y, the Z direction is carried out; By silicon through hole interconnection technique, greatly increased the flexibility of encapsulation, created condition for three-dimensional stacked encapsulation simultaneously.
The silicon through hole is interconnected to comprise usually that the silicon through hole is made, insulating barrier forms and metal filled.For straight hole commonly used in the industry, forming process mainly adopts " BOSCH " lithographic method, the use etching that namely replaces and the technique of passivation.But straight hole is unfavorable for that solution enters in the interior metal filled process of subsequent openings, causes easily filling bad.And " BOSCH " lithographic method finally can to stay the round lines (scallop) that height rises and falls at hole wall be the hole wall ripple, as shown in Figure 1, and stay side direction indent (notch) at the interface of silicon and subsurface material, as shown in Figure 2.And these hole wall ripples and side direction indent all can cause follow-up insulating barrier to cover deficiency, affect the quality that insulating barrier forms.
Summary of the invention
The object of the invention is to overcome the deficiency of current silicon through hole manufacturing process, providing a kind of is not the manufacturing process of the novel chip back through-silicon via structure that straight hole, hole wall smoothness are good and processing compatibility is good.
The object of the present invention is achieved like this: the present invention relates to a kind of manufacturing process of novel chip back through-silicon via structure, its technical process is as follows:
Step 1: get chip body and carrier with chip electrode, by the strong technique of closing, positive bonding with carrier and chip body;
Step 2: said structure is spun upside down 180 °, by reduction process, the thickness that the thinning back side of chip body is needed to subsequent technique;
Step 3: the method for passing through gluing or pad pasting at the back side of said chip body forms glue-line, and the method by exposure, development or laser beam drilling forms the glue-line opening again;
Step 4: by the method for dry etching, utilize the glue-line of above-mentioned formation glue-line opening as mask, go out the silicon through hole of straight hole shape at chip body back-etching;
Step 5: by burn into ashing or lithographic method, the glue-line in the above-mentioned steps is removed;
Step 6: again by the method for dry etching, make the straight hole shape silicon through hole in the step 4 form tubaeform poroid silicon through hole.
Dry etching is all carried out in the front and back that glue-line of the present invention is removed.
Thining method in the step 2 of the present invention is abrasive disc, liquid medicine corrosion or dry etching.
Carrier in the step 6 of the present invention keeps in subsequent technique or separates with the chip body.
The invention has the beneficial effects as follows:
(1) by the dry etching after removing photoresist, because the inner dry etching reaction in more past hole is more weak, form little, the smooth tubaeform silicon through hole of outer imperial palace, be conducive to metal filled carrying out in the subsequent openings.
(2) by the dry etching after removing photoresist, the hole wall of straight hole shape silicon through hole is subject to again etching, and it is coarse significantly to reduce the hole wall that causes in the straight hole etching process, forms smooth surface, has improved the smoothness of hole wall; Simultaneously, hole wall is subject to the additional radial etching, and the bottom side that the process of etching straight hole forms concaves (notch) and the hole wall ripple can be eliminated, and this has the formation of utilizing to cover complete insulating barrier.
Description of drawings
Fig. 1 is the SEM figure of the hole wall uniformity defect of the silicon through hole of employing " BOSCH " lithographic method shaping.
Fig. 2 is the SEM figure of indent (notch) defective of the silicon through hole of employing " BOSCH " lithographic method shaping.
Fig. 3 is the schematic diagram of a kind of novel chip back through-silicon via structure of the present invention.
Fig. 4～Figure 11 is the schematic diagram of the manufacturing process of a kind of novel chip back through-silicon via structure of the present invention.
Figure 12 is the SEM figure of manufacturing process of the present invention.
Among the figure:
Silicon through hole 101
Glue-line 4
Glue-line opening 401.
Embodiment
Referring to Fig. 3, a kind of novel chip back through-silicon via structure of the present invention, it comprises chip body 1 and is arranged on the chip electrode 2 in chip body 1 front, the back side of described chip body 1 arranges silicon through hole 101, described silicon through hole 101 is little tubaeform of outer imperial palace, and chip electrode 2 lower surfaces go directly in the bottom of silicon through hole 101.
The manufacturing process of a kind of novel chip back through-silicon via structure of the present invention, its technical process is as follows:
Step 1: get chip body 1 and carrier 3 with chip electrode 2, by the strong technique of closing, positive bonding with carrier 3 and chip body 1, owing to the difference of practical application, this bonding can be nonvolatil, become inalienable part after namely bonding; Also can be interim, namely carrier and wafer or chip body 1 be bonding just for the technique temporary needs, and final and chip wafer body 1 is separated; Adhering method can be that colloid is bonding, eutectic strongly closes, metal is strong closes or covalent bond is strong closes.Referring to Fig. 4 and Fig. 5.
Step 2: said structure is spun upside down 180 °, by reduction process, the thickness that the thinning back side of chip body 1 is needed to subsequent technique; Thining method is abrasive disc, liquid medicine corrosion or dry etching.Referring to Fig. 6.
Step 3: the method for passing through gluing or pad pasting at the back side of said chip body 1 forms glue-line 4, and the method by exposure, development or laser beam drilling forms glue-line opening 401 again.Referring to Fig. 7.
Step 4: by the method for dry etching, utilize the glue-line 4 of above-mentioned formation glue-line opening 401 as mask, go out the silicon through hole 101 of straight hole shape at chip body 1 back-etching; Referring to Fig. 8.
Step 5: by burn into ashing or lithographic method, the glue-line 4 in the above-mentioned steps is removed.Referring to Fig. 9.
Step 6: again by the method for dry etching, make the straight hole shape silicon through hole 101 in the step 4 form tubaeform poroid silicon through hole 101, and reduced the Hole Wall Roughness of silicon through hole 101, eliminated the side direction indent.Carrier 3 keeps in subsequent technique or separates with chip body 1.Referring to Figure 10 and Figure 11.
The SEM figure of the manufacturing process of a kind of novel chip back through-silicon via structure of the present invention is referring to Figure 12, silicon through hole 101 is the flared hole that outer imperial palace is little, the hole wall smoothness is good, the technical process of tubaeform silicon through hole 101 has been avoided the generation of hole wall uniformity defect and indent (notch) defective effectively, is conducive to cover in complete insulating barrier and the subsequent openings metal filled.
Claims (5)
1. the present invention relates to a kind of manufacturing process of novel chip back through-silicon via structure, its technical process is as follows:
Step 1: get chip body (1) and carrier (3) with chip electrode (2), by the strong technique of closing, positive bonding with carrier (3) and chip body (1);
Step 2: said structure is spun upside down 180 °, by reduction process, the thickness that the thinning back side of chip body (1) is needed to subsequent technique;
Step 3: the method for passing through gluing or pad pasting at the back side of said chip body (1) forms glue-line (4), and the method by exposure, development or laser beam drilling forms glue-line opening (401) again;
Step 4: by the method for dry etching, utilize the glue-line (4) of above-mentioned formation glue-line opening (401) as mask, go out the silicon through hole (101) of straight hole shape at chip body (1) back-etching;
Step 5: by burn into ashing or lithographic method, the glue-line in the above-mentioned steps (4) is removed;
Step 6: again by the method for dry etching, make the straight hole shape silicon through hole (101) in the step 4 form tubaeform poroid silicon through hole (101).
2. the manufacturing process of chip back through-silicon via structure according to claim 1 is characterized in that: dry etching is all carried out in the front and back that described glue-line (4) is removed.
3. the manufacturing process of chip back through-silicon via structure according to claim 1 is characterized in that: in step 2, thining method is abrasive disc, liquid medicine corrosion or dry etching.
4. the manufacturing process of chip back through-silicon via structure according to claim 1, it is characterized in that: in step 6, carrier (3) keeps in subsequent technique or separates with chip body (1).
5. the manufacturing process of chip back through-silicon via structure according to claim 1, it is characterized in that: in step 6, carrier (3) separates with chip body (1) in subsequent technique.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2012103859592A CN102903671A (en) | 2012-10-12 | 2012-10-12 | Method for forming novel chip back-side TSV (through silicon via) structure |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2012103859592A CN102903671A (en) | 2012-10-12 | 2012-10-12 | Method for forming novel chip back-side TSV (through silicon via) structure |
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| CN102903671A true CN102903671A (en) | 2013-01-30 |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103219304A (en) * | 2013-04-19 | 2013-07-24 | 昆山西钛微电子科技有限公司 | Semiconductor wafer level packaging structure and preparation method thereof |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR20000044926A (en) * | 1998-12-30 | 2000-07-15 | 김영환 | Method for forming via hole of semiconductor device |
| CN1241252C (en) * | 2002-04-24 | 2006-02-08 | 精工爱普生株式会社 | Semiconductor device and producing method thereof, circuit substrate and electronic instrument |
| CN101295665A (en) * | 2007-04-23 | 2008-10-29 | 中芯国际集成电路制造(上海)有限公司 | Horn shaped contact production method |
| US20110081784A1 (en) * | 2009-10-01 | 2011-04-07 | Sumitomo Electric Device Innovations, Inc. | Manufacturing method of semiconductor device |
-
2012
- 2012-10-12 CN CN2012103859592A patent/CN102903671A/en active Pending
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR20000044926A (en) * | 1998-12-30 | 2000-07-15 | 김영환 | Method for forming via hole of semiconductor device |
| CN1241252C (en) * | 2002-04-24 | 2006-02-08 | 精工爱普生株式会社 | Semiconductor device and producing method thereof, circuit substrate and electronic instrument |
| CN101295665A (en) * | 2007-04-23 | 2008-10-29 | 中芯国际集成电路制造(上海)有限公司 | Horn shaped contact production method |
| US20110081784A1 (en) * | 2009-10-01 | 2011-04-07 | Sumitomo Electric Device Innovations, Inc. | Manufacturing method of semiconductor device |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103219304A (en) * | 2013-04-19 | 2013-07-24 | 昆山西钛微电子科技有限公司 | Semiconductor wafer level packaging structure and preparation method thereof |
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Application publication date: 20130130 |