CN102867810B - Dual damascene structure with porous structure - Google Patents
Dual damascene structure with porous structure Download PDFInfo
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- CN102867810B CN102867810B CN201210343547.2A CN201210343547A CN102867810B CN 102867810 B CN102867810 B CN 102867810B CN 201210343547 A CN201210343547 A CN 201210343547A CN 102867810 B CN102867810 B CN 102867810B
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- insulation layer
- layer
- dielectric insulation
- dielectric
- dielectric constant
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- 230000009977 dual effect Effects 0.000 title abstract description 5
- 238000009413 insulation Methods 0.000 claims abstract description 40
- 230000004888 barrier function Effects 0.000 claims abstract description 18
- 239000002184 metal Substances 0.000 claims abstract description 18
- 229910052751 metal Inorganic materials 0.000 claims abstract description 18
- 238000005530 etching Methods 0.000 claims abstract description 15
- 235000015847 Hesperis matronalis Nutrition 0.000 claims description 15
- 240000004533 Hesperis matronalis Species 0.000 claims description 15
- 239000011248 coating agent Substances 0.000 claims description 12
- 238000000576 coating method Methods 0.000 claims description 12
- 239000000463 material Substances 0.000 claims description 11
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 6
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical group [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims description 3
- 229910052802 copper Inorganic materials 0.000 claims description 3
- 239000010949 copper Substances 0.000 claims description 3
- 235000012239 silicon dioxide Nutrition 0.000 claims description 3
- 239000000377 silicon dioxide Substances 0.000 claims description 3
- 230000000694 effects Effects 0.000 abstract description 5
- 230000009467 reduction Effects 0.000 abstract description 2
- 238000004519 manufacturing process Methods 0.000 abstract 1
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 description 2
- 229910052799 carbon Inorganic materials 0.000 description 2
- 230000006378 damage Effects 0.000 description 2
- 230000001627 detrimental effect Effects 0.000 description 2
- 230000007775 late Effects 0.000 description 2
- 238000000034 method Methods 0.000 description 2
- 238000001020 plasma etching Methods 0.000 description 2
- 230000008569 process Effects 0.000 description 2
- 239000004065 semiconductor Substances 0.000 description 2
- 208000027418 Wounds and injury Diseases 0.000 description 1
- 230000002411 adverse Effects 0.000 description 1
- 239000000956 alloy Substances 0.000 description 1
- 229910045601 alloy Inorganic materials 0.000 description 1
- 238000006243 chemical reaction Methods 0.000 description 1
- 238000001312 dry etching Methods 0.000 description 1
- 230000000977 initiatory effect Effects 0.000 description 1
- 208000014674 injury Diseases 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 230000007704 transition Effects 0.000 description 1
Landscapes
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
Abstract
The invention provides a dual damascene structure with a porous structure. The dual damascene structure comprises a metal interconnecting layer, an etching barrier layer, an oxide layer, a first dielectric insulation layer, a second dielectric insulation layer, a metal layer and holes, which are sequentially formed from bottom to top, wherein the hole is arranged between the metal interconnecting layer and the metal layer, the dielectric constant of the first dielectric insulation layer is 2.7-3.0, and the dielectric constant of the second dielectric insulation layer is 2.1-2.3. According to the invention, the first dielectric insulation layer with higher dielectric constant is used for replacing one part of second dielectric insulation layer with low dielectric constant, with same height as the holes, so that the taper effect of the holes is lowered, therefore the problems of hole height reduction and sharpening of the two holes are eliminated. The dual damascene structure has the advantages of simple structure, convenience for manufacture and lower cost, and can bring the convenience for improving the phenomenon of the taper holes.
Description
Technical field
The present invention relates to a kind of double damask structure, particularly relate to a kind of double damask structure with one times of design specification of loose structure.
Background technology
Along with semiconductor technology node process advances, the double damask structure of back segment 1XDD(mono-times of design specification) the K value of technological requirement insulating barrier is more and more lower, to reach good insulation effect, reduces late effect.As shown in Figure 1, wherein SC represents late effect, and A, B, C, D represent the material adopting K value more and more lower successively.
The double damask structure of 1XDD(mono-times of design specification of current industry 28nm) generally adopt ELK (extra-low dielectric constant, ultralow dielectric, as (carbonado) BD III, its K=2.2) improve the delay performance of chip.But in the one of 1XDD (AIO) etch process, because ULK(integrates porousness ultralow dielectric coefficient oxide layer materials) in containing a large amount of carbon doping and loose structure (Carbon doping and Porosity), plasma (Plasma) easily causes damage to ELK and reduces the good anisotropic feature of dry etching originally, particularly AIO etches after-stage in groove and hole (via) progradation, owing to there is no the stop of photoresistance around via in this stage, via top edge ELK is easy to be subject to the injury of plasma and produces bellmouth 11, as shown in Figure 2.
Due to the restriction (1XDD adopts 56nm/56nm structure) of 28nm design rule, this bellmouth directly causes diplopore (dual via) intermediate isolating district of place height to be lowered, and wedge angle is formed at top, does not meet the requirement electrically to hole high (via high).
Therefore, those skilled in the art is devoted to develop a kind of double damask structure with loose structure that can improve bellmouth structure.
Summary of the invention
In view of above-mentioned the problems of the prior art, technical problem to be solved by this invention is that the meeting of existing technology produces bellmouth.
A kind of double damask structure with loose structure provided by the invention, comprise formed successively from top to bottom metal interconnecting layer, etching barrier layer, oxide skin(coating), the first dielectric insulation layer, the second dielectric insulation layer, metal level and hole, described hole is located between described metal interconnecting layer and metal level, the dielectric constant of described first dielectric insulation layer is 2.7 ~ 3.0, and the dielectric constant of described second dielectric insulation layer is 2.1 ~ 2.3.
In a better embodiment of the present invention, the dielectric constant of described first dielectric insulation layer is 2.9.
In another better embodiment of the present invention, the dielectric constant of described second dielectric insulation layer is 2.2.
In another better embodiment of the present invention, the material of described first dielectric insulation layer is BD I, and the material of described second dielectric insulation layer is BD III.
In another better embodiment of the present invention, the height of described etching barrier layer is 150 ± 50, and the height of described oxide skin(coating) is 100 ± 50.
In another better embodiment of the present invention, the height of described first dielectric insulation layer is 400 ± 50.
In another better embodiment of the present invention, the height of described etching barrier layer, oxide skin(coating), the first dielectric insulation layer, the second dielectric insulation layer is respectively 150,100,400,800.
In another better embodiment of the present invention, the material of described metal interconnecting layer is copper, and described oxide skin(coating) is silicon dioxide layer.
The present invention is based on the characteristic that plasma etching is less to the insulating barrier detrimental effect that dielectric constant is higher, replace with the first dielectric insulation layer that dielectric constant is higher the taper effect reducing hole with the second dielectric insulation layer of the level a part of low-k in hole, thus the hole height eliminating diplopore reduces and sharpening problem.Structure of the present invention is simple, and easy to make, cost is lower, can improve the phenomenon of bellmouth very easily.
Accompanying drawing explanation
Fig. 1 is the graph of a relation between K value and SC;
Fig. 2 is the structural representation of the bellmouth that prior art is formed;
Fig. 3 is the structural representation of embodiments of the invention.
Embodiment
Below with reference to accompanying drawing, concrete explaination is done to the present invention.
The double damask structure with loose structure of embodiments of the invention as shown in Figure 3, comprise formed successively from top to bottom metal interconnecting layer 1, etching barrier layer 2, oxide skin(coating) 3, first dielectric insulation layer 4, second dielectric insulation layer 5, metal level 6 and hole 7.Hole 7 is located between metal interconnecting layer 1 and metal level 6.Hole 7 is formed by semiconductor technology.Wherein, the dielectric constant of the first dielectric insulation layer 4 is the dielectric constant of the 2.7 ~ 3.0, second dielectric insulation layer 5 is 2.1 ~ 2.3.
The present invention is based on the characteristic that plasma etching is less to the insulating barrier detrimental effect that dielectric constant is higher, replace with the first dielectric insulation layer that dielectric constant is higher the taper effect reducing hole with the second dielectric insulation layer of the level a part of low-k in hole, thus the hole height eliminating diplopore reduces and sharpening problem.Structure of the present invention is simple, and easy to make, cost is lower, can improve the phenomenon of bellmouth very easily.
As shown in Figure 3, in an embodiment of the present invention, preferably the material of the first dielectric insulation layer 4 is BD I, and dielectric constant is 2.9; And preferably the material of the second dielectric insulation layer 5 is BD III, dielectric constant is 2.2.
In addition, as shown in Figure 3, in an embodiment of the present invention, the material of preferable alloy interconnection layer is copper, and described oxide skin(coating) is silicon dioxide layer.Embodiments of the invention replace and the level a part of BD III in hole 7 owing to have employed BD I, etching has certain Selection radio to this bi-material, be equivalent at etching barrier layer 2(k=4.5) above added the material that one deck is equal to barrier function, this just creates condition for etching barrier layer 2 is thinning.The thickness of the initiation layer simultaneously on etching barrier layer 2 needed for face length BD I can have good adhesion and thinning because of BD I and etching barrier layer 2.Such reduction etching barrier layer 2(k=4.5) and BD I bottom the thickness of oxide skin(coating) (k=3.9) the transition zone k value that balances BD I raise the adverse effect brought.In an embodiment of the present invention, preferably under the height of the first dielectric insulation layer 4 and the second dielectric insulation layer 5 is 400 and 800 situations, the height of etching barrier layer 2 and oxide skin(coating) 3 is respectively 150 and 100.
Be described in detail specific embodiments of the invention above, but it is just as example, the present invention is not restricted to specific embodiment described above.To those skilled in the art, any equivalent modifications that the present invention is carried out and substituting also all among category of the present invention.Therefore, equalization conversion done without departing from the spirit and scope of the invention and amendment, all should contain within the scope of the invention.
Claims (7)
1. one kind has the double damask structure of loose structure, it is characterized in that, comprise formed successively from top to bottom metal interconnecting layer, etching barrier layer, oxide skin(coating), the first dielectric insulation layer, the second dielectric insulation layer, metal level and hole, described hole is located between described metal interconnecting layer and metal level, the dielectric constant of described first dielectric insulation layer is 2.7 ~ 3.0, and the dielectric constant of described second dielectric insulation layer is 2.1 ~ 2.3;
Wherein, described first dielectric insulation layer and described hole contour.
2. have the double damask structure of loose structure as claimed in claim 1, it is characterized in that, the dielectric constant of described first dielectric insulation layer is 2.9.
3. have the double damask structure of loose structure as claimed in claim 2, it is characterized in that, the dielectric constant of described second dielectric insulation layer is 2.2.
4. there is the double damask structure of loose structure as claimed in claim 1, it is characterized in that, the height of described etching barrier layer is 150 ±
the height of described oxide skin(coating) is 100 ±
5. there is the double damask structure of loose structure as claimed in claim 4, it is characterized in that, the height of described first dielectric insulation layer is 400 ±
6. have the double damask structure of loose structure as claimed in claim 5, it is characterized in that, the height of described etching barrier layer, oxide skin(coating), the first dielectric insulation layer, the second dielectric insulation layer is respectively
7. have the double damask structure of loose structure as claimed in claim 1, it is characterized in that, the material of described metal interconnecting layer is copper, and described oxide skin(coating) is silicon dioxide layer.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201210343547.2A CN102867810B (en) | 2012-09-17 | 2012-09-17 | Dual damascene structure with porous structure |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201210343547.2A CN102867810B (en) | 2012-09-17 | 2012-09-17 | Dual damascene structure with porous structure |
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| Publication Number | Publication Date |
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| CN102867810A CN102867810A (en) | 2013-01-09 |
| CN102867810B true CN102867810B (en) | 2015-06-03 |
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Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1492496A (en) * | 2002-10-24 | 2004-04-28 | 旺宏电子股份有限公司 | Process for forming multi-layer low dielectric constant dual damascene connection line |
| CN102386126A (en) * | 2010-09-03 | 2012-03-21 | 中芯国际集成电路制造(上海)有限公司 | Method for manufacturing structure of semiconductor device for forming structure of dual damascene |
| CN102420179A (en) * | 2011-09-15 | 2012-04-18 | 上海华力微电子有限公司 | Copper-interconnection production method for ultra-low dielectric constant film |
| CN102446822A (en) * | 2011-09-08 | 2012-05-09 | 上海华力微电子有限公司 | Integration method of dual Damascus |
| CN102446833A (en) * | 2011-09-29 | 2012-05-09 | 上海华力微电子有限公司 | A treatment method for reducing process particles of double damascene silicon nitride |
| CN102610563A (en) * | 2012-04-06 | 2012-07-25 | 上海集成电路研发中心有限公司 | Method for preparing copper dual damascene structure |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TW550642B (en) * | 2001-06-12 | 2003-09-01 | Toshiba Corp | Semiconductor device with multi-layer interconnect and method fabricating the same |
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2012
- 2012-09-17 CN CN201210343547.2A patent/CN102867810B/en active Active
Patent Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1492496A (en) * | 2002-10-24 | 2004-04-28 | 旺宏电子股份有限公司 | Process for forming multi-layer low dielectric constant dual damascene connection line |
| CN102386126A (en) * | 2010-09-03 | 2012-03-21 | 中芯国际集成电路制造(上海)有限公司 | Method for manufacturing structure of semiconductor device for forming structure of dual damascene |
| CN102446822A (en) * | 2011-09-08 | 2012-05-09 | 上海华力微电子有限公司 | Integration method of dual Damascus |
| CN102420179A (en) * | 2011-09-15 | 2012-04-18 | 上海华力微电子有限公司 | Copper-interconnection production method for ultra-low dielectric constant film |
| CN102446833A (en) * | 2011-09-29 | 2012-05-09 | 上海华力微电子有限公司 | A treatment method for reducing process particles of double damascene silicon nitride |
| CN102610563A (en) * | 2012-04-06 | 2012-07-25 | 上海集成电路研发中心有限公司 | Method for preparing copper dual damascene structure |
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| CN102867810A (en) | 2013-01-09 |
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