CN102811548A - Circuit structure and its manufacturing method - Google Patents

Abstract

The invention provides a circuit structure and a manufacturing method thereof, wherein the circuit structure comprises a substrate; a first conductive layer disposed on the substrate; an insulating layer disposed on the first conductive layer and covering the substrate; a negative photoresist layer disposed on the insulating layer and having a sidewall with a groove adjacent to the insulating layer; a compensation layer covering the negative photoresist layer and filling the groove; and a second conductive layer disposed on the compensation layer and extending to the insulating layer. The invention can improve the yield of the manufacturing process, effectively simplify the steps of the manufacturing process and reduce the manufacturing cost.

Description

Circuit structure and its manufacturing method

technical field

The present invention relates to electronic components, in particular to circuit structures and manufacturing methods thereof.

Background technique

With the vigorous development of the electronic industry, electronic products are gradually entering the research and development direction of multi-function and high performance. In order to reduce the volume of electronic products, a technology has been developed to form various passive components (such as resistors, capacitors, and inductors) directly on the circuit board by designing the circuit layout, to replace the traditional configuration of passive components on the circuit board. on technology.

Contents of the invention

The invention provides a circuit structure, comprising a substrate; a first conductive layer configured on the substrate; an insulating layer configured on the first conductive layer and covering the substrate; a negative photoresist layer configured on the on the insulating layer, and has a side wall, the side wall has a groove adjacent to the insulating layer; a compensation layer, covering the negative photoresist layer, and filling in the groove; and a second conductive layer, configured on the compensation layer and extend to the insulating layer.

According to the circuit structure of the present invention, the compensation layer is a positive photoresist layer.

In the circuit structure of the present invention, the compensation layer has a side portion, the side portion covers the side wall of the negative photoresist layer, and the side portion gradually faces a direction away from the insulating layer. shrink.

In the circuit structure of the present invention, the compensation layer has a side portion covering the side wall of the negative photoresist layer, and the roughness of the side wall of the negative photoresist layer is greater than The roughness of the surface of the side portion.

In the circuit structure of the present invention, the surface of the side portion is a smooth curved surface or a smooth plane.

According to the circuit structure of the present invention, a filling portion of the compensation layer that fills the groove is located between the negative photoresist layer and the insulating layer.

In the circuit structure of the present invention, the filling portion directly contacts the insulating layer.

The invention provides a method for manufacturing a circuit structure, which includes forming a first conductive layer on a substrate; forming an insulating layer on the first conductive layer, and the insulating layer covers the substrate; forming a negative photosensitive layer on the insulating layer. The resist layer, the negative photoresist layer has a side wall, and the side wall has a groove adjacent to the insulating layer; a compensation layer covering the negative photoresist layer is formed, and the compensation layer is filled into and forming a second conductive layer on the compensation layer, and the second conductive layer extends to the insulating layer.

In the manufacturing method of the circuit structure described in the present invention, the step of forming the negative photoresist layer includes: forming a negative photoresist material layer on the insulating layer; A photolithography process is performed on the resist material layer to pattern the negative photoresist material layer.

In the manufacturing method of the circuit structure described in the present invention, the material of the compensation layer includes a positive photoresist material.

In the manufacturing method of the circuit structure according to the present invention, the step of forming the compensation layer includes: forming a liquid positive photoresist material on the insulating layer, and filling the liquid positive photoresist material into the groove; the liquid positive photoresist material is subjected to a baking process to form a positive photoresist material layer, and the positive photoresist material layer covers the Negative photoresist layer; and performing a photolithography process on the positive photoresist material layer to remove the positive photoresist material layer that does not cover the negative photoresist part of the agent layer.

In the manufacturing method of the circuit structure according to the present invention, the negative photoresist layer and the compensation layer are respectively prepared by a first exposure and development process and a second exposure and development process, and the first exposure and development process and the The mask patterns of the second exposure and development process are substantially complementary.

In the manufacturing method of the circuit structure described in the present invention, the forming method of the second conductive layer includes sputtering.

In the manufacturing method of the circuit structure of the present invention, the compensation layer has a side portion, the side portion covers the side wall of the negative photoresist layer, and the side portion faces a side far away from the insulating layer direction tapers.

In the manufacturing method of the circuit structure of the present invention, the compensation layer has a side portion covering the side wall of the negative photoresist layer, and the side wall of the negative photoresist layer The roughness is greater than that of the surface of the side portion.

In the manufacturing method of the circuit structure of the present invention, a filling portion of the compensation layer that fills the groove is located between the negative photoresist layer and the insulating layer.

The invention can improve the process yield, and can effectively simplify the process steps and reduce the production cost.

Description of drawings

1A to 1B are cross-sectional views of a manufacturing process of a circuit structure known to the applicant.

FIG. 2A to FIG. 2F are cross-sectional diagrams illustrating the manufacturing process of the circuit structure according to an embodiment of the present invention.

FIG. 3 is a cross-sectional view of a circuit structure according to an embodiment of the present invention.

A brief description of the symbols in the drawings is as follows:

110: circuit substrate; 120: patterned negative photoresist material layer; 122, 242: sidewall; 124, 244: groove; 130: circuit layer; 210: substrate; 220, 260: conductive layer; 230 : insulating layer; 240a: negative photoresist material layer; 240: negative photoresist layer; 250a: positive photoresist material layer; 250: compensation layer; 252: filling part; 254: side portion; 254a: surface; A: direction; C: capacitive element; I: interface; M1: first mask; M2: second mask; T: thickness.

Detailed ways

The fabrication and use of the embodiments of the present invention will be described in detail below. It should be noted, however, that the present invention provides many applicable inventive concepts, which can be embodied in a wide variety of specific forms. The specific embodiments discussed herein are merely specific ways to make and use the invention, and do not limit the scope of the invention. Furthermore, repeated reference numerals or designations may be used in different embodiments. These repetitions are only for the purpose of simply and clearly describing the present invention, and do not mean that there must be any relationship between the different embodiments and/or structures discussed. Furthermore, when it is mentioned that a first material layer is located on or above a second material layer, it includes the situation that the first material layer is in direct contact with the second material layer or is separated by one or more other material layers.

An embodiment of the present invention provides a circuit structure and its manufacturing process, and the circuit structure can be used in a chip package. In the embodiment of the chip package of the present invention, it can be applied to various electronic components including integrated circuits such as active or passive elements, digital circuits or analog circuits (digital or analog circuits) ( electronic components), such as those related to optoelectronic devices (opto electronic devices), micro electromechanical systems (Micro ElectroMechanical System; MEMS), micro fluidic systems (micro fluidic systems), or physical senses measured by changes in physical quantities such as heat, light, and pressure. Detector (Physical Sensor). In particular, wafer-level packaging (waferscale package; WSP) process can be used for image sensor components, light-emitting diodes (light-emitting diodes; LEDs), solar cells (solar cells), radio frequency components (RF circuits), accelerometers ( accelerators), gyroscopes, micro actuators, surface acoustic wave devices, process sensors, ink printer heads, or power ICs, etc. Semiconductor wafers are packaged.

The above-mentioned wafer-level packaging process mainly refers to that after the packaging step is completed at the wafer stage, it is cut into independent packages. However, in a specific embodiment, for example, the separated semiconductor chips are redistributed on a carrier chip. On the wafer, the packaging process is carried out, which can also be called wafer-level packaging process. In addition, the above wafer level packaging process is also applicable to arranging multiple wafers with integrated circuits in a stacked manner to form a chip package of multi-layer integrated circuit devices.

1A to 1B are cross-sectional views of a manufacturing process of a circuit structure known to the applicant. Referring to FIG. 1A, a negative photoresist material layer (not shown) is fully formed on a circuit substrate 110, and an exposure and development process is performed on the negative photoresist material layer to form a pattern. Thinning the negative photoresist material layer 120.

It is worth noting that the negative-type photoresist material has the characteristic of hardening after a cross-linking reaction after being irradiated. Except for the parts not exposed to light.

However, in the process of optical exposure, since the portion of the illuminated portion adjacent to the circuit substrate 110 receives less energy, it is easy to have incomplete curing, so that after the developing process, the formed pattern The portion of the negative photoresist material layer 120 adjacent to the circuit substrate 110 is easily over-developed to produce grooves 124 such as undercuts on the sidewall 122 .

After that, referring to FIG. 1B , a circuit layer 130 is deposited on the patterned negative photoresist material layer 120 . Since the groove 124 is formed on the sidewall 122 , the circuit layer 130 deposited on the sidewall 122 is easily broken near the groove 124 , resulting in low process yield.

FIG. 2A to FIG. 2F are cross-sectional diagrams illustrating the manufacturing process of the circuit structure according to an embodiment of the present invention. Referring to FIG. 2A , a conductive layer 220 is formed on a substrate 210 . The substrate 210 can be a semiconductor substrate (such as a silicon substrate) or a printed circuit board. The conductive layer 220 can be a capacitor electrode or a circuit layer, and its material can be metal (such as aluminum) or other suitable conductive materials. Next, an insulating layer 230 can be formed on the conductive layer 220 , and the insulating layer 230 covers the substrate 210 . The material of the insulating layer 230 is, for example, oxide (such as silicon dioxide), and the forming method of the insulating layer 230 is, for example, chemical vapor deposition.

Then, please refer to FIG. 2B. In one embodiment, a negative photoresist material layer 240a may be formed on the insulating layer 230, wherein the method of forming the negative photoresist material layer 240a includes coating, Such as dip coating, roller coating or spin coating. The material of the negative photoresist material layer 240a can be various commercial negative photoresist materials. Then, an exposure process is performed on the negative photoresist material layer 240a by using a first photomask M1 to cure the negative photoresist material layer 240a in the illuminated part.

Afterwards, referring to FIG. 2C , a developing process is performed to remove the non-irradiated part of the negative photoresist material layer 240a to form a negative photoresist layer 240, wherein the negative photoresist The etchant layer 240 has a sidewall 242 , and the sidewall 242 has a groove 244 adjacent to the insulating layer 230 . FIG. 2C shows an undercut groove as an example for illustration, but not limited thereto.

Next, referring to FIG. 2E , a compensation layer 250 covering the negative photoresist layer 240 is formed, and the compensation layer 250 is filled into the groove 244 . Since there are many methods for forming the compensation layer 250 , one of the methods will be described in detail below, but it is not intended to limit the present invention.

First, please refer to FIG. 2D , a liquid positive photoresist material (not shown) is formed on the insulating layer 230 , and the liquid positive photoresist material is filled into the groove 244 . The method of forming a liquid positive photoresist material is, for example, a spin coating method, a dipping method, or a spraying method.

Then, a baking process (soft baking, soft-bake) is performed on the liquid positive photoresist material to form a positive photoresist material layer 250a, and the positive photoresist material Layer 250a covers negative tone photoresist layer 240 . The material of the positive photoresist material layer 250a can be various commercial positive photoresist materials.

Afterwards, an exposure process is performed on the positive photoresist material layer 250a through a second photomask M2, wherein the mask pattern of the second photomask M2 is roughly similar to the pattern of the negative photoresist layer 240, And in the exposure process, the second photomask M2 shields the positive photoresist material layer 250 a on the negative photoresist layer 240 .

Then, referring to FIG. 2E , a developing process is performed to remove the portion of the positive photoresist material layer 250a that does not cover the negative photoresist layer 240 (that is, the positive photoresist material the illuminated portion of layer 250a).

It should be noted that in this embodiment, the positive photoresist material is used as the compensation layer 250 covering the negative photoresist layer 240, because the positive photoresist material and the negative photoresist The reaction of the photoresist material to light is opposite (the positive photoresist material is dissociated after irradiation, and the negative photoresist material is crosslinked after irradiation), so it is used to form a negative photoresist layer The photomask patterns of the first photomask M1 and the second photomask M2 of the compensation layer 240 and the compensation layer 250 are substantially complementary.

In addition, when the positive photoresist material is used as the compensation layer 250 , only a photolithography process is required to form the compensation layer 250 without an additional etching process, so the process steps can be effectively simplified and the production cost can be reduced.

In addition, in other embodiments, the material of the compensation layer 250 can be an insulating material of other non-positive photoresist materials, such as a polymer material, and the manufacturing method can be to first form the polymer material on the insulating layer 230 to form a polymer material layer, and then, form a photoresist layer on the polymer material layer, and pattern the photoresist layer, and then use the patterned photoresist The layer is an etching mask, the polymer material layer is etched, and then the patterned photoresist layer is removed.

Then, referring to FIG. 2F , a conductive layer 260 is formed on the compensation layer 250 , and the conductive layer 260 extends to the insulating layer 230 . The conductive layer 260 can be a capacitor electrode or a circuit layer. The material of the conductive layer 260 is, for example, metal, such as aluminum. The formation method of the conductive layer 260 is, for example, sputtering or other suitable metal plating processes.

The circuit structure 200 in FIG. 2F will be described in detail below for the structural part.

Referring to FIG. 2F , the circuit structure 200 of this embodiment includes a substrate 210 , a conductive layer 220 , an insulating layer 230 , a negative photoresist layer 240 , a compensation layer 250 and a conductive layer 260 .

The conductive layer 220 is disposed on the substrate 210 . The insulating layer 230 is disposed on the conductive layer 220 and covers the substrate 210 . The negative photoresist layer 240 is disposed on the insulating layer 230 and has a sidewall 242 , and the sidewall 242 has a groove 244 adjacent to the insulating layer 230 .

The compensation layer 250 covers the negative photoresist layer 240 and fills in the groove 244, wherein the material of the compensation layer 250 is, for example, a positive photoresist material, or other materials suitable for filling the negative photoresist layer. The insulating material of the groove 244 of the resist layer 240 , such as polymer material. The conductive layer 260 is disposed on the compensation layer 250 and extends to the insulating layer 230 .

In one embodiment, the groove 244 is located at the interface I between the negative photoresist layer 240 and the insulating layer 230, and a filling portion 252 of the compensation layer 250 filled in the groove 244 is located at the negative photoresist layer 240. Between the etchant layer 240 and the insulating layer 230 , at this time, the filling portion 252 directly contacts the insulating layer 230 .

Here, the position of the groove 244 is only for illustration, and the position of the groove 244 can be formed in different positions according to different process conditions. 3 is a cross-sectional view of a circuit structure with non-undercut grooves according to another embodiment of the present invention. For example, as shown in FIG. 3 , the groove 244 may also be formed on a portion of the negative photoresist layer 240 close to the insulating layer 230 , with a distance from the insulating layer 230 .

Please refer to FIG. 2F again, in one embodiment, the compensation layer 250 has a side portion 254, the side portion 254 covers the side wall 242 of the negative photoresist layer 240, and the side portion 254 faces a distance away from the insulating layer. The direction A of layer 230 tapers. Specifically, the thickness T of the side portion 254 covering the sidewall 242 decreases toward the direction A away from the insulating layer 230 , and presents a shape with a wide bottom and a narrow top.

It should be noted that the compensation layer of the present invention can not only avoid circuit breaks in the circuit layer, but also improve the uniformity of the circuit layer. In one embodiment, the roughness of the sidewall 242 of the negative photoresist layer 240 is greater than the roughness of the surface 254a of the side portion 254, and the surface 254a of the side portion 254 is, for example, a smooth curved surface (eg convex) or a smooth plane. It is worth noting that since the compensation layer 250 can cover the rough sidewall 242 of the negative photoresist layer 240 to form a smooth surface 254a, the process yield of the circuit layer formed on the surface 254a can be effectively improved.

In one embodiment, the negative photoresist layer 240 and the compensation layer 250 are located between the conductive layer 220 and the conductive layer 260 to form a conductive layer 220, the conductive layer 260, the negative photoresist layer 240 and the compensation layer 250 constitute the capacitive element C.

To sum up, the present invention covers a compensation layer on the negative photoresist with grooves on one sidewall to fill up the grooves, which helps to improve the process yield of the subsequent conductive layer. Furthermore, the present invention can use a positive photoresist material as the compensation layer. In this way, only the photolithography process is required to form the compensation layer, which can effectively simplify the process steps and reduce the production cost.

The above description is only a preferred embodiment of the present invention, but it is not intended to limit the scope of the present invention. Any person familiar with this technology can make further improvements on this basis without departing from the spirit and scope of the present invention. Improvements and changes, so the protection scope of the present invention should be defined by the claims of the present application.

Claims (16)

1. A line structure, characterized in that, comprising: a substrate; a first conductive layer configured on the substrate; an insulating layer, configured on the first conductive layer and covering the substrate; A negative photoresist layer is disposed on the insulating layer and has a side wall, and the side wall has a groove adjacent to the insulating layer; a compensation layer covering the negative photoresist layer and filling in the groove; and A second conductive layer is arranged on the compensation layer and extends to the insulating layer. 2. The circuit structure according to claim 1, wherein the compensation layer is a positive photoresist layer. 3. The circuit structure according to claim 1, wherein the compensation layer has a side portion, the side portion covers the sidewall of the negative photoresist layer, and the side portion faces - taper away from the insulating layer. 4. The wiring structure according to claim 1, wherein the compensation layer has a side portion covering the sidewall of the negative photoresist layer, and the negative photoresist layer The roughness of the side wall is greater than the roughness of the surface of the side portion. 5. The circuit structure according to claim 4, wherein the surface of the side portion is a smooth curved surface or a smooth plane. 6 . The circuit structure according to claim 1 , wherein a filling portion of the compensation layer filling the groove is located between the negative photoresist layer and the insulating layer. 7. The circuit structure according to claim 6, wherein the filling portion directly contacts the insulating layer. 8. A method for making a circuit structure, comprising: forming a first conductive layer on a substrate; forming an insulating layer on the first conductive layer, and the insulating layer covers the substrate; forming a negative photoresist layer on the insulating layer, the negative photoresist layer has a sidewall, and the sidewall has a groove adjacent to the insulating layer; forming a compensation layer covering the negative photoresist layer, and filling the compensation layer into the groove; and A second conductive layer is formed on the compensation layer, and the second conductive layer extends to the insulating layer. 9. The manufacturing method of circuit structure according to claim 8, is characterized in that, the forming step of this negative photoresist layer comprises: forming a negative photoresist material layer on the insulating layer; and A photolithography process is performed on the negative photoresist material layer to pattern the negative photoresist material layer. 10 . The method for fabricating the circuit structure according to claim 8 , wherein the material of the compensation layer comprises a positive photoresist material. 11 . 11. The manufacturing method of the circuit structure according to claim 10, characterized in that, the step of forming the compensation layer comprises: forming a liquid positive photoresist material on the insulating layer, and filling the groove with the liquid positive photoresist material; performing a baking process on the liquid positive photoresist material to form a positive photoresist material layer, and the positive photoresist material layer covers the negative photoresist agent layer; and A photolithography process is performed on the positive photoresist material layer to remove the portion of the positive photoresist material layer that does not cover the negative photoresist layer. 12. The manufacturing method of the circuit structure according to claim 10, wherein the negative photoresist layer and the compensation layer are respectively prepared by a first exposure and development process and a second exposure and development process, And the mask patterns of the first exposure and development process and the second exposure and development process are substantially complementary. 13. The manufacturing method of the wiring structure according to claim 8, wherein the forming method of the second conductive layer comprises sputtering. 14. The manufacturing method of the circuit structure according to claim 8, wherein the compensation layer has a side portion, the side portion covers the side wall of the negative photoresist layer, and the side portion The edge portion tapers toward a direction away from the insulating layer. 15. The manufacturing method of the circuit structure according to claim 8, wherein the compensation layer has a side portion covering the sidewall of the negative photoresist layer, and the negative photoresist The roughness of the sidewall of the etchant layer is greater than the surface roughness of the side portion. 16. The manufacturing method of the circuit structure according to claim 8, characterized in that, a filling portion of the compensation layer filling the groove is located between the negative photoresist layer and the insulating layer .

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