CN102778912A - Startup circuit and power supply system integrated with same - Google Patents
Startup circuit and power supply system integrated with same Download PDFInfo
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Abstract
Description
技术领域 technical field
本发明属于电源技术领域,具体涉及一种适用于高压应用的自启动内部供电系统的设计。The invention belongs to the technical field of power supplies, and in particular relates to the design of a self-starting internal power supply system suitable for high-voltage applications.
背景技术 Background technique
所有芯片都存在上电过程,所以在芯片设计中都不可避免的要对芯片的上电过程进行设计,恰当的设计能够提高芯片的性能、降低芯片的成本。传统的芯片上电过程为,外部电源电压Vin直接给基准模块供电,等基准建立完成后再建立芯片内部供电电源,最后芯片能够正常动作。这种上电过程在高压应用中,存在两个严重的缺陷:①由于基准的电源是外部电源电压,所以基准部分要使用大量的耐压器件,增加了芯片的面积;②高压下器件存在严重的漏电流,所以高压供电的基准存在严重的温漂,这样将导致芯片内部的参考电压随温度存在严重的漂移。因此,采用传统的上电过程的高压应用芯片,往往需要在芯片内部再额外增加一个低压高精度基准源,从而满足内部精确控制的需求,这将进一步增加了芯片的功耗与面积。All chips have a power-on process, so it is inevitable to design the power-on process of the chip in chip design. Proper design can improve the performance of the chip and reduce the cost of the chip. The traditional chip power-on process is that the external power supply voltage Vin directly supplies power to the reference module, and then the internal power supply of the chip is established after the reference is established, and finally the chip can operate normally. This power-on process has two serious defects in high-voltage applications: ①Because the reference power supply is an external power supply voltage, a large number of withstand voltage devices are used in the reference part, which increases the chip area; Therefore, the reference voltage of the high-voltage power supply has serious temperature drift, which will cause serious drift of the reference voltage inside the chip with temperature. Therefore, a high-voltage application chip using the traditional power-on process often needs to add an additional low-voltage high-precision reference source inside the chip to meet the needs of internal precise control, which will further increase the power consumption and area of the chip.
发明内容 Contents of the invention
本发明的目的是为了解决现有的用于高压应用的自启动内部供电系统存在的上述问题,提出了一种启动电路。The purpose of the present invention is to solve the above-mentioned problems in the existing self-starting internal power supply system for high-voltage applications, and propose a starting circuit.
本发明的技术方案为:一种启动电路,包括:第一PMOS管、第二PMOS管、第三PMOS管、第四PMOS管、第五PMOS管、第一NMOS管、第二NMOS管、第三NMOS管、一反相器、一电容单元、一电阻单元、一稳压单元,其中,第二NMOS管的栅端和反相器的输入端相连并作为所述启动电路的输入端,反相器的输出端连接到第一NMOS管的栅端,第一NMOS管、第二NMOS管、第三NMOS管的源端和衬底都连接到地,第一PMOS管的栅端、第二PMOS管MOS管的漏端、第二NMOS管的漏端、电容单元的第一端子、第三NMOS管的栅端、第四PMOS管的栅端连接在一起,电容单元的第二端子与电源电压相连接,第一PMOS管的漏端和第二PMOS管的栅端连接到第一NMOS管的漏端,第一PMOS管、第二PMOS管、第四PMOS管的源端和衬底连接到电源电压,第四PMOS管漏端和第三NMOS管MN3的漏端、第三PMOS管、第五PMOS管的栅端连接在一起,第三PMOS管的衬底和第五PMOS管的衬底连接到电源电压、电阻单元连接在第三PMOS管的源端和电源电压之间,第三PMOS管的漏端和第五PMOS管的源端连接到稳压单元的第一端子、稳压单元的第二端子连接到地,第五PMOS管的漏端作为所述启动电路的输出端。The technical solution of the present invention is: a start-up circuit, comprising: a first PMOS transistor, a second PMOS transistor, a third PMOS transistor, a fourth PMOS transistor, a fifth PMOS transistor, a first NMOS transistor, a second NMOS transistor, a Three NMOS transistors, an inverter, a capacitor unit, a resistor unit, and a voltage stabilizing unit, wherein the gate terminal of the second NMOS transistor is connected to the input terminal of the inverter and used as the input terminal of the start-up circuit, and the inverter The output terminal of the phase device is connected to the gate terminal of the first NMOS transistor, the source terminal and the substrate of the first NMOS transistor, the second NMOS transistor, and the third NMOS transistor are all connected to the ground, the gate terminal of the first PMOS transistor, the second The drain end of the PMOS transistor MOS transistor, the drain end of the second NMOS transistor, the first terminal of the capacitor unit, the gate end of the third NMOS transistor, and the gate end of the fourth PMOS transistor are connected together, and the second terminal of the capacitor unit is connected to the power supply The voltages are connected, the drain terminal of the first PMOS transistor and the gate terminal of the second PMOS transistor are connected to the drain terminal of the first NMOS transistor, and the source terminals of the first PMOS transistor, the second PMOS transistor, and the fourth PMOS transistor are connected to the substrate To the power supply voltage, the drain end of the fourth PMOS transistor and the drain end of the third NMOS transistor MN3, the gate end of the third PMOS transistor and the fifth PMOS transistor are connected together, the substrate of the third PMOS transistor and the substrate of the fifth PMOS transistor The bottom is connected to the power supply voltage, the resistance unit is connected between the source terminal of the third PMOS transistor and the power supply voltage, the drain terminal of the third PMOS transistor and the source terminal of the fifth PMOS transistor are connected to the first terminal of the voltage stabilizing unit, the voltage stabilizing unit The second terminal of the unit is connected to the ground, and the drain terminal of the fifth PMOS transistor is used as the output terminal of the start-up circuit.
基于上述启动电路,本发明还提出了一种适用于高压应用的自启动内部供电系统,还包括:基准电压源、LDO、比较电路、一二极管和一开关装置,其中,启动电路的输出端与基准电压源的启动输入端和二极管的负向端相连,基准电压源为LDO提供基准源,LDO的输出端作为所述供电系统的输出端,比较电路的两个输入端用于输入基准电压源产生的基准源和LDO的输出电压,比较电路的输出端与启动电路的输入端及开关装置的控制端相连,开关装置的第一端子和第二端子分别接二极管的正向端和LDO的输出端。Based on the above starting circuit, the present invention also proposes a self-starting internal power supply system suitable for high-voltage applications, which also includes: a reference voltage source, an LDO, a comparison circuit, a diode and a switching device, wherein the output terminal of the starting circuit is connected to the The starting input terminal of the reference voltage source is connected to the negative terminal of the diode, the reference voltage source provides the reference source for the LDO, the output terminal of the LDO is used as the output terminal of the power supply system, and the two input terminals of the comparison circuit are used to input the reference voltage source The generated reference source and the output voltage of the LDO, the output terminal of the comparison circuit is connected to the input terminal of the start-up circuit and the control terminal of the switch device, and the first terminal and the second terminal of the switch device are respectively connected to the forward terminal of the diode and the output of the LDO end.
本发明的有益效果:本发明的启动电路在系统上电时产生一个低压的电源给系统内部的基准电压源,从而避免基准电压源采用高压器件,并且该启动电路相对传统启动电路最大的特点是,系统正常工作后,启动电路能够完全关闭,不消耗额外的功耗;集成了本发明的启动电路的供电系统使得芯片内部的基准电压源供电电压始终是低压,这样在芯片内部只需要构建一个高精度的低压基准源,所以采用本发明提供的供电系统的高压应用能够减少高压器件使用,减少芯片的面积,进而降低芯片的成本。此外由于本发明的供电系统,最终将基准电压源的供电电源切为芯片的内部电源,这样能够极大的提高基准的PSRR。Beneficial effects of the present invention: the start-up circuit of the present invention generates a low-voltage power supply to the reference voltage source inside the system when the system is powered on, thereby avoiding the use of high-voltage devices for the reference voltage source, and the biggest feature of the start-up circuit compared with the traditional start-up circuit is , after the system works normally, the start-up circuit can be completely closed without consuming extra power consumption; the power supply system integrating the start-up circuit of the present invention makes the reference voltage source supply voltage inside the chip always low voltage, so that only a High-precision low-voltage reference source, so the high-voltage application of the power supply system provided by the present invention can reduce the use of high-voltage devices, reduce the area of the chip, and further reduce the cost of the chip. In addition, due to the power supply system of the present invention, the power supply of the reference voltage source is finally switched to the internal power supply of the chip, which can greatly improve the PSRR of the reference.
附图说明 Description of drawings
图1为本发明提出的启动电路的结构示意图。FIG. 1 is a schematic structural diagram of the starting circuit proposed by the present invention.
图2为集成了启动电路的适用于高压应用的自启动内部供电系统的结构示意图。Fig. 2 is a schematic structural diagram of a self-starting internal power supply system suitable for high-voltage applications integrated with a start-up circuit.
图3为实施例中电源电压为5V时供电系统的上电过程示意图。FIG. 3 is a schematic diagram of the power-on process of the power supply system in the embodiment when the power supply voltage is 5V.
图4为实施例中电源电压为16V时供电系统的上电过程示意图。Fig. 4 is a schematic diagram of the power-on process of the power supply system in the embodiment when the power supply voltage is 16V.
具体实施方式 Detailed ways
下面结合附图和具体实施例对本发明做进一步的说明。The present invention will be further described below in conjunction with the accompanying drawings and specific embodiments.
本发明的启动电路如图1所示,包括PMOS管MP1、MP2、MP3、MP4、MP5、NMOS管MN1、MN2、MN3、一个反相器INV1、电容单元、一个电阻单元R1、稳压单元,具体连接关系如下:NMOS管MN2的栅端和反相器INV1的输入端相连并作为所述启动电路的输入端,反相器INV1的输出端连接到NMOS管MN1的栅端、NMOS管MN1、MN2、MN3的源端和衬底都连接到地,PMOS管MP1的栅端、MOS管MP2的漏端、NMOS管MN2的漏端、电容单元的第一端子、MN3的栅端、MP4的栅端连接在一起,电容单元的第二端子与电源电压Vin相连接,PMOS管MP1的漏端和PMOS管MP2的栅端连接到NMOS管MN1的漏端、PMOS管MP1、MP2、MP4的源端和衬底连接到电源电压Vin,PMOS管MP4漏端和NMOS管MN3的漏端、PMOS管MP3、PMOS管MP5的栅端连接在一起,PMOS管MP3的衬底和MP5的衬底连接到电源电压Vin、电阻单元R1连接在PMOS管MP3的源端和电源电压Vin之间,PMOS管MP3的漏端和PMOS管MP5的源端连接到稳压单元的第一端子、稳压单元的第二端子连接到地,PMOS管MP5的漏端作为所述启动电路的输出端。The start-up circuit of the present invention is shown in Figure 1, comprises PMOS tube MP1, MP2, MP3, MP4, MP5, NMOS tube MN1, MN2, MN3, an inverter INV1, a capacitance unit, a resistance unit R1, a voltage stabilizing unit, The specific connection relationship is as follows: the gate terminal of the NMOS transistor MN2 is connected to the input terminal of the inverter INV1 and used as the input terminal of the startup circuit, the output terminal of the inverter INV1 is connected to the gate terminal of the NMOS transistor MN1, the NMOS transistor MN1, The source terminals and substrates of MN2 and MN3 are connected to ground, the gate terminal of PMOS transistor MP1, the drain terminal of MOS transistor MP2, the drain terminal of NMOS transistor MN2, the first terminal of the capacitor unit, the gate terminal of MN3, and the gate terminal of MP4 The terminals are connected together, the second terminal of the capacitor unit is connected to the power supply voltage Vin, the drain terminal of the PMOS transistor MP1 and the gate terminal of the PMOS transistor MP2 are connected to the drain terminal of the NMOS transistor MN1, and the source terminals of the PMOS transistors MP1, MP2, and MP4 The substrate is connected to the power supply voltage Vin, the drain end of the PMOS transistor MP4 and the drain end of the NMOS transistor MN3, the gate ends of the PMOS transistor MP3, and the PMOS transistor MP5 are connected together, and the substrate of the PMOS transistor MP3 and the substrate of MP5 are connected to the power supply The voltage Vin and the resistance unit R1 are connected between the source end of the PMOS transistor MP3 and the power supply voltage Vin, and the drain end of the PMOS transistor MP3 and the source end of the PMOS transistor MP5 are connected to the first terminal of the voltage stabilizing unit and the second terminal of the voltage stabilizing unit. The terminal is connected to the ground, and the drain end of the PMOS transistor MP5 is used as the output end of the start-up circuit.
如图1所示,这里的电容单元具体为MOS电容,图1中,MOS电容具体通过PMOS管MP6来实现,其中,MP6的栅端作为所述电容单元的第一端子,MP6的源端和漏断连接在一起,作为所述电容单元的第二端子。As shown in Figure 1, the capacitor unit here is specifically a MOS capacitor. In Figure 1, the MOS capacitor is specifically realized by a PMOS transistor MP6, wherein the gate terminal of MP6 is used as the first terminal of the capacitor unit, and the source terminal of MP6 and The drains are connected together as the second terminals of the capacitor units.
如图1所示,这里的稳压单元具体为一齐纳二极管D1,齐纳二极管的负向端作为所述稳压单元的第一端子,齐纳二极管的正向端作为所述稳压单元的第二端子。As shown in Figure 1, the voltage stabilizing unit here is specifically a Zener diode D1, the negative terminal of the Zener diode is used as the first terminal of the voltage stabilizing unit, and the positive terminal of the Zener diode is used as the first terminal of the voltage stabilizing unit. second terminal.
启动电路的在系统上电时由本模块产生一个低压的电源VL71,提供给基准模块,其中,NMOS管MN1、MN2、PMOS管MP1、MP2和反相器INV1组成Level Shift结构,将输入的低压逻辑信号L70,转变为到电源电压Vin的高压逻辑信号VA,即图1中A点的电压,使芯片正常启动后启动电路能够正常的关闭。In the start-up circuit, when the system is powered on, this module generates a low-voltage power supply V L71 and provides it to the reference module. Among them, NMOS transistors MN1, MN2, PMOS transistors MP1, MP2 and inverter INV1 form a Level Shift structure, and the input low-voltage The logic signal L70 is transformed into a high-voltage logic signal V A to the power supply voltage Vin, that is, the voltage at point A in FIG. 1 , so that the startup circuit can be shut down normally after the chip starts up normally.
适用于高压应用的自启动内部供电系统的原理框图如图2所示,还包括:基准电压源、LDO、比较电路、一二极管和一开关装置,其中,启动电路的输出端与基准电压源的启动输入端和二极管的负向端相连,基准电压源为LDO提供基准源,LDO的输出端作为所述供电系统的输出端,比较电路的两个输入端用于输入基准电压源产生的基准源和LDO的输出电压,比较电路的输出端与启动电路的输入端及开关装置的控制端相连,开关装置的第一端子和第二端子分别接二极管的正向端和LDO的输出端。The functional block diagram of the self-starting internal power supply system suitable for high-voltage applications is shown in Figure 2, which also includes: a reference voltage source, LDO, a comparison circuit, a diode and a switching device, wherein the output terminal of the start-up circuit is connected to the reference voltage source The starting input terminal is connected to the negative terminal of the diode, the reference voltage source provides the reference source for the LDO, the output terminal of the LDO is used as the output terminal of the power supply system, and the two input terminals of the comparison circuit are used to input the reference source generated by the reference voltage source and the output voltage of the LDO, the output terminal of the comparison circuit is connected with the input terminal of the starting circuit and the control terminal of the switch device, and the first terminal and the second terminal of the switch device are respectively connected with the forward terminal of the diode and the output terminal of the LDO.
这里的基准电压源、LDO和比较电路可以采用常规结构,开关装置可以通过一个MOS管实现。Here, the reference voltage source, LDO and comparison circuit can adopt a conventional structure, and the switching device can be realized by a MOS tube.
本供电系统的上电过程为:电源电压Vin上电时,通过启动电路产生一个低压的电源VL71给基准电压源供电,当基准正常建立后,LDO模块再动作开始建立内部电源电压VOUT,当比较电路监测到LDO的输出VOUT达到预先设定的值时,产生使能信号L70,这个信号关闭启动电路的同时将开关SW1闭合,基准电压源的电源切换到由VOUT减去一个二极管D2压降提供。The power-on process of this power supply system is: when the power supply voltage Vin is powered on, a low-voltage power supply V L71 is generated through the startup circuit to supply power to the reference voltage source. When the reference is established normally, the LDO module starts to build the internal power supply voltage VOUT again. When the comparison circuit monitors that the output VOUT of the LDO reaches a preset value, it generates an enable signal L70, which closes the start-up circuit and closes the switch SW1 at the same time, and the power supply of the reference voltage source is switched to VOUT minus a diode D2 voltage drop supply.
以下对图1中启动电路的工作原理进行阐述:电源电压Vin上电时,由于内部信号都没有产生,所以NMOS管MN1和MN2都处于截止状态,则Level Shift的输出节点A是高阻状态,通过由PMOS管MP6组成的MOS电容对Level Shift的输出节点A进行初始化,上电时使节点A为高电平,通过由PMOS管MP4和NMOS管MN3的构成的反相器,得到节点B为低电平,则PMOS管MP3和MP5导通,从而形成由R1、MP3和MP5组成的通路产生电源电压VL71。由于内部信号L70一直维持为低直到LDO的输出VOUT上升到预先设定的值,即基准值VREF,且反相器INV1的电压为VL71,NMOS管MN1导通、MN2截止,维持节点A为高电平,因而使节点L71的电压一直能够维持。当输入电源电压Vin比较低时,齐纳二极管D2不被击穿,节点C的电平通过Vin减去电阻R1的压降和PMOS管MP3的源漏电压得到,然后在通过PMOS管MP5得到节点L71的电压;当输入的电源电压Vin比较高时,齐纳二极管D2击穿将节点C的电压稳定在5V左右,这样能够保证输出节点L71的电压一直在低压的范围内。当比较电路监测到LDO的输出VOUT的电压值上升到基准值VREF时,比较电路的输出信号L70由低电平翻转为高电平,则启动电路中NMOS管MN1截止、MN2导通,将节点A的电平拉为低电平,通过一级反相器后得到节点B的电位为高电平,关闭由R1、MP3和MP5形成的通路,L71的电压切换为由LDO的输出VOUT减去一个二极管压降得到。The following explains the working principle of the start-up circuit in Figure 1: when the power supply voltage Vin is powered on, since no internal signal is generated, the NMOS tubes MN1 and MN2 are both in the cut-off state, and the output node A of the Level Shift is in a high-impedance state. The output node A of the Level Shift is initialized through the MOS capacitor composed of the PMOS transistor MP6, and the node A is at a high level when the power is turned on. Through the inverter composed of the PMOS transistor MP4 and the NMOS transistor MN3, the node B is obtained as When the level is low, the PMOS transistors MP3 and MP5 are turned on, thereby forming a path composed of R1, MP3 and MP5 to generate a power supply voltage V L71 . Since the internal signal L70 remains low until the output VOUT of the LDO rises to a preset value, that is, the reference value V REF , and the voltage of the inverter INV1 is V L71 , the NMOS transistor MN1 is turned on and MN2 is turned off, maintaining node A is a high level, so that the voltage of the node L71 can always be maintained. When the input power supply voltage Vin is relatively low, Zener diode D2 is not broken down, the level of node C is obtained by subtracting the voltage drop of resistor R1 from Vin and the source-drain voltage of PMOS transistor MP3, and then the node is obtained through PMOS transistor MP5 The voltage of L71; when the input power supply voltage Vin is relatively high, the Zener diode D2 breaks down to stabilize the voltage of node C at about 5V, which can ensure that the voltage of the output node L71 is always in the low voltage range. When the comparison circuit detects that the voltage value of the output VOUT of the LDO rises to the reference value V REF , the output signal L70 of the comparison circuit is turned from low level to high level, then the NMOS transistor MN1 in the startup circuit is turned off, and MN2 is turned on, and the The level of node A is pulled to low level, the potential of node B is high level after passing through the first-stage inverter, and the path formed by R1, MP3 and MP5 is closed, and the voltage of L71 is switched to be reduced by the output VOUT of LDO. Go for a diode drop to get.
图3和图4分别给出了输入电源电压Vin为5V和16V时,本发明提供的供电系统的上电过程。在图3中由于输入电压Vin比较低,稳压二极管没有击穿,所以低压电源L71由电源电压Vin通过一个电阻R1、两个PMOS管MP3和MP5直接得到,当LDO的输出VOUT上升到3.2V时,比较电路的输出信号L70由低电平翻转为高电平,进而将启动电路关闭,低压电源L71切换为由内部LDO提供。在图4中由于输入电压Vin比较高,稳压二极管击穿,将C节点的电压稳定在5.2V左右,低压电源L71由电节点C处的电压VC通过一个PMOS管MP5得到,当LDO的输出VOUT上升到3.2V时,比较电路的输出信号L70由低电平翻转为高电平,进而将启动电路关闭,低压电源L71切换为由内部LDO提供。通过图3和图4表明,启动电路在系统正常工作后能够完全关闭,不消耗额外的功耗。FIG. 3 and FIG. 4 respectively show the power-on process of the power supply system provided by the present invention when the input power supply voltage Vin is 5V and 16V. In Figure 3, since the input voltage Vin is relatively low, the Zener diode does not break down, so the low-voltage power supply L71 is directly obtained from the power supply voltage Vin through a resistor R1 and two PMOS transistors MP3 and MP5. When the output VOUT of the LDO rises to 3.2V , the output signal L70 of the comparison circuit is turned from low level to high level, and then the start-up circuit is turned off, and the low-voltage power supply L71 is switched to be provided by the internal LDO. In Figure 4, because the input voltage Vin is relatively high, the Zener diode breaks down and stabilizes the voltage at node C at about 5.2V. The low-voltage power supply L71 is obtained from the voltage V C at the electrical node C through a PMOS transistor MP5. When the LDO When the output VOUT rises to 3.2V, the output signal L70 of the comparison circuit is turned from low level to high level, and then the startup circuit is turned off, and the low-voltage power supply L71 is switched to be provided by the internal LDO. Figure 3 and Figure 4 show that the startup circuit can be completely shut down after the system works normally without consuming extra power consumption.
从以上分析和仿真可以看出,本发明的启动电路在系统上电时产生一个低压的电源给系统内部的基准模块,从而避免基准模块采用高压器件,并且该启动电路相对传统启动电路最大的特点是,系统正常工作后,启动电路能够完全关闭,不消耗额外的功耗;集成了本发明的启动电路的供电系统使得芯片内部的基准电压源供电电压始终是低压,这样在芯片内部只需要构建一个高精度的低压基准源,所以采用本发明提供的供电系统的高压应用能够减少高压器件使用,减少芯片的面积,进而降低芯片的成本。此外由于本发明的供电系统,最终将基准电压源的供电电源切为芯片的内部电源,这样能够极大的提高基准的PSRR。From the above analysis and simulation, it can be seen that the start-up circuit of the present invention generates a low-voltage power supply to the reference module inside the system when the system is powered on, thereby avoiding the use of high-voltage devices in the reference module, and the start-up circuit has the biggest feature compared to the traditional start-up circuit Yes, after the system works normally, the start-up circuit can be completely closed without consuming additional power consumption; the power supply system integrating the start-up circuit of the present invention makes the reference voltage source power supply voltage inside the chip always low voltage, so that only need to build A high-precision low-voltage reference source, so the high-voltage application of the power supply system provided by the present invention can reduce the use of high-voltage devices, reduce the area of the chip, and then reduce the cost of the chip. In addition, due to the power supply system of the present invention, the power supply of the reference voltage source is finally switched to the internal power supply of the chip, which can greatly improve the PSRR of the reference.
本领域的普通技术人员将会意识到,这里所述的实施例是为了帮助读者理解本发明的原理,应被理解为本发明的保护范围并不局限于这样的特别陈述和实施例。本领域的普通技术人员可以根据本发明公开的这些技术启示做出各种不脱离本发明实质的其它各种具体变形和组合,这些变形和组合仍然在本发明的保护范围内。Those skilled in the art will appreciate that the embodiments described here are to help readers understand the principles of the present invention, and it should be understood that the protection scope of the present invention is not limited to such specific statements and embodiments. Those skilled in the art can make various other specific modifications and combinations based on the technical revelations disclosed in the present invention without departing from the essence of the present invention, and these modifications and combinations are still within the protection scope of the present invention.
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