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CN102624397B - High-linearity fully differential digital micro-accelerometer interface circuit system - Google Patents

High-linearity fully differential digital micro-accelerometer interface circuit system Download PDF

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CN102624397B
CN102624397B CN201210077500.6A CN201210077500A CN102624397B CN 102624397 B CN102624397 B CN 102624397B CN 201210077500 A CN201210077500 A CN 201210077500A CN 102624397 B CN102624397 B CN 102624397B
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fully differential
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integrator
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CN102624397A (en
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刘云涛
邵雷
高松松
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Harbin Engineering University
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Abstract

The invention belongs to the field of MEMS (Micro-Electro-Mechanical Systems) inertia devices, and particularly relates to a capacitance type micro-accelerometer digital output fully differential digital micro-accelerometer interface circuit system. The system comprises a drive signal generating part, a fully differential charge integrator, a fully differential post-amplifier, a fully differential pre-distorter, a relative dual-sampling and sampling retaining circuit, a fully electric integrator, a dynamic comparator, a D/A (Digital/Audio) converter and an electrostatic force feedback device. The system improves the linearity of an accelerometer system, effectively lowers the quantization noise of D/A conversion, restrains zero shift, reduces common mode interference generated by switching charge injection and a substrate noise, improves power supply rejection ration (PSRR), and reduces harmonic distortion.

Description

一种高线性度全差分数字微加速度计接口电路系统A high-linearity full-differential digital micro-accelerometer interface circuit system

技术领域 technical field

本发明属于MEMS惯性器件领域,具体涉及一种电容式微加速度计数字输出的全差分数字加速度计接口电路系统。The invention belongs to the field of MEMS inertial devices, and in particular relates to a fully differential digital accelerometer interface circuit system with digital output of a capacitive micro accelerometer.

背景技术 Background technique

微机电系统MEMS(Micro Electromechanical System)是在微电子技术的基础上发展起来的,采用MEMS技术制作的器件因具有小型化、智能化、集成化、高可靠性等优点而被广泛应用于航空航天、汽车、生物医学、环境监测以及几乎人们接触到的所有领域。微机械加速度计是最重要的MEMS器件之一,其市场销售量仅次于压力传感器。微加速度计具有体积小、功耗低、稳定性好、可靠性高以及利于批量生产等优点,广泛运用于汽车工业,航空航天领域,以及消费电子产品中。MEMS (Micro Electromechanical System) is developed on the basis of microelectronics technology. Devices made with MEMS technology are widely used in aerospace due to their advantages of miniaturization, intelligence, integration, and high reliability. , automobiles, biomedicine, environmental monitoring and almost all fields that people come into contact with. Micromachined accelerometers are one of the most important MEMS devices, second only to pressure sensors in terms of market sales. Micro-accelerometers have the advantages of small size, low power consumption, good stability, high reliability, and convenience for mass production, and are widely used in the automotive industry, aerospace fields, and consumer electronics.

当前很多惯性传感器的应用要用到计算机、微处理器和其他的一些数字器件,为了能够在数字领域处理信号,有必要将模数转换与传感器信号处理电路集成在同一个芯片上,集成的数字传感器不仅提供了更多的功能,而且降低了整个系统的成本。Sigma-Delta(∑Δ)调制技术是实现模数转换的重要方式,随着MEMS技术的发展,∑Δ调制技术被引入到微机械加速度计设计中。微加速度计的敏感结构可以作为一个二阶∑Δ调制器使用,然而由于敏感结构部分非常低的直流增益,使得二阶结构很难实现低的量化噪声,高阶结构是降低系统量化噪声最有效的途径。At present, many inertial sensor applications use computers, microprocessors and other digital devices. In order to process signals in the digital field, it is necessary to integrate the analog-to-digital conversion and sensor signal processing circuits on the same chip. The integrated digital Sensors not only provide more functionality, but also reduce the cost of the overall system. Sigma-Delta (ΣΔ) modulation technology is an important way to realize analog-to-digital conversion. With the development of MEMS technology, ΣΔ modulation technology has been introduced into the design of micro-mechanical accelerometers. The sensitive structure of the micro accelerometer can be used as a second-order ΣΔ modulator. However, due to the very low DC gain of the sensitive structure, it is difficult to achieve low quantization noise in the second-order structure. High-order structures are the most effective in reducing system quantization noise. way.

另外,由于敏感结构为三端器件,即两个固定电极和作为输出的中间可变电极,因此当前普遍采用单端检测方式对该输出信号进行处理,其优点是结构简单、控制时钟少,反馈易于实现,其缺点是零点漂移比较严重,驱动信号噪声对输出影响比较严重。事实上,也可将两个固定电极作为敏感结构的输出,采用全差分检测电路对信号进行处理,这样可以减小开关电荷注入和衬底噪声产生的共模干扰,提高电源抑制比,减小谐波失真。In addition, since the sensitive structure is a three-terminal device, that is, two fixed electrodes and an intermediate variable electrode as the output, the single-ended detection method is generally used to process the output signal, which has the advantages of simple structure, less control clocks, and feedback It is easy to implement, but its disadvantage is that the zero point drift is relatively serious, and the noise of the driving signal has a serious impact on the output. In fact, two fixed electrodes can also be used as the output of the sensitive structure, and a fully differential detection circuit is used to process the signal, which can reduce the common-mode interference caused by switch charge injection and substrate noise, improve the power supply rejection ratio, and reduce the Harmonic distortion.

然而,对于全差分∑Δ信号处理结构,存在的一个主要问题是:差分结构中,驱动信号施加在活动电极,因此只能将反馈电压加载在固定电极,反馈时,活动电极接地,两固定极板一个接反馈电压Vfb,另一个也接在0电位,形成与惯性力相反的静电力,活动电极所受静电合力与反馈电压为二次方关系,降低了系统线性度。However, for the fully differential ΣΔ signal processing structure, there is a main problem: in the differential structure, the driving signal is applied to the active electrode, so the feedback voltage can only be applied to the fixed electrode. When feedback, the active electrode is grounded, and the two fixed electrodes One of the plates is connected to the feedback voltage V fb , and the other is also connected to 0 potential to form an electrostatic force opposite to the inertial force. The resultant electrostatic force on the movable electrode is in a quadratic relationship with the feedback voltage, which reduces the linearity of the system.

发明内容 Contents of the invention

本发明的目的在于提供一种高线性度、高精度数字输出的全差分数字加速度计接口电路系统。The purpose of the present invention is to provide a fully differential digital accelerometer interface circuit system with high linearity and high precision digital output.

本发明的目的是这样实现的:The purpose of the present invention is achieved like this:

本发明包括驱动信号产生部(101)、全差分电荷积分器(102)、全差分后级放大器(103)、全差分前置补偿器(104)、相关双采样与采样保持电路(105)、全差分电学积分器(106)、1位动态比较器(107)、1位数模转换器(108)和1位静电力反馈(109)其特征在于:The present invention comprises a driving signal generation part (101), a fully differential charge integrator (102), a fully differential post-stage amplifier (103), a fully differential predistorter (104), a correlated double sampling and sample-and-hold circuit (105), Fully differential electrical integrator (106), 1-bit dynamic comparator (107), 1-bit digital-to-analog converter (108) and 1-bit electrostatic force feedback (109) are characterized in that:

驱动信号产生部(101),产生两相高频驱动方波信号,分别加载在敏感结构的两个固定电极;The driving signal generating part (101) generates a two-phase high-frequency driving square wave signal, which is respectively loaded on two fixed electrodes of the sensitive structure;

全差分电荷积分器(102)将敏感结构的微小电容变化转换为差分电压信号输出给全差分后级放大器(103);The fully differential charge integrator (102) converts the tiny capacitance change of the sensitive structure into a differential voltage signal and outputs it to the fully differential post-stage amplifier (103);

差分后级放大器(103)将信号进行反相放大输出给全差分前置补偿器(104);The differential post-amplifier (103) inverts and amplifies the signal and outputs it to the fully differential predistorter (104);

全差分前置补偿器(104)为信号的高频部分提供前置相位后输出给相关双采样与采样保持(105);The fully differential predistorter (104) provides the prephase for the high frequency part of the signal and outputs it to the correlated double sampling and sampling and holding (105);

相关双采样与采样保持电路(105)消除信号高频1/f噪声和运放失调,补偿运放有限带宽和有限增益影响,解调高频信号后发送给全差分电学积分器(106);Correlated double sampling and sample-and-hold circuit (105) eliminates signal high-frequency 1/f noise and operational amplifier offset, compensates operational amplifier for limited bandwidth and limited gain effects, and sends the fully differential electrical integrator (106) after demodulating the high-frequency signal;

全差分电学积分器(106)对信号提供低频增益,降低信号量化噪声后发送给1位动态比较器(107);The fully differential electrical integrator (106) provides low-frequency gain to the signal, reduces the quantization noise of the signal and sends it to a 1-bit dynamic comparator (107);

1位数模转换器(108),接收1位动态比较器(107)的输出信号,判断电学积分器的反馈电压;1-bit digital-to-analog converter (108), receives the output signal of 1-bit dynamic comparator (107), and judges the feedback voltage of electrical integrator;

1位静电力反馈(109),接收1位动态比较器(107)的输出信号,判断反馈回敏感结构的反馈力方向。The 1-bit electrostatic force feedback (109) receives the output signal of the 1-bit dynamic comparator (107), and judges the direction of the feedback force fed back to the sensitive structure.

本发明的有益效果在于:The beneficial effects of the present invention are:

本发明提出了一种双侧静电力反馈方式,相比于当前普遍采用的单侧静电力反馈,极大提高了加速度计系统线性度;利用微机械结构自身的二阶低通滤波特性结合电学积分器有效降低模数转换的量化噪声;全差分结构的信号处理方式抑制了零点漂移,减小了开关电荷注入和衬底噪声产生的共模干扰,提高了电源抑制比,减小了谐波失真。The present invention proposes a double-sided electrostatic force feedback method, which greatly improves the linearity of the accelerometer system compared with the currently commonly used single-sided electrostatic force feedback method; uses the second-order low-pass filter characteristics of the micro-mechanical structure itself combined with electrical The integrator effectively reduces the quantization noise of analog-to-digital conversion; the signal processing method of the fully differential structure suppresses zero drift, reduces the common-mode interference caused by switch charge injection and substrate noise, improves the power supply rejection ratio, and reduces harmonics distortion.

附图说明 Description of drawings

图1为高线性度全差分数字加速度计接口电路系统框图;Figure 1 is a block diagram of the high linearity full differential digital accelerometer interface circuit system;

图2为单侧静电力反馈原理图;Figure 2 is a schematic diagram of unilateral electrostatic force feedback;

图3为双侧静电力反馈原理图。Figure 3 is a schematic diagram of bilateral electrostatic force feedback.

具体实施方式 Detailed ways

图1表示本实施方式的高线性度全差分数字加速度计接口电路系统框图。FIG. 1 shows a block diagram of the high linearity fully differential digital accelerometer interface circuit system in this embodiment.

如图1所示,该接口电路系统具有:驱动信号产生部101,全差分电荷积分器102,全差分后级放大器103,全差分前置补偿器104,相关双采样与采样保持电路105,全差分电学积分器106,1位动态比较器107,1位数模(D/A)转换器108,1位静电力反馈109,时钟信号产生器110。As shown in Fig. 1, the interface circuit system has: a drive signal generating unit 101, a fully differential charge integrator 102, a fully differential post-stage amplifier 103, a fully differential predistorter 104, a correlated double sampling and sample-and-hold circuit 105, a fully differential Differential electrical integrator 106 , 1-bit dynamic comparator 107 , 1-bit analog-to-analog (D/A) converter 108 , 1-bit electrostatic force feedback 109 , clock signal generator 110 .

由微加速度计的敏感结构100和全差分电学积分器106共同组成∑Δ调制器中的积分器,在时钟信号产生器控制下,提供高的低频增益,获得高精度的1位数字输出,并由1位数模D/A转换器108和1位静电力反馈109构成全差分闭环结构。全差分前置补偿器104由全差分电荷积分器的级数和机械结构参数决定前置补偿的深度,以在精度和稳定性之间折中考虑。1位数模转换器根据1位动态比较器的输出电平决定全差分电荷积分器1的反馈电压的正负。1位静电力反馈根据1位动态比较器的输出电平决定施加在敏感质量块的静电力的方向。反馈采用双侧静电力反馈方式,提高系统线性度。The integrator in the ΣΔ modulator is composed of the sensitive structure 100 of the micro accelerometer and the fully differential electrical integrator 106. Under the control of the clock signal generator, it provides high low-frequency gain, obtains a high-precision 1-bit digital output, and A fully differential closed-loop structure is formed by a 1-bit digital-to-analog D/A converter 108 and a 1-bit electrostatic force feedback 109 . The fully differential predistorter 104 determines the depth of predistortion by the number of stages of the fully differential charge integrator and the parameters of the mechanical structure, so as to compromise between accuracy and stability. The 1-bit digital-to-analog converter determines whether the feedback voltage of the fully differential charge integrator 1 is positive or negative according to the output level of the 1-bit dynamic comparator. The 1-bit electrostatic force feedback determines the direction of the electrostatic force applied to the sensitive mass according to the output level of the 1-bit dynamic comparator. The feedback adopts the double-sided electrostatic force feedback method to improve the linearity of the system.

结合图2和图3说明系统高线性度的获得。图2是现在普遍使用的适用于全差分∑Δ接口电路的单侧静电力反馈方式,反馈时,活动电极接地,两固定极板一个接反馈电压Vfb,另一个也接在0电位,形成与惯性力相反的静电力Ffb The acquisition of high linearity of the system is illustrated in conjunction with Fig. 2 and Fig. 3 . Figure 2 is the commonly used unilateral electrostatic force feedback method suitable for fully differential ΣΔ interface circuits. During feedback, the movable electrode is grounded, and one of the two fixed plates is connected to the feedback voltage V fb , and the other is also connected to 0 potential, forming Electrostatic force F fb opposite to inertial force

Ff fbfb == 11 22 CC SS 00 dd 00 VV fbfb 22 -- -- -- (( 11 ))

由上式可知,活动电极所受静电合力与反馈电压为二次方关系,降低了系统线性度。It can be seen from the above formula that the resultant electrostatic force on the movable electrode has a quadratic relationship with the feedback voltage, which reduces the linearity of the system.

图3为本发明中提出的双侧静电力反馈原理图。反馈时,活动电极接负电源电压VSS,在两极板上分别施加反馈电压Vfb和-Vfb,因此,质量块所受静电合力为:Fig. 3 is a schematic diagram of the double-sided electrostatic force feedback proposed in the present invention. During feedback, the active electrode is connected to the negative power supply voltage V SS , and the feedback voltage V fb and -V fb are respectively applied to the two plates. Therefore, the resultant electrostatic force on the mass block is:

Ff fbfb == 11 22 CC SS 00 dd 00 (( VV SSSS -- VV fbfb )) 22 -- 11 22 CC SS 00 dd 00 (( VV SSSS ++ VV fbfb )) 22 == -- 22 CC SS 00 dd 00 VV SSSS VV fbfb -- -- -- (( 22 ))

由此可见,该方式提高了系统线性度。反馈时,也可将活动电极连接在正电源电压VCC上,此时,只要将反馈回固定电极的电压互换即可。It can be seen that this method improves the linearity of the system. During feedback, the active electrode can also be connected to the positive power supply voltage V CC . At this time, it is only necessary to exchange the voltage fed back to the fixed electrode.

本发明利用驱动信号产生电路产生双相不交叠方波驱动信号,该驱动信号分别施加在敏感结构的上下固定电极板,结合电荷积分器将外加加速度导致的敏感结构电容变化转化为全差分电压信号输出。通过后级放大器将微弱的信号放大,输送给后级电路处理。通过前置补偿器对系统进行相位补偿,提高系统稳定性。利用相关双采样和采样保持电路消除电路高频1/f噪声和运放失调,同时实现对高频信号解调。比较器的输出既作为最终的1位数字输出,也作为电学积分器反馈和1位静电力反馈的控制信号,静电力反馈部分采取双侧反馈方式大大提高系统线性度。The invention utilizes a drive signal generating circuit to generate a two-phase non-overlapping square wave drive signal, which is respectively applied to the upper and lower fixed electrode plates of the sensitive structure, and combined with a charge integrator to convert the capacitance change of the sensitive structure caused by the applied acceleration into a full differential voltage signal output. The weak signal is amplified by the post-stage amplifier and sent to the post-stage circuit for processing. The phase compensation of the system is carried out through the predistorter to improve the stability of the system. Correlative double sampling and sample-hold circuits are used to eliminate circuit high-frequency 1/f noise and operational amplifier offset, and at the same time realize demodulation of high-frequency signals. The output of the comparator is not only used as the final 1-bit digital output, but also as the control signal of the electrical integrator feedback and 1-bit electrostatic force feedback. The electrostatic force feedback part adopts a double-sided feedback method to greatly improve the linearity of the system.

Claims (1)

1. a high linearity fully differential digital accelerometer interface circuitry, comprise drive singal generating unit (101), fully differential charge integrator (102), fully differential post-amplifier (103), fully differential predistorter (104), correlated-double-sampling and sampling hold circuit (105), fully differential electricity integrator (106), 1 dynamic comparer (107), 1 figure place weighted-voltage D/A converter (108) and 1 electrostatic force feedback (109), it is characterized in that:
Drive singal generating unit (101), produces two-phase high-frequency drive square-wave signal, is carried in two fixed electrodes of sensitive structure respectively;
The change of the small capacitance of sensitive structure is converted to differential voltage signal and exports to fully differential post-amplifier (103) by fully differential charge integrator (102);
Signal is carried out anti-phase amplification and exports to fully differential predistorter (104) by fully differential post-amplifier (103);
Correlated-double-sampling and sampling hold circuit (105) is exported to after the HFS that fully differential predistorter (104) is signal provides preceding phase;
Correlated-double-sampling and sampling hold circuit (105) erasure signal high-frequency noise and amplifier are lacked of proper care, and compensate amplifier finite bandwidth and finite gain impact, send to fully differential electricity integrator (106) after demodulation high-frequency signal;
Fully differential electricity integrator (106) provides low-frequency gain to signal, sends to 1 dynamic comparer (107) after reducing signal quantization noise;
1 figure place weighted-voltage D/A converter (108), receives the output signal of 1 dynamic comparer (107), judges the feedback voltage of fully differential electricity integrator;
1 electrostatic force feedback (109), receives the output signal of 1 dynamic comparer (107), judges the feedback force direction feeding back to sensitive structure;
Described electrostatic force feedback, during feedback, float electrode meets negative supply voltage V sS, two-plate applies feedback voltage V respectively fbwith-V fb.
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Yuntao Liu,Ying Wang,Songsong Gao,Lei Shao.A Low-Noise CMOS Interface ASIC for Capacitive MEMS Accelerometer.《2011 International Conference on Mechatronic Science,Electric Engineering and Computer》.2011,第438-441页. *
电容式SIGMA-DELTA微加速度计接口ASIC芯片研究;刘云涛;《中国博士学位论文全文数据库》;20110815;第1-17,74-123页 *

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