CN102571004A - Operational amplifier - Google Patents

Abstract

An operational amplifier comprising: an input stage circuit comprising a mirror circuit, a differential input circuit A, a differential input circuit B, a bias circuit A providing a bias current for the differential input circuit A, and a bias circuit providing the differential input circuit B The bias circuit B of the current; the output stage circuit, which provides the input voltage by the output terminal B of the mirror circuit and forms the output voltage; and the differential mode feedback circuit, which detects the difference between the input voltage and the output voltage, and the final feedback signal Offset voltage is eliminated by separately controlling the bias circuits of the two input stage circuits. On the premise of not increasing the complexity of the circuit, the operational amplifier of the present invention realizes the elimination of the offset voltage of the operational amplifier by adding a differential mode feedback circuit, and solves the problem of the static operating point drift of the operational amplifier due to the change of the operating temperature.

Description

Operational Amplifier

【Technical field】

The present invention relates to an operational amplifier, in particular to an operational amplifier for driving capacitive line loads such as liquid crystal display devices.

【Background technique】

Traditionally, operational amplifiers have been constructed using bipolar transistors in most cases. However, due to the coexistence of MOS circuits and bipolar transistors and the constant requirement for low power operation, it is more common than ever to construct operational amplifiers using MOS transistors. When an operational amplifier is constructed with MOS transistors, there are cases where a circuit configuration different from that of an operational amplifier constructed with bipolar transistors is adopted by utilizing mode characteristics inherent to MOS transistors. Examples of such operational amplifiers include amplifiers that use electronic switching.

One of the fields of application for constructing operational amplifiers with MOS transistors is TFT LCD (Thin Film Transistor Liquid Crystal Display) driver LSI. This LCD driver LSI includes a plurality of operational amplifiers having a voltage follower configuration as output buffer amplifiers and a grayscale power supply for gamma correction. The LCD driver LSI is required to have only a small difference in the offset voltages of the plurality of operational amplifiers. Therefore, MOS operational amplifiers with extremely small offset voltages are required in the art.

In the traditional closed-loop unit gain operational amplifier, the two-stage unit gain operational amplifier mainly eliminates the offset voltage of the operational amplifier by adding a double sampling circuit at the output end, improving the symmetry of the MOS transistor at the input stage, and using chopping technology. Referring to Figure 1, the op amp circuit includes three parts: a bias circuit, an input stage circuit and an output stage circuit. The input stage uses a differential input structure composed of MOS transistors M1, M2, and M5. The output stage circuit is composed of M6, M7 and capacitors Cc and CL. It is used as the second stage of the operational amplifier to amplify the differential output signal. The capacitor Cc is a Miller capacitor to adjust the stability of the operational amplifier. The circuit also includes a mirror current mirror formed by M3 and M4. However, the addition of double sampling circuits and the use of chopping technology both increase the complexity of the circuit; due to the process, the mismatch problem of the input pair of tubes cannot be completely eliminated; the chopping technology requires additional circuits and a clock signal of a certain frequency. accomplish.

In view of the above disadvantages, it is necessary to provide a new type of operational amplifier to solve the above defects.

【Content of invention】

The purpose of the present invention is to provide a method to solve the influence of the mismatch of the MOS transistor on the offset voltage in the prior art due to the manufacturing process.

The technical solution for achieving the above object is: an operational amplifier comprising:

An input stage circuit, which includes a mirror circuit, a differential input circuit A, a differential input circuit B, a bias circuit A that provides a bias current for the differential input circuit A, and a bias circuit B that provides a bias current for the differential input circuit B;

an output stage circuit, which is supplied with an input voltage by an output terminal B of the mirror circuit and forms an output voltage; and

The differential mode feedback circuit detects the difference between the input voltage and the output voltage, and the final feedback signal eliminates the offset voltage by separately controlling the bias circuits of the two input stage circuits.

Optionally, the differential input circuit A and the differential input circuit B are respectively set as asymmetrical structures for increasing feedback voltage gain.

Optionally, the transconductance of the two input transistors in the differential input circuit A is asymmetrical, wherein the transconductance of the MOS transistor connected to the output terminal A in the mirror circuit is higher than that of the MOS transistor connected to the output terminal B in the mirror circuit. The transconductance of the tube is large.

Optionally, the transconductance of the two input transistors in the differential input circuit B is also asymmetrical, wherein the transconductance of the MOS transistor connected to the output terminal B in the mirror circuit is higher than that of the MOS transistor connected to the output terminal A in the mirror circuit. The transconductance of the tube should be large.

Optionally, the differential input circuit A and the differential input circuit B are the same input pair of transistors connected in parallel.

Optionally, the sizes of the two MOS transistors in the input pair are different.

Optionally, the input pair transistors of the differential input circuit A and the differential input circuit B are cross-connected with the mirror circuit.

Compared with the prior art, the beneficial effect of the above-mentioned operational amplifier is: the operational amplifier of the present invention realizes the elimination of the offset voltage of the operational amplifier by adding a differential mode feedback circuit without increasing the complexity of the circuit, and solves the problem of the operational amplifier due to The static operating point drift problem caused by the change of operating temperature.

The operational amplifier of the present invention uses an asymmetric structure input tube in the input stage circuit, which improves the voltage gain of the feedback loop and avoids the mismatch error formed by the traditional symmetrical structure input tube.

【Description of drawings】

Fig. 1 is a kind of two-stage unity-gain op-amp circuit structure schematic diagram of prior art;

Fig. 2 is the functional block diagram of the embodiment of operational amplifier of the present invention;

Fig. 3 is the circuit diagram of input stage circuit in operational amplifier of the present invention;

Fig. 4 is a circuit diagram of the differential mode feedback circuit and the output stage circuit in the operational amplifier of the present invention.

【Detailed ways】

Referring to Fig. 2, the operational amplifier of the present invention realizes the elimination of the offset voltage of the operational amplifier by adding a differential mode feedback circuit without increasing the complexity of the circuit, and at the same time, the input tube is set to an asymmetric structure in the input stage circuit, The mismatch error existing in the traditional operational amplifier is avoided.

The amplifier structure of this embodiment is introduced in detail as follows:

The operational amplifier of the present invention comprises:

The input stage circuit 201, which includes a mirror circuit 204, a differential input circuit A210, a differential input circuit B211, a bias circuit A212 that provides a bias current for the differential input circuit A210, and a bias circuit B213 that provides a bias current for the differential input circuit B211 ;

An output stage circuit 202, which provides an input voltage from the output terminal B of the mirror circuit and forms an output voltage;

And the differential mode feedback circuit 203 , which detects the difference between the input voltage and the output voltage, and the final feedback signal realizes the purpose of eliminating the offset voltage by respectively controlling the bias circuits 212 and 213 of the two input stage circuits.

Wherein, the differential input circuit A210 and the differential input circuit B211 are the same input pair transistors connected in parallel. The sizes of the two MOS tubes in the input pair are different. The connection between the differential input circuit A210, the differential input circuit B211 and the mirror circuit 204 adopts a cross interconnection method. The transconductance of the two input transistors in the differential input circuit A210 is asymmetrical, wherein the transconductance ratio of the MOS transistor connected to the output terminal A214 in the mirror circuit 204 is higher than that of the MOS transistor connected to the output terminal B215 in the mirror circuit 204 The transconductance is large, and similarly, the transconductance of the two input transistors in the differential input circuit B211 is also asymmetrical, wherein the transconductance ratio of the MOS transistor connected to the output terminal B215 in the mirror circuit 204 is connected to the output terminal A214 in the mirror circuit 204 The transconductance of the MOS tube should be large. That is, both the differential input circuit A210 and the differential input circuit B211 have an asymmetric structure.

Referring to Fig. 3, it is a circuit diagram of the input stage circuit 201 in the operational amplifier of the present invention, wherein the MOS transistor M1 is connected to the power supply VDD and the node 314, the MOS transistor M2 is connected to the power supply VDD and the node 313, and the MOS transistor M3 is connected to the node 316 and node 313, MOS transistor M4 connects node 316 and node 314, MOS transistor M5 connects node 314 and node 315, MOS transistor M6 connects node 315 and node 313, MOS transistor M7 connects node 316 and The ground level VSS, and the MOS transistor M8 is connected to the node 315 and the ground level VSS.

MOS transistor M7 and MOS transistor M8 form a mirror circuit 204, MOS transistor M1, MOS transistor M4 and MOS transistor M5 form a differential output circuit A210, and MOS transistor M2, MOS transistor M3 and MOS transistor M6 form a differential output circuit B211. The bias currents of M3 and M5 are the same, and the bias currents of M4 and M6 are the same. The bias current flowing through the MOS transistors M3 and M5 is smaller than the bias current flowing through the MOS transistors M4 and M6. At the same time, the MOS transistors M3 and M5 The width and length of the MOS transistors M4 and M6 are shorter than those of the MOS transistors M4 and M6, that is, the transconductances of the MOS transistors M3 and M5 are smaller than those of the MOS transistors M4 and M6.

Referring to FIG. 4 , it is a circuit diagram of the differential mode feedback circuit 203 and the output stage circuit 202 in the operational amplifier of the present invention.

Referring to FIG. 3 and FIG. 4 , the gate of the MOS transistor M1 is connected to a differential output 311 of the differential mode feedback circuit 203 . The gate of the MOS transistor M2 is connected to another differential output 312 of the differential mode feedback circuit 203 . The gates of the MOS transistors M3 and M4 are connected to the output voltage Vout of the operational amplifier. The gates of the MOS transistors M5 and M6 are connected to the input voltage Vin of the operational amplifier. The gates of the MOS transistor M7 and the MOS transistor M8 are connected to the node 316.

The gate voltages of the MOS transistors M1 and M2 are controlled by the output signal of the differential mode feedback circuit 203 . The node 315 is the mirror output terminal of the mirror circuit 204 composed of the MOS transistors M7 and M8. The two pairs of differential input transistors are respectively cross-connected with the mirror circuit 204 .

Referring to FIG. 4, when the output voltage Vout is slightly greater than the input voltage Vin, the gate-source voltage of FB2 in the differential mode feedback circuit 203 becomes larger, that is, the current IFB2 flowing through the MOS transistor FB2 becomes larger, and the voltage of node 312 decreases. According to the working principle of the differential pair, the current flowing through FB3 becomes smaller, and the voltage of node 311 increases. The voltage of node 311 is the gate voltage of M1, and the increase of the voltage at this point causes the current IM1 flowing through M1 to decrease; since the transconductance of M4 is greater than that of M5, the decrease of the current flowing through M4 is greater than The amount of reduction in current flowing through M5. Similarly, the voltage of node 312 is the gate voltage of M2, and the reduction of the voltage at this point causes the current IM2 flowing through M2 to increase; since the transconductance of M3 is smaller than that of M6, the increase of the current flowing through M6 The amount is greater than the increase in current flowing through M3. From the above analysis, it can be seen that the current flowing through M7 becomes smaller, that is, the voltage at node 316 decreases; the current flowing through M8 becomes larger, that is, the voltage at node 315 increases. The voltage of the node 315 acts on the M9 of the output stage circuit 202, so that the voltage of the output node 319 decreases. Thereby reducing the offset error voltage.

Referring to FIG. 4, when the output voltage Vout is slightly lower than the input voltage Vin, the gate-source voltage of FB2 in the differential mode feedback circuit 203 becomes smaller, that is, the current IFB2 flowing through the MOS transistor FB2 becomes smaller, and the voltage of node 312 rises. , according to the working principle of the differential pair, the current flowing through FB3 becomes larger, and the voltage of node 311 decreases. The voltage of node 311 is the gate voltage of M1, and the increase of the voltage at this point causes the current IM1 flowing through M1 to become larger; since the transconductance of M4 is greater than that of M5, the increase of the current flowing through M4 is greater than that of M5 increase in tube current. Similarly, the voltage of node 312 is the gate voltage of the M2 tube, and the increase of the voltage at this point causes the current IM2 flowing through M2 to increase; since the transconductance of M3 is smaller than that of M6, the current flowing through M6 The decrease of is greater than the decrease of the current flowing through M3. From the above analysis, it can be seen that the current flowing through M7 becomes larger, that is, the voltage at node 316 increases; the current flowing through M8 becomes smaller, that is, the voltage at node 315 decreases. The voltage of the node 315 acts on the M9 of the output stage circuit 202, so that the voltage of the output node 319 increases. Thereby reducing the offset error voltage.

In summary, on the premise of not increasing the complexity of the circuit, the operational amplifier of the present invention realizes the elimination of the offset voltage of the operational amplifier by adding a differential mode feedback circuit; an input tube with an asymmetric structure is used in the input stage circuit, thereby It avoids the mismatch error caused by the input tube of the traditional symmetrical structure.

Although the present invention has been disclosed above with preferred embodiments, the present invention is not limited thereto. Any person skilled in the art can make various changes and modifications without departing from the spirit and scope of the present invention, so the protection scope of the present invention should be based on the scope defined in the claims.

Claims (7)

1. operational amplifier is characterized in that it comprises:

Input stage circuit, the biasing circuit B that it comprises mirror image circuit, difference input circuit A, difference input circuit B, the biasing circuit A of bias current is provided and bias current is provided for difference input circuit B for difference input circuit A;

Output-stage circuit, its output B by mirror image circuit provides input voltage and forms output voltage; And

The differential mode feedback circuit, its difference to input voltage and output voltage detects, and final feedback signal is eliminated offset voltage through the biasing circuit of controlling two input stage circuits respectively.

2. operational amplifier as claimed in claim 1 is characterized in that, said difference input circuit A and difference input circuit B are set to improve the dissymmetrical structure of feedback voltage gain respectively.

3. operational amplifier as claimed in claim 2; It is characterized in that; The mutual conductance of two input pipes among the said difference input circuit A is asymmetric, wherein with mirror image circuit in the metal-oxide-semiconductor that links to each other of output terminals A mutual conductance than with mirror image circuit in the mutual conductance of the metal-oxide-semiconductor that links to each other of output B big.

4. operational amplifier as claimed in claim 3; It is characterized in that; The mutual conductance of two input pipes among the said difference input circuit B also is asymmetric, wherein with mirror image circuit in the metal-oxide-semiconductor that links to each other of output B mutual conductance than with mirror image circuit in the mutual conductance of the metal-oxide-semiconductor that links to each other of output terminals A big.

5. like any described operational amplifier of claim 1 to 4, it is characterized in that said difference input circuit A and difference input circuit B are that the identical input of parallel connection is to pipe.

6. operational amplifier as claimed in claim 5 is characterized in that, said input is different to the size of two metal-oxide-semiconductors in the pipe.

7. operational amplifier as claimed in claim 6 is characterized in that, the input of said difference input circuit A and difference input circuit B is cross interconnected to pipe and mirror image circuit.

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