CN102543819A - Method for preventing STI (Shallow Trench Isolation)-CMP (Chemical-Mechanical Polishing) scratching - Google Patents
Method for preventing STI (Shallow Trench Isolation)-CMP (Chemical-Mechanical Polishing) scratching Download PDFInfo
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Abstract
本发明提供一种防范STI-CMP划伤的方法,包括步骤:第一步,将晶片有源区表面的HDP-OX(高密度等离子体氧化硅)磨掉,这时候晶片表面会形成倒掉的尖角;第二步,进行SiN的研磨并将SiN磨去一定的厚度,在第一步和第二步之间加入高压清洗步骤以清除掉到的尖角,从而防止晶片表面划伤。与现有技术相比,高压清洗步骤可以及时冲走倒掉的尖角,达到清洗晶片表面的作用,从而防止了STI-CMP划伤。
The invention provides a method for preventing STI-CMP from scratching, comprising the steps of: the first step, grinding away the HDP-OX (high-density plasma silicon oxide) on the surface of the active area of the wafer, and at this time the surface of the wafer will form and be poured out The sharp corners; the second step is to grind the SiN and grind the SiN to a certain thickness, and add a high-pressure cleaning step between the first and second steps to remove the sharp corners that fall, so as to prevent scratches on the wafer surface. Compared with the prior art, the high-pressure cleaning step can wash away the fallen sharp corners in time to achieve the effect of cleaning the wafer surface, thereby preventing STI-CMP scratches.
Description
【技术领域】 【Technical field】
本发明涉及半导体生产工艺技术领域,尤其涉及一种改进的STI-CMP(浅沟槽隔离平坦化)方法。The invention relates to the technical field of semiconductor production technology, in particular to an improved STI-CMP (Shallow Trench Isolation Planarization) method.
【背景技术】 【Background technique】
STI(浅沟槽隔离)目前已成为器件之间隔离的关键技术,并且已取代LOCOS(硅的局部氧化)技术。其主要步骤包括在纯硅片上刻蚀浅沟槽、进行二氧化硅沉积、最后用CMP(化学机械抛光)技术进行表面平坦化。CMP(化学机械抛光)工艺由IBM于1984年引入集成电路制造工业,并首先用在后道工艺的IMD(金属间绝缘介质)的平坦化,然后通过设备和工艺的改进用于钨的平坦化,随后用于STI和铜的平坦化。CMP为近年来IC制程中成长最快、最受重视的一项技术。其主要原因是由于超大规模集成电路随着线宽不断细小化而产生对平坦化的强烈需求。STI-CMP的工艺目标是磨掉比SiN(氮化硅)层高的所有氧化层,否则STI抛光后进行的工艺就不能用热磷酸剥离掉SiN,从而实现平坦化。STI (Shallow Trench Isolation) has now become a key technology for isolation between devices and has replaced LOCOS (Local Oxidation of Silicon) technology. The main steps include etching shallow trenches on pure silicon wafers, silicon dioxide deposition, and finally surface planarization with CMP (Chemical Mechanical Polishing) technology. The CMP (Chemical Mechanical Polishing) process was introduced into the integrated circuit manufacturing industry by IBM in 1984, and was first used in the planarization of the IMD (Intermetal Insulation Dielectric) in the subsequent process, and then used for the planarization of tungsten through the improvement of equipment and processes , subsequently used for planarization of STI and copper. CMP is the fastest growing and most valued technology in IC manufacturing process in recent years. The main reason is that VLSI has a strong demand for planarization with the continuous miniaturization of line width. The process goal of STI-CMP is to grind away all oxide layers higher than the SiN (silicon nitride) layer, otherwise the process performed after STI polishing cannot use hot phosphoric acid to peel off SiN to achieve planarization.
因此传统的STI-CMP一般按照如下两个步骤进行:第一步是将有源区的HDP-OX(高密度等离子体氧化硅)磨掉,第二步是将有源区的SiN磨掉指定的厚度(例如400A),而这两步是连续进行的,如图1所示。然而,在半导体制造流程中,STI-CMP工序之前还有一个HDP-OX的沉淀过程,这一步会完成STI沟槽的填充,但是填充后在有源区表面会形成尖角。因此在STI-CMP研磨的时候有可能因为表面大块的尖角倒掉而形成晶片表面划伤,并且由于STI-CMP的研磨过程是连续进行的,倒掉的大块尖角存在于晶片和研磨垫中间,不能被清除掉,所以研磨后很容易形成划伤。Therefore, traditional STI-CMP is generally carried out in the following two steps: the first step is to grind off the HDP-OX (high-density plasma silicon oxide) in the active area, and the second step is to grind off the SiN in the active area. The thickness (for example, 400A), and these two steps are carried out continuously, as shown in Figure 1. However, in the semiconductor manufacturing process, there is a HDP-OX precipitation process before the STI-CMP process. This step will complete the filling of the STI trench, but sharp corners will be formed on the surface of the active region after filling. Therefore, during STI-CMP grinding, there may be scratches on the wafer surface due to the falling of large sharp corners on the surface, and because the grinding process of STI-CMP is carried out continuously, the large sharp corners that fall away exist on the wafer and The middle of the grinding pad cannot be removed, so it is easy to form scratches after grinding.
为了解决上述问题,很有必要提供一种改进的STI-CMP方法。In order to solve the above problems, it is necessary to provide an improved STI-CMP method.
【发明内容】【Content of invention】
针对现有技术的不足,本发明解决的技术问题是提供一种改进的STI-CMP方法,其可以防范和减轻HDP-OX形成的尖角对晶片表面的划伤。Aiming at the deficiencies of the prior art, the technical problem solved by the present invention is to provide an improved STI-CMP method, which can prevent and alleviate the scratches on the wafer surface caused by the sharp corners formed by HDP-OX.
本发明的目的通过提供以下技术方案实现:The object of the present invention is achieved by providing the following technical solutions:
一种防范STI-CMP划伤的方法,包括步骤:第一步,将晶片有源区表面的HDP-OX(高密度等离子体氧化硅)磨掉,这时候晶片表面会形成倒掉的尖角;第二步,进行SiN的研磨并将SiN磨去一定的厚度,在第一步和第二步之间加入高压清洗步骤以清除掉到的尖角,从而防止晶片表面划伤。A method for preventing STI-CMP scratches, comprising the steps of: the first step, grinding away the HDP-OX (high-density plasma silicon oxide) on the surface of the active region of the wafer, and at this time the surface of the wafer will form a sharp angle that falls ; The second step is to grind the SiN and grind the SiN to a certain thickness, and add a high-pressure cleaning step between the first step and the second step to remove the sharp corners that fall, thereby preventing the wafer surface from being scratched.
进一步地,SiN的研磨可以将晶片表面偶然形成的划伤去除。Further, the grinding of SiN can remove the accidental scratches formed on the wafer surface.
再进一步地,SiN的研磨步骤中所述的一定的厚度是400A。Still further, the certain thickness mentioned in the polishing step of SiN is 400 Å.
再进一步地,所述第一步骤、第二步骤以及两者之间的高压清洗步骤是连续进行的。Still further, the first step, the second step and the high-pressure cleaning step between them are carried out continuously.
更进一步地,所述倒掉的尖角是HDP-OX(高密度等离子体氧化硅)。Furthermore, the poured sharp corner is HDP-OX (High Density Plasma Oxide of Silicon).
与现有技术相比,本发明的有益效果是:高压清洗步骤可以及时冲走倒掉的尖角,达到清洗晶片表面的作用,从而防止了STI-CMP划伤。Compared with the prior art, the beneficial effect of the present invention is that the high-pressure cleaning step can wash away the fallen sharp corners in time to achieve the effect of cleaning the surface of the wafer, thereby preventing STI-CMP scratches.
【附图说明】 【Description of drawings】
下面结合附图对本发明作进一步说明:The present invention will be further described below in conjunction with accompanying drawing:
图1为现有技术的STI-CMP的流程图。FIG. 1 is a flow chart of STI-CMP in the prior art.
图2为本发明防范STI-CMP划伤的方法的流程图。Fig. 2 is a flow chart of the method for preventing STI-CMP scratches of the present invention.
【具体实施方式】 【Detailed ways】
以下参照附图说明本发明的最佳实施方式。The best mode for carrying out the present invention will be described below with reference to the drawings.
如图2所示,本发明提供一种防范STI-CMP(浅沟槽隔离平坦化划伤)的方法。在半导体制造流程中,STI-CMP工序之前还有一个HDP-OX(高密度等离子体氧化硅)的沉淀过程,这一步会完成STI沟槽的填充,但是填充后在晶片的有源区表面会形成尖角。本发明的第一个步骤就是将晶片有源区表面的HDP-OX磨掉,这时候晶片有源区表面的尖角将会倒掉,同时还会形成其他副产物。这些倒掉的尖角和副产物位于晶片表面与研磨垫之间,若是不及时清理,在接下来的研磨过程中将会造成晶片表面的划伤。而本发明正是在第一个步骤完成之后设置了一个高压清洗步骤,通过高压清洗,倒掉的尖角和副产物将被冲走,晶片表面也得到清洗。随后,将会进行SiN的研磨步骤,并且按照指定的厚度持续进行研磨,该步骤可以将晶片表面偶然形成的划伤弱化甚至去除,此时,SiN被磨掉的厚度一般在400A。需要指出的是,上述步骤是连续进行的。As shown in FIG. 2, the present invention provides a method for preventing STI-CMP (shallow trench isolation planarization scratch). In the semiconductor manufacturing process, there is a deposition process of HDP-OX (high-density plasma silicon oxide) before the STI-CMP process. This step will complete the filling of the STI trenches, but after filling, the surface of the active region of the wafer will be form sharp corners. The first step of the present invention is to grind away the HDP-OX on the surface of the active area of the wafer. At this time, the sharp corners on the surface of the active area of the wafer will be poured out, and other by-products will be formed simultaneously. These fallen sharp corners and by-products are located between the wafer surface and the polishing pad. If they are not cleaned in time, they will cause scratches on the wafer surface during the subsequent grinding process. And the present invention is provided with a high-pressure cleaning step just after the first step is completed, and by high-pressure cleaning, the sharp corners and by-products poured away will be washed away, and the wafer surface is also cleaned. Subsequently, the grinding step of SiN will be carried out, and the grinding will be continued according to the specified thickness. This step can weaken or even remove the scratches accidentally formed on the wafer surface. At this time, the thickness of SiN that is ground away is generally 400A. It should be pointed out that the above steps are performed continuously.
与现有技术相比,本发明的有益效果是:高压清洗步骤可以及时冲走倒掉的尖角和其他副产物,达到清洗晶片表面的作用,从而防止了STI-CMP划伤。Compared with the prior art, the beneficial effect of the present invention is that the high-pressure cleaning step can wash away the fallen sharp corners and other by-products in time to achieve the effect of cleaning the wafer surface, thus preventing STI-CMP scratches.
尽管为示例目的,已经公开了本发明的优选实施方式,但是本领域的普通技术人员将意识到,在不脱离由所附的权利要求书公开的本发明的范围和精神的情况下,各种改进、增加以及取代是可能的。Although preferred embodiments of the present invention have been disclosed for illustrative purposes, those of ordinary skill in the art will appreciate that various Improvements, additions, and substitutions are possible.
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Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6261158B1 (en) * | 1998-12-16 | 2001-07-17 | Speedfam-Ipec | Multi-step chemical mechanical polishing |
| US20020187595A1 (en) * | 1999-08-04 | 2002-12-12 | Silicon Evolution, Inc. | Methods for silicon-on-insulator (SOI) manufacturing with improved control and site thickness variations and improved bonding interface quality |
| US7300877B2 (en) * | 2004-01-13 | 2007-11-27 | Nec Electronics Corporation | Method of manufacturing a semiconductor device |
| CN101425477A (en) * | 2007-10-29 | 2009-05-06 | 联华电子股份有限公司 | Method for forming shallow trench isolation structure and method for grinding semiconductor structure |
| US20090215267A1 (en) * | 2008-02-26 | 2009-08-27 | Fujitsu Microelectronics Limited | Method of manufacturing semiconductor device |
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Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6261158B1 (en) * | 1998-12-16 | 2001-07-17 | Speedfam-Ipec | Multi-step chemical mechanical polishing |
| US20020187595A1 (en) * | 1999-08-04 | 2002-12-12 | Silicon Evolution, Inc. | Methods for silicon-on-insulator (SOI) manufacturing with improved control and site thickness variations and improved bonding interface quality |
| US7300877B2 (en) * | 2004-01-13 | 2007-11-27 | Nec Electronics Corporation | Method of manufacturing a semiconductor device |
| CN101425477A (en) * | 2007-10-29 | 2009-05-06 | 联华电子股份有限公司 | Method for forming shallow trench isolation structure and method for grinding semiconductor structure |
| US20090215267A1 (en) * | 2008-02-26 | 2009-08-27 | Fujitsu Microelectronics Limited | Method of manufacturing semiconductor device |
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