CN102279819A - Method for improving storage efficiency of solid data storage system for bulk data - Google Patents
Method for improving storage efficiency of solid data storage system for bulk data Download PDFInfo
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- CN102279819A CN102279819A CN2011102145783A CN201110214578A CN102279819A CN 102279819 A CN102279819 A CN 102279819A CN 2011102145783 A CN2011102145783 A CN 2011102145783A CN 201110214578 A CN201110214578 A CN 201110214578A CN 102279819 A CN102279819 A CN 102279819A
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Abstract
The invention discloses a method for improving storage efficiency of a solid data storage system for bulk data. When bulk user data is continuously written in a physical storage page, as much as possible user data is written in each storage page according to the quality characteristics of each physical storage page, and further the efficiency of storing the bulk data by the solid data storage system is improved, the defect of coding redundancy waste is overcome, and the storage efficiency of the flash memory chip is increased. The method is especially suitable for storage of the bulk data, and has the advantage of effectively improving the efficiency of storing the bulk data by the solid data storage system.
Description
Technical field
The invention belongs to storer and computer architecture technical field, particularly a kind of method that improves solid-state data-storage system for the storage efficiency of chunk data.
Background technology
As the solid-state non-volatile data storing technology of unique main flow, flash memory has become a ring with the fastest developing speed in the global semiconductor industrial system.Market intelligence showed in 2010, and the market of flash memory products has been broken through 20,000,000,000 dollars.Though flash memory is mainly used in consumption electronic products for example digital camera and mobile phone at present, is obtaining the extensive concern of industry as the solid-state memory system of storage medium with flash memory.Use flash memory can improve 10 to 100 times than the speed of heritage storage system as the solid-state memory system of storage medium.Except the advantage on the speed, owing to do not have physical construction fully, solid-state memory system is all having significant advantage aspect anti-seismic performance, heating power consumption, use noise and the volume weight.Solid-state memory system mainly comprises a solid-state memory system controller and an above flash chip.
Floating gate transistor is the essential information storage unit of flash chip.The threshold voltage of floating gate transistor can enter floating boom by the electronics of injection some and change.Therefore, by accurate control to number of electrons in the floating boom, each storage unit, promptly floating gate transistor can store a plurality of bit informations.Accurately the process of number of electrons is commonly called programming in the control floating boom.Before each storage unit can be programmed, all electronics in its floating boom must be removed, thereby it is minimum to make that its threshold voltage is changed to, and this process is called as wipes.Information memory cell array in the flash chip is divided into a plurality of storage blocks, and each storage block comprises a plurality of memory pages.All storage unit in each storage block must be wiped simultaneously, but the programming of storage unit and to read then be unit with the page.
Because the processing procedure variation in the inevitable flash chip production run and the different noise intensity that the page bore of different physical locations, different memory pages can have different noise tolerance limits.Simultaneously, along with improving constantly of flash memory precision of manufacturing process, the ratio of defects of information memory cell also can constantly rise.In existing design, the solid-state memory system controller always writes each memory page with onesize user data, thereby employed error correcting code must contain abundant coding redundancy, can tolerate the poorest possible memory page to realize enough powerful error correcting capability, has caused certain coding redundancy waste.Simultaneously, if a certain page comprises too much defect information storage unit, this page and even the storage block that comprises this page will be used for storaging user data.These factors will cause lower flash chip storage efficiency.
Summary of the invention
In order to overcome the deficiency that above-mentioned prior art exists, the object of the present invention is to provide a kind of method that improves solid-state data-storage system for the storage efficiency of chunk data, overcome the defective of coding redundancy waste and improved the flash chip storage efficiency, the method is particularly useful for the storage of chunk data, improves the storage efficiency of solid-state memory system for chunk data very effectively.
In order to achieve the above object, the technical solution adopted in the present invention is:
A kind of method that improves solid-state data-storage system for the storage efficiency of chunk data, at first the solid-state memory system controller is communicated connection with the memory page property storage module, the memory page property storage module comprises the mass property information that stores memory page, when the solid-state memory system controller in order when receiving the bulk user data, earlier the bulk user data that is received is temporarily stored into writing in the buffer in the solid-state memory system controller, simultaneously, the solid-state memory system controller reads the mass property information of the physical memory page of selected flash chip from the memory page property storage module, mass property information according to this page, the solid-state memory system controller correspondingly calls its inner error correcting code code check and module is set the code check of error correcting code coding is provided with, and each code check is at user data capacity to be written in the corresponding physical memory page separately, the code check setting of encoding like this according to error correcting code, the solid-state memory system controller is read the user data of respective user data capacity from write buffer, and the error correcting code scrambler in its input solid-state memory system controller carried out the error correcting code encoding operation, then the data behind the error correcting code coding are write in the corresponding physical memory page by the output of error correcting code scrambler, when reading the bulk user data in proper order by the solid-state memory system controller, at first the solid-state memory system controller reads the mass property information of corresponding physical memory page from the memory page property storage module, mass property according to this physical memory page, the solid-state memory system controller obtains the code check of the employed error correcting code coding of this physical memory page, thereby the error-correcting code decoder of correspondingly controlling the solid-state memory system controller carries out corresponding decode operation to bulk user data to be read, then, study in the buffer the bulk user data behind the decode operation is temporary, when user data reached predetermined volumes in reading buffer, the bulk user data of the data transmission interface by reading buffer after with decode operation exported in proper order.
The present invention is when writing physical memory page continuously with the bulk user data, can be according to the mass property of each physical memory page itself, user data as much as possible is write in each memory page, and then reach and improve the storage efficiency of solid-state memory system controller for chunk data, overcome the defective of coding redundancy waste and improved the flash chip storage efficiency, the method is particularly useful for the storage of chunk data, improves the storage efficiency of solid-state memory system for chunk data very effectively.
Description of drawings
Accompanying drawing is a principle of work structural representation of the present invention.
Embodiment
The present invention will be described in more detail below in conjunction with accompanying drawing.
As shown in drawings, improve the method for solid-state data-storage system for the storage efficiency of chunk data, at first the solid-state memory system controller is communicated connection with the memory page property storage module, the memory page property storage module comprises the mass property information that stores memory page, when the solid-state memory system controller in order when receiving the bulk user data, earlier the bulk user data that is received is temporarily stored into writing in the buffer in the solid-state memory system controller, simultaneously, the solid-state memory system controller reads the mass property information of the physical memory page of selected flash chip from the memory page property storage module, mass property information according to this page, the solid-state memory system controller correspondingly calls its inner error correcting code code check and module is set the code check of error correcting code coding is provided with, to guarantee the desired data storing reliability of bulk user data, and each code check is at user data capacity to be written in the corresponding physical memory page separately, the code check setting of encoding like this according to error correcting code, the solid-state memory system controller is read the user data of respective user data capacity from write buffer, and the error correcting code scrambler in its input solid-state memory system controller carried out the error correcting code encoding operation, then the data behind the error correcting code coding are write in the corresponding physical memory page by the output of error correcting code scrambler, when reading the bulk user data in proper order by the solid-state memory system controller, at first the solid-state memory system controller reads the mass property information of corresponding physical memory page from the memory page property storage module, mass property according to this physical memory page, the solid-state memory system controller obtains the code check of the employed error correcting code coding of this physical memory page, thereby the error-correcting code decoder of correspondingly controlling the solid-state memory system controller carries out corresponding decode operation to bulk user data to be read, then, study in the buffer the bulk user data behind the decode operation is temporary, when user data reached predetermined volumes in reading buffer, the bulk user data of the data transmission interface by reading buffer after with decode operation exported in proper order.
Claims (1)
1. method that improves solid-state data-storage system for the storage efficiency of chunk data, it is characterized in that: at first the solid-state memory system controller is communicated connection with the memory page property storage module, the memory page property storage module comprises the mass property information that stores memory page, when the solid-state memory system controller in order when receiving the bulk user data, earlier the bulk user data that is received is temporarily stored into writing in the buffer in the solid-state memory system controller, simultaneously, the solid-state memory system controller reads the mass property information of the physical memory page of selected flash chip from the memory page property storage module, mass property information according to this page, the solid-state memory system controller correspondingly calls its inner error correcting code code check and module is set the code check of error correcting code coding is provided with, and each code check is at user data capacity to be written in the corresponding physical memory page separately, the code check setting of encoding like this according to error correcting code, the solid-state memory system controller is read the user data of respective user data capacity from write buffer, and the error correcting code scrambler in its input solid-state memory system controller carried out the error correcting code encoding operation, then the data behind the error correcting code coding are write in the corresponding physical memory page by the output of error correcting code scrambler, when reading the bulk user data in proper order by the solid-state memory system controller, at first the solid-state memory system controller reads the mass property information of corresponding physical memory page from the memory page property storage module, mass property according to this physical memory page, the solid-state memory system controller obtains the code check of the employed error correcting code coding of this physical memory page, thereby the error-correcting code decoder of correspondingly controlling the solid-state memory system controller carries out corresponding decode operation to bulk user data to be read, then, study in the buffer the bulk user data behind the decode operation is temporary, when user data reached predetermined volumes in reading buffer, the bulk user data of the data transmission interface by reading buffer after with decode operation exported in proper order.
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| CN2011102145783A CN102279819A (en) | 2011-07-28 | 2011-07-28 | Method for improving storage efficiency of solid data storage system for bulk data |
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| CN2011102145783A CN102279819A (en) | 2011-07-28 | 2011-07-28 | Method for improving storage efficiency of solid data storage system for bulk data |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102915770A (en) * | 2012-10-17 | 2013-02-06 | 邹粤林 | Method for reducing inter-crosstalk of internal data of flash memory chip, flash memory storage system and controller thereof |
| CN107852177A (en) * | 2015-07-01 | 2018-03-27 | 赛灵思公司 | The solid state hard disc of variable bit rate |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1122473A (en) * | 1993-11-29 | 1996-05-15 | 大宇电子株式会社 | Fifo buffer system having an error detection and correction device |
| CN101140809A (en) * | 2007-09-07 | 2008-03-12 | 炬力集成电路设计有限公司 | Flash controller supporting pipelined error-correcting code and configurable operations and control method thereof |
| US20090193319A1 (en) * | 2008-01-24 | 2009-07-30 | International Business Machines Corporation | Data bus system, its encoder/decoder and encoding/decoding method |
-
2011
- 2011-07-28 CN CN2011102145783A patent/CN102279819A/en active Pending
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1122473A (en) * | 1993-11-29 | 1996-05-15 | 大宇电子株式会社 | Fifo buffer system having an error detection and correction device |
| CN101140809A (en) * | 2007-09-07 | 2008-03-12 | 炬力集成电路设计有限公司 | Flash controller supporting pipelined error-correcting code and configurable operations and control method thereof |
| US20090193319A1 (en) * | 2008-01-24 | 2009-07-30 | International Business Machines Corporation | Data bus system, its encoder/decoder and encoding/decoding method |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102915770A (en) * | 2012-10-17 | 2013-02-06 | 邹粤林 | Method for reducing inter-crosstalk of internal data of flash memory chip, flash memory storage system and controller thereof |
| CN102915770B (en) * | 2012-10-17 | 2013-12-25 | 邹粤林 | Method for reducing inter-crosstalk of internal data of flash memory chip, flash memory storage system and controller thereof |
| CN107852177A (en) * | 2015-07-01 | 2018-03-27 | 赛灵思公司 | The solid state hard disc of variable bit rate |
| CN107852177B (en) * | 2015-07-01 | 2021-01-01 | 赛灵思公司 | Variable Bit Rate Solid State Drive |
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