CN102111129B - There is the signal generator of output noise semiotic function and the method for output noise signal - Google Patents

Abstract

The invention discloses a signal generator 2 with the function of outputting noise signals. The signal generator 2 includes a control unit 21, an input unit 24, a non-volatile memory 22, a waveform processing unit 25, and a digital-to-analog conversion unit 26. The input unit 24. The non-volatile memory 22 and the waveform processing unit 25 are respectively connected to the control unit 21, and the digital-to-analog conversion unit 26 is connected to the waveform processing unit 25. The non-volatile memory 22 stores characteristic parameters 221, and the characteristic parameters include power-on The number of times 222, the control unit 21 is used to generate an initial value associated with the power-on times 222, the waveform processing unit 25 is used to use the initial value to generate a pseudo-random number sequence, and the digital-to-analog conversion unit 26 is used to count the pseudo-random number sequence Modular conversion. The signal generator 2 of the present invention solves the problem that the same noise is generated when the user uses the signal generator for many times.

Description

Signal generator with function of outputting noise signal and method for outputting noise signal

technical field

The invention relates to a multi-channel signal generator with the function of outputting noise signals, in particular to a multi-channel signal generator whose output noise has high randomness.

Background technique

As a common excitation source, signal generators have been widely used in scientific research and industrial engineering. A typical application of the signal generator is to simulate various signals in the laboratory, as the input stimulus of the circuit and system under test, and provide a simulation environment for testing various performance indicators of the circuit and system under test. Signal generators in the traditional sense are divided into four categories according to their signal waveforms: (1) sinusoidal signal generators: mainly used to measure frequency characteristics, nonlinear distortion, gain and sensitivity of circuits and systems; (2) function ( Waveform) signal generator: generate some specific periodic time function waveform (sine wave, square wave, triangle wave, sawtooth wave and pulse wave) signal, in addition to being used for communication, instrumentation and automatic control system testing, it is also widely used (3) Pulse signal generator: a generator that generates rectangular pulses with adjustable width, amplitude and repetition frequency, which can be used to test the transient response of linear systems, or used as analog signals to test radar, The performance of multi-channel communication and other pulse digital systems; (4) random signal generator: it can be used to simulate the noise in actual working conditions, and introduce the generated random signal into the system under test to measure the performance of the system; it can be added to the system under test A known noise signal is compared with the internal noise of the system to determine the noise figure; a random signal can also be used instead of a sinusoidal or pulse signal to determine the dynamic characteristics of the system, etc.

With the rapid development of electronic technology, the integration level is getting higher and higher, and now general signal generators can integrate the basic functions of the above four types of signal generators into one. Among them, there are many ways to generate random signals, which can be roughly divided into two categories. One is to use pure analog circuits to generate random noise; the other is to use microprocessors and software systems to generate random noise with pseudo-random sequences. The random noise mentioned here refers to the white noise, and the colored noise with special purpose can be obtained by filtering the white noise.

The Chinese Patent Application Publication No. CN85102755A titled "Multifunctional Random Signal Generator" discloses a multifunctional random signal generator. The following briefly introduces the working principle of the multifunctional random signal generator disclosed in this patent. Please refer to Figure 1, two independent normal white noise sources [1], [2] are used to generate normally distributed white noise. The Weibull noise forming circuit [3] is used to form Weibull white noise. The logarithmic-normal white noise forming circuit [4] is used to form logarithmic-normal white noise. The correlation noise forming circuit [5] is used to form various correlation noises. The power amplifier circuit [6] is used to amplify the generated noise signal and output it. The noise parameter test circuit [7] is used to indicate the shape and scale parameters of the output Weibull white noise and the effective voltage value of other noise waves. The switching elements [8], [9] realize the selective output of the noise signal.

The normal white noise generated by two independent normal white noise sources [1] and [2] is input to the Weibull white noise forming circuit [3], and then becomes Weibull white noise and output through the power amplifier [6]. After the white noise passes through the logarithmic-normal white noise forming circuit [4], it becomes logarithmic-normal white noise and is output through the power amplifier [6]. The above-mentioned three kinds of white noise can output the corresponding correlated noise after being acted on by the correlative noise formation circuit [5] and power amplifier. The switch element [8] is used to select one of the above three kinds of white noise, namely, normal white noise, Weibull white noise, and logarithmic-normal white noise, as the input of the correlation noise circuit [5] or directly as The input of the power amplifier [6] is selected by the switch element [9] to send white noise or its related noise into the power amplifier [6] circuit, and output after amplification.

Please refer to Fig. 2, Fig. 2 is the circuit diagram of normal white noise source [1], [2]. Among them, D1 is a Zener diode, which is a key component in the circuit. When a Zener diode avalanche breaks down, a lot of noise is generated. Using this feature, let the zener diode work in the noise area, and then amplify the white noise current generated by a transistor, and use the emitter follower as a buffer stage to obtain white noise with a normal distribution.

However, utilizing the reverse breakdown characteristic of the Zener diode requires better control of the reverse breakdown voltage. If the applied voltage is too low, the breakdown voltage cannot be reached, so that reverse breakdown cannot occur, and noise cannot be generated; if the applied voltage is too high, components may be burned out. Not only that, temperature also has an effect on the reverse breakdown voltage. As the temperature increases, the reverse breakdown voltage increases, and this effect is not strictly linear. This makes it even more difficult to provide the correct breakdown voltage for the Zener diode.

In addition, the method of generating random noise in analog circuits also has the following problems:

(1) There is a large gap between the theoretical design and the actual design of analog circuits, and it takes a lot of time to debug, including the matching of discrete components, which will greatly increase the project development time.

(2) The anti-interference ability of the analog circuit is poor, and when the external interference is large, it will often lead to a decrease in performance.

(3) After the design and production of the analog circuit is finalized, it is difficult to adjust the parameters according to the needs because the device type and position have been fixed.

In order to overcome the above-mentioned problems of analog circuits in the prior art, a microprocessor is often used to execute a program to generate a pseudo-random number sequence, and then perform digital-to-analog conversion on the pseudo-random number sequence to generate random noise. Among them, the pseudo-random number sequence refers to: if a sequence, on the one hand, it can be determined in advance, and can be repeatedly produced and reproduced; on the other hand, it has the random characteristics of a random sequence (that is, statistical characteristics) , we call this sequence a pseudo-random sequence.

However, the disadvantage of this method is that the processing time of the microprocessor is consumed to generate a pseudo-random number sequence, and the random sequence used should not be too long, which makes the period of the random sequence very limited due to this limitation, and cannot approach the real random number sequence. sequence.

In order to overcome the shortcomings of the above two methods, the prior art proposes a method for realizing pseudo-random sequence generation based on programmable logic devices. The following introduces a method of using FPGA to generate pseudo-random number sequences. First, an n-bit linear feedback shift register is formed inside the FPGA through programming, and programming can use VHDL language, Verilog language, etc. Please refer to FIG. 3 , the linear feedback thinks that register 1 includes n serially connected register units a ₀ to a _n-1 , n-1 switches C ₁ to C _n-1 , and n-1 exclusive OR gates D ₁ ~ _Dn-1 . The output end of the register unit a ₀ is connected to the input end of the register unit a ₁ , the output end of the register unit a ₁ is connected to the input end of the register unit a ₂ , and so on until the output end of the register unit a _n-2 is connected to the register Input to cell a _n-1 . The register unit a _n-1 is connected to an input end of the exclusive OR gate D _{n -1} , and the output end of the exclusive OR gate D n-1 is connected to an input end of the exclusive OR gate D _n-2 , and so on to the exclusive OR _The output terminal of gate D1 is connected to the input terminal of register unit _a0 . The output terminal of the register unit a _n-2 is connected to the other input terminal of the exclusive OR gate D _n-1 through the switch C _n -1, and the output terminal of the register unit a _n-2 is connected to the exclusive OR gate through the switch C _n-1 The other input terminal of _Dn-1 , and so on, the output terminal of the register unit _a0 is connected to the other input terminal _of the XOR gate D1 through the switch _C1 .

For the switches C ₁ -C _n-1 , a value of 1 is used to indicate that they are connected, and a value of 0 is used to indicate that they are disconnected. In addition, adding C ₀ =1 is used to indicate that the output terminal of the exclusive OR gate D ₁ is connected to the input terminal of the register unit a ₀ , and adding C _n=1 is used to indicate that the register unit a _n-1 is connected to the exclusive OR gate D _{n- 1} input. In this way, the values of C ₀ -C _n above reflect the feedback connection status of the linear feedback register 1 . The feedback connection state of the linear feedback shift register is described by the polynomial f(x):

$\mathrm{<span\; class="notranslate">\; f</span>}<span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; x</span>}<span\; class="notranslate">\; )</span><span\; class="notranslate">\; =</span>{\mathrm{<span\; class="notranslate">\; c</span>}}_{\mathrm{<span\; class="notranslate">\; 0</span>}}<span\; class="notranslate">\; +</span>{\mathrm{<span\; class="notranslate">\; c</span>}}_{\mathrm{<span\; class="notranslate">\; 1</span>}}\mathrm{<span\; class="notranslate">\; x</span>}<span\; class="notranslate">\; +</span><span\; class="notranslate">\; \&Center\; Dot;</span><span\; class="notranslate">\; \&Center\; Dot;</span><span\; class="notranslate">\; \&Center\; Dot;</span><span\; class="notranslate">\; +</span>{\mathrm{<span\; class="notranslate">\; c</span>}}_{\mathrm{<span\; class="notranslate">\; no</span>}}{\mathrm{<span\; class="notranslate">\; x</span>}}^{\mathrm{<span\; class="notranslate">\; no</span>}}<span\; class="notranslate">\; =</span>\underset{\mathrm{<span\; class="notranslate">\; i</span>}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; 0</span>}}{\overset{\mathrm{<span\; class="notranslate">\; no</span>}}{\mathrm{<span\; class="notranslate">\; \&Sigma;</span>}}}{\mathrm{<span\; class="notranslate">\; c</span>}}_{\mathrm{<span\; class="notranslate">\; i</span>}}{\mathrm{<span\; class="notranslate">\; x</span>}}^{\mathrm{<span\; class="notranslate">\; i</span>}}$

If the polynomial f(x) of degree n satisfies the following conditions:

(1) f(x) is a reduced polynomial (that is, a polynomial that cannot be factored);

(2) f(x) is divisible by (xp+1), p=2n-1;

(3) f(x) is indivisible (xq+1), q<p.

Then f(x) is called a primitive polynomial.

Theory has proved that when the coefficients C ₀ -C _n of the primitive polynomial are used as the feedback connection state of the linear feedback shift register 1 , the linear feedback shift register 1 can obtain m sequences.

The m-sequence is a commonly used pseudo-random sequence, which is also called the longest linear feedback shift sequence. The m-sequence is a sequence with the longest period generated by a linear feedback shift register. If an n-level linear feedback shift register is selected, the cycle of the m sequence is (2 ⁿ -1) clock cycles. That is to say, the output sequence begins to repeat after performing (2 ⁿ −1) shifts at most, that is, the maximum period of the sequence generated by the n-stage linear feedback shift register 1 is (2 ⁿ −1). In one cycle, the values in each register unit do not have any periodicity, therefore, in one cycle, the output of the n-stage shift register can be regarded as a random number.

Usually, the value of the register unit a _n-1 of the last stage can be used as an output. Please refer to FIG. 4 , it is also possible to combine the values of i register units arbitrarily into an i-bit number output.

For example, referring to Fig. 5, the original polynomial f(x)=x ¹²⁰ +x ¹¹³ +x ⁹ +x ² +1 used as the feedback connection state to configure the linear feedback shift register 1 requires another n=120, and The switches C ₂ , C ₉ , and C ₁₁₃ are turned on while the other switches are turned off, that is, the values in the register units a ₁ , a ₈ , a ₁₁₂ , and a ₁₁₉ are fed back for XOR operation, and the operation result is used as the register unit a ₀ input.

For another example, please refer to Fig. 6, use the primitive polynomial f(x)=x ²⁵ +x ³ +1 as the feedback connection state to configure the linear feedback shift register 1, then another n=25 is required to turn on the switch C ₃ When the other switches are turned off, the values in the register units a ₀ , a ₂ , and a ₂₄ are fed back for XOR operation, and the operation result is used as the input of the register unit a ₀ .

When the initial value of each register unit of the linear feedback shift register 1 is all 0, the linear feedback network loses its function, and the output sequence is always 0, so the initial value of the shift register cannot be 0, and the linear feedback shift register needs to be assigned 1 A non-zero initial value. Generally speaking, a fixed non-zero initial value can be configured for the linear feedback shift register 1 to solve the above problems.

However, under the condition that the linear feedback shift register 1 is a fixed non-zero initial value, the linear feedback shift register 1 starts from the fixed non-zero initial value every time it is powered on, and due to the pseudo-random The characteristic of the number sequence is periodic, therefore, the pseudo-random number sequence output by the linear feedback shift register 1 is the same every time it is powered on, which is difficult to meet the user's requirement for the randomness of the noise signal.

Contents of the invention

In order to solve the problem of low randomness of noise generated in the prior art, the present invention provides a signal generator that generates noise with high randomness.

At the same time, the invention also provides a method for generating an output noise signal with high noise randomness.

A signal generator with the function of outputting noise signals, the signal generator includes a control unit, an input unit, a non-volatile memory, a waveform processing unit and a digital-to-analog conversion unit, the input unit, the The non-volatile memory and the waveform processing unit are respectively connected to the control unit, the digital-to-analog conversion unit is connected to the waveform processing unit, the non-volatile memory stores characteristic parameters, and the The characteristic parameters include the number of power-on times, the control unit is used to generate an initial value associated with the number of power-on times, the waveform processing unit is used to use the initial value to generate a pseudo-random number sequence, and the digital-to-analog conversion unit It is used to perform digital-to-analog conversion on the pseudo-random number sequence.

A method for outputting a noise signal of a signal generator as described above, comprising the steps of: generating an initial value associated with the number of power-on times in the characteristic parameters of the signal generator; using the initial value to generate a pseudo A random number sequence; performing digital-to-analog conversion on the pseudo-random number sequence.

The advantages of the signal generator and the method for outputting noise signals of the present invention are: since the signal generator generates an initial value associated with the number of power-on times, and the number of power-on times will change after each power-on, it can ensure that the signal generator The initial value obtained after each power-on is different from the initial value obtained after the last power-on, which solves the problem that the user generates the same noise when using the signal generator multiple times, making the noise more random.

Description of drawings

FIG. 1 is a schematic diagram of a module structure of a prior art signal generator.

Fig. 2 is the circuit diagram of normal white noise source [1], [2].

Fig. 3 is a schematic diagram of the module structure of the linear feedback register.

FIG. 4 is a schematic diagram of another output mode of the linear feedback register.

FIG. 5 is a schematic diagram of a linear feedback configured for a feedback connection state of a register.

Fig. 6 is a schematic diagram of another feedback connection state configuration of the linear feedback to the register.

Fig. 7 is a schematic diagram of the module structure of the signal generator 2 according to the first embodiment of the present invention.

FIG. 8 is a block diagram of the 120-bit linear feedback shift register 251 of the signal generator 2 .

FIG. 9 is a flow chart of the working steps of the signal generator 2 .

Fig. 10 is a schematic diagram of the working principle of the signal generator according to the second embodiment of the present invention.

detailed description

The first embodiment of the signal generator of the present invention will be described below.

Referring to FIG. 7 , the signal generator 2 includes a control unit 21 , a non-volatile memory 22 , an interface unit 23 , an input unit 24 , a waveform processing unit 25 and a digital-to-analog conversion unit 26 . The non-volatile memory 22 , the interface unit 23 , the input unit 24 , and the waveform processing unit 25 are respectively connected to the control unit 21 , and the digital-to-analog conversion unit 26 is connected to the waveform processing unit 25 .

The control unit 21 is responsible for receiving and analyzing the instruction information input by the input unit 24, responsible for controlling the interface unit 23 to carry out data sending and receiving work, controlling the data stored in the non-volatile memory 22 to be read and stored, and responsible for according to the The instruction information configures the waveform processing unit 25 and the digital-to-analog conversion unit 26 . The waveform processing unit 25 is responsible for generating a digital sequence corresponding to the output waveform, and the digital-to-analog conversion unit 26 is responsible for performing digital-to-analog conversion on the digital sequence, and then outputting a waveform in an analog form.

Among the present embodiment, control unit 21 is made of DSP, and nonvolatile memory 22 flash memory (FLASH) is made of, and interface unit 23 comprises LAN, GPIB, USB, and input unit 24 is made of keyboard, and waveform processing unit 25 is made of FPGA, The digital-to-analog conversion unit 26 is constituted by a DAC.

Please refer to FIG. 7 and FIG. 8 together. The waveform processing unit ²⁵ is configured with a ¹²⁰ -bit linear feedback shift register 251 through programming. ⁹ +x ² +1 coefficient to configure. And the lower 14 bits of the linear feedback shift register 251 are taken out as a digital sequence and output to the digital-to-analog conversion unit 26 for digital-to-analog conversion.

Referring to FIG. 7 again, the non-volatile memory 22 stores characteristic parameters 221 , and the characteristic parameters 221 include boot times 222 and product serial numbers 223 . The number of power-on times 222 is the number of power-on times of the signal generator 2, and the value of the number of power-on times 222 will be increased by 1 every time the power-on time 222 is turned off and powered on again. The product serial number 223 is a fixed number of the signal generator 2 , and the product serial numbers 223 of any two products of the signal generator 2 are different.

After the signal generator 2 is turned on and powered on, if the signal generator 2 is set to the default output noise state through the input unit 24, or if the user inputs an output noise command through the input unit 24, the signal generator 2 follows the following process work, please refer to Figure 7 to Figure 9:

Step S1: the control unit 21 generates an initial value associated with the boot times 222 and the product serial number 223;

The control unit 21 reads the boot times 222 and the product serial number 223 from the non-volatile memory 22 to generate an initial value identical to the 251 digits of the linear feedback shift register. In this embodiment, the number of booting times 222 is a 32-bit number, for example, the current 20 booting times can be expressed as 00000014 in hexadecimal notation. The product serial number 223 is a 72-bit number, for example, 000901040000020208. Add 00000014 to the end of 000901040000020208 to get 104 digits, and then add 0 to the first 16 digits of 00000014 to get the initial value of 120 digits 000000090104000002020800000014.

As a modification, the high bit of 00000014 can also be supplemented by 1, that is, the 120-bit initial value 111100090104000002020800000014 can be obtained.

Step S2: the waveform processing unit 251 uses the initial value to generate a pseudo-random number sequence;

The control unit 21 sends the initial value to the waveform processing unit 25, and the waveform processing unit 25 loads the initial value into the linear feedback shift register 251, and makes the linear feedback shift register 251 start shifting to continuously generate pseudo-random number sequences. In this embodiment, 0x000000000000000000000000000014 is loaded to 120 bits of the linear feedback shift register 251. Although it can be deduced that the initial value obtained at the last power-on is 0x000000000000000000000000000013, although the difference between the two initial values is only 1, due to the adjacent number The positions in the pseudo-random number sequence are generally discontinuous, so the purpose of shifting from different positions in the pseudo-random number sequence is achieved.

Step S3: The digital-to-analog conversion unit 26 performs digital-to-analog conversion on the pseudo-random number sequence.

In this embodiment, the lower 14 digits in the register after each shift of the linear feedback shift register 251 are taken out, and the digital-to-analog conversion unit 26 performs digital-to-analog conversion on the lower 14 digits taken out each time to obtain a continuous analog noise signal .

As a modification, according to actual needs, all 120 digits of the register after each shift of the linear feedback shift register 251 can also be taken out, and the number of any register of the linear feedback shift register 251 can also be taken out for digital-to-analog conversion.

The advantage of the signal generator in this embodiment is that: since the control unit 21 of the signal generator 2 generates an initial value associated with the number of times of power-on 222 and the product serial number 223, the number of times of power-on 222 will change after each power-on , the product serial number 223 of each signal generator 2 is different, so two points can be guaranteed: 1. The initial value obtained after each power-on of a signal generator 2 is the same as the initial value obtained after the last power-on Different; 2. The initial values obtained by any two signal generators 2 under the same number of power-on times are also different. In this way, the problem that the user generates the same noise when using one signal generator 2 alone or using multiple signal generators 2 at the same time is improved.

As a variant implementation, the signal generator 2 may start to execute steps S1 and S2 after being powered on to make the linear feedback shift register start shifting. After the user inputs a command to output noise through the input unit 24, the signal generator 2 executes step S3 to start outputting noise.

The advantage of the above variant implementation is: please refer to FIG. 10 , even if it is assumed that the initial values obtained when one signal generator 2 is turned on twice or when two signal generators 2 are turned on are the same, that is, the linear feedback shift register It starts to shift from the same position of the m sequence, for example, it starts to shift from the initial value D ₀ at time t ₀ in FIG. , when a signal generator 2 inputs and outputs noise commands at different times t ₁ and t ₂ after starting up twice, or two signal generators 2 input and output noise commands at different times t ₁ and t ₂ after starting up, and because the m sequence is Periodically, this makes the values D ₁ , D ₂ corresponding to t ₁ , t ₂ different, thus further reducing the possibility of the same output noise.

Claims (10)

1. one kind has the signal generator of output noise semiotic function, it is characterized in that: described signal generator comprises a control unit, an input unit, a nonvolatile memory, a waveform processing unit and a D/A conversion unit, described input unit, described nonvolatile memory is connected with described control unit respectively with described waveform processing unit, described D/A conversion unit is connected with described waveform processing unit, described nonvolatile memory stores characteristic parameter, described characteristic parameter comprises start number of times, the initial value that described control unit is associated with described start number of times for generation of one, described start number of times upgrades when described signal generator is started shooting at every turn, described waveform processing unit is used for utilizing described initial value to produce pseudo-random number sequence, described D/A conversion unit is used for described pseudo-random number sequence to carry out digital-to-analogue conversion.

2. signal generator according to claim 1, is characterized in that: described characteristic parameter also comprises a product ID, and described initial value is also associated with described product ID.

3. signal generator according to claim 2, is characterized in that: described initial value equal described start number of times and described product ID group and.

4. signal generator according to claim 1, it is characterized in that: after described signal generator powers on, described control unit produces described initial value, described waveform processing unit produces pseudo-random number sequence, after described input unit receives an output noise order, described pseudo-random number sequence is carried out digital-to-analogue conversion by described D/A conversion unit again.

5. signal generator according to claim 1, it is characterized in that: described waveform processing unit comprises a linear feedback shift register for generation of M sequence, using the initial value of described initial value as described linear feedback shift register, described linear feedback shift register is constantly shifted and obtains described pseudo-random number sequence.

6., for a method for the output noise signal of signal generator as claimed in claim 1, comprise the steps:

Produce the initial value be associated with the start number of times in the characteristic parameter of described signal generator;

Described start number of times upgrades when described signal generator is started shooting at every turn,

Utilize described initial value to produce pseudo-random number sequence;

Described pseudo-random number sequence is carried out digital-to-analogue conversion.

7. method according to claim 6, is characterized in that: described characteristic parameter also comprises a product ID, and described initial value is also associated with described product ID.

8. method according to claim 7, is characterized in that: described initial value equals the combination of described start number of times and described product ID.

9. method according to claim 6, it is characterized in that: after described signal generator powers on, just perform step " produce an initial value be associated with start number of times " and " utilizing described initial value to produce pseudo-random number sequence ", after receiving an output noise order, perform step again " described pseudo-random number sequence is carried out digital-to-analogue conversion ".

10. method according to claim 6, it is characterized in that: describedly utilize described initial value to produce the step of pseudo-random number sequence to be: by described initial value as an initial value for generation of the linear feedback shift register of M sequence, described linear feedback shift register is constantly shifted and obtains described pseudo-random number sequence.