CN102006157B - Time synchronization method and system - Google Patents

Abstract

The present invention discloses a method and system for time synchronization, wherein the method includes: the master device notifies the slave device of its own physical network port rate information; Compare the network port rates, if they are not the same, then compensate the calculated average line transmission delay, otherwise, do not compensate. By adopting the technical scheme of the invention, in the delay request response mechanism, the delay asymmetry caused by the inconsistency of the master-slave physical network port speed can be solved, resulting in the phase asynchronous problem.

Description

A method and system for time synchronization

technical field

The present invention relates to the field of clock synchronization, in particular to a time synchronization method and system.

Background technique

In the communication system, with the continuous development of data services and multimedia services, IP-based packet network transmission of data has become the mainstream of development. At this time, on the one hand, new services and new applications put forward higher requirements on the synchronization performance of the network; on the other hand, the compatibility of traditional TDM (Time Division Multiplexing) services requires the packet network to provide high-quality Synchronization and timing performance.

IEEE1588 PTP (Precision Time Synchronization Protocol) is a time synchronization mechanism stipulated to overcome the lack of real-time performance of Ethernet. Its appearance has brought us hope. Its main principle is that all nodes in the network For time synchronization, an accurate time source periodically corrects and synchronizes the clocks of all nodes in the network.

IEEE 1588 PTP is an Ethernet clock synchronization protocol, which realizes master-slave synchronization through synchronization messages. The PTP standard protocol can be carried on Ethernet 802.3, UDP/IPv4 and UDP/IPv6, and the form of the 802.3 frame structure is shown in Table 1.

Table 1

The IEEE 1588v2 system is a master-slave synchronization system. During the synchronization process of the system, the master clock sends PTP time information according to the predetermined time interval, and the slave clock port receives the time stamp information sent by the master clock port, and the system calculates the master clock time information accordingly. Slave line time delay and master-slave time difference, and use the time difference to adjust the local time, so that the slave device time maintains the same frequency and phase as the master device time. The specific scheme is shown in Figure 1. The master device (Master) sends a Sync (synchronization) message and records the time t1. When the slave device (Slave) receives the Sync message, it records t2. The slave device learns t1 according to the Follow_up (tracking) message sent by the master device. The slave device correspondingly initiates a Delay_Req (delay request) message, and records the time t3 at the same time. After the master device receives the Delay_Req message, it records the time t4 and fills in the Delay_Resp (delay response) message. The slave device learns t4 according to the Delay_Resp (delayed response) message sent by the master device.

In FIG. 1 , t1 and t2 are the sending and receiving timestamps of the Sync message respectively, that is, t1 is the time when the Sync message leaves the master device, and t2 is the time when the Sync message arrives at the slave device. t3 and t4 are the sending and receiving timestamps of the Delay_Req message respectively, that is, t3 is the time when the Delay_Req message leaves the slave device, and t4 is the time when the Delay_Req message arrives at the master device.

Average line transmission delay mean_path_delay=[(t2-t1)+(t4-t3)]/2=[(t2-t3)+(t4-t1)]/2 (Formula 1)

The difference between the time of the slave device and the time of the master device is offset=[(t1-t2)+(t4-t3)]/2 (Formula 2)

Through the above two formulas, the time of the slave device can be synchronized with the master device.

At present, synchronization equipment manufacturers are trying to replace the GPS (Global Positioning System, Global Positioning System) clock source with the IEEE1588 network clock, but there are still some problems in the implementation of the released IEEE1588-2008.

Contents of the invention

The existing IEEE1588-2008 standard does not clearly describe whether the rates of the master and slave physical connection ports match. If the rates of the master and slave physical connection ports are inconsistent, the delay time from the master to the slave will be different from that from the slave to the master, resulting in Time synchronization error, resulting in phase asymmetry during synchronization.

The technical problem to be solved by the present invention proposes a time synchronization method and system to solve the problem of time asynchrony between the master and the slave due to the inconsistency of the physical rate of the time stamp interface between the master and the slave.

In order to solve the above problems, the present invention provides a method for time synchronization, including:

The master device informs the slave device of its own physical network port rate information;

After learning the physical network port rate of the master device, the slave device compares it with its own physical network port rate. If they are not the same, the calculated average line transmission delay is compensated; otherwise, no compensation is performed.

Preferably, the above method has the following characteristics:

The steps of the master device notifying the slave device of its own physical network port rate include:

The master device sends a notification message to the slave device, and the notification message carries the rate information of its own physical network port.

Preferably, the above method has the following characteristics:

Before the master device sends the notification message to the slave device, the master device writes its own physical network port rate information into the reserved byte between the domain number and the identification field of the notification message.

Preferably, the above method has the following characteristics:

In the physical network port speed information, 0001 represents the physical network port speed of 10M, 0010 represents the physical network port speed of 100M, 0100 represents the physical network port speed of 1000M, and 1000 represents the physical network port speed of 10000M.

Preferably, the above method has the following characteristics:

The slave device compensates the clock deviation by subtracting the delay error from the calculated average line transmission delay, wherein,

The delay error is:

L ₁ indicates the length of the entire frame except the frame preamble and check digit, L ₂ indicates the length of the check bit, L ₃ indicates the length of the frame preamble, Sm indicates the time for the physical network port of the master device to forward each bit of data, and Ss indicates the physical network port of the slave device The time for the network port to forward each bit of data.

In order to solve the above problems, the present invention provides a time synchronization system, including a master device and one or more slave devices,

The master device is used to inform the slave device of its own physical network port rate information;

After the slave device is used to learn the physical network port rate of the master device, it compares it with its own physical network port rate. If they are not the same, the calculated average line transmission delay is compensated, otherwise, no compensation is performed.

Preferably, the above system has the following characteristics:

The master device is further configured to notify the slave device of its own physical network port rate information by sending a notification message to the slave device, the notification message carrying its own physical network port rate information.

Preferably, the above system has the following characteristics:

The master device is further configured to write its own physical network port rate information into the reserved byte between the domain number and the identification field of the notification message before sending the notification message to the slave device.

Preferably, the above system has the following characteristics:

In the physical network port speed information, 0001 represents the physical network port speed of 10M, 0010 represents the physical network port speed of 100M, 0100 represents the physical network port speed of 1000M, and 1000 represents the physical network port speed of 10000M.

Preferably, the above system has the following characteristics:

The slave device is further configured to compensate the clock deviation by subtracting the delay error from the calculated average line transmission delay, wherein,

The delay error is:

L ₁ indicates the length of the entire frame except the frame preamble and check digit, L ₂ indicates the length of the check bit, L ₃ indicates the length of the frame preamble, Sm indicates the time for the physical network port of the master device to forward each bit of data, and Ss indicates the physical network port of the slave device The time for the network port to forward each bit of data.

By adopting the technical solution of the present invention, in the delay request response mechanism, the delay asymmetry caused by the inconsistency of the master-slave physical network port speed can be solved, resulting in the phase asynchronous problem.

Description of drawings

Figure 1 is a schematic diagram of a delayed request response mechanism;

Figure 2 is a schematic diagram of networking;

Fig. 3 is a flowchart of an application example of the present invention.

Detailed ways

First, analyze the problems in the prior art:

In the networking mode shown in Figure 2, if the rate of the physical interface between the master device and the slave device does not match, it will bring about an asymmetric delay problem. For Figure 2, we analyze under the following conditions:

1. Line transmission delays in both directions are equal;

2. The unknown network (cloud network) in the middle has the same delay;

3. Timestamp between the frame preamble and the destination MAC;

In order to analyze the problem, the following assumptions are made at the same time:

(1) UDP/IPv4/Ethernet header is adopted, including the check digit, and the entire packet length is 86 bits;

(2) The message frame is completely read into the cache by the switch and then forwarded;

(3) The frame leader is 8 bits;

(4) The check digit is 4 bits;

(5) The rate of the physical network port of the master device is Gigabit Ethernet;

(6) The speed of the physical network port of the slave device is 100M Ethernet;

In the direction from the master device to the slave device, the delay of the event message is:

t2-t1＝(L ₁ +L ₂ ) _bytes ×8 _bits/byte ×GE _ns/bit +D _PSN +(L ₃ ) _bytes ×8 _bits/byte ×FE _ns/bit (Formula 3)

Wherein, L ₁ represents the entire frame length except the frame preamble (pre-amble) and the parity bit (FCS);

L ₂ represents the length of the check bit (FCS);

L ₃ represents the frame preamble (pre-amble) length;

GE _ns/bit indicates the time for the 1000M physical network port to forward each bit of data;

FE _ns/bit indicates the time for the 100M physical network port to forward each bit of data;

D _PSN indicates the delay time of the data packet passing through the unknown network;

In the direction from the slave device to the master device, the delay of the event message is:

t4-t3＝(L ₁ +L ₂ ) _bytes ×8 _bits/byte ×FE _ns/bit +D _PSN +(L ₃ ) _bytes ×8 _bits/byte ×GE _ns/bit (Formula 4)

Among them, L ₁ , L ₂ , L ₃ , GE _ns/bit , FE _ns/bit , and D _PSN are the same as formula 3.

The average line transmission delay is as follows:

$N_{\mathrm{meanPathDelay}}=\frac{[(t2-t1)+(t4-t3)]}{2}$ (Formula 5)

Substituting formula (3) and formula (4) into formula (5) is:

$N_{\mathrm{meanPathDealy}}=\frac{(L_1+L_2+L_3)\×8\×{(\mathrm{GE}+\mathrm{FE})}_{\mathrm{ns}}}{2}+{\mathrm{D.}}_{\mathrm{PSN}}$ (Formula 6)

The above calculation results are based on the fact that the delay in the two directions of the master and slave is considered to be symmetrical, that is, it is considered

(t2-t1)=(t4-t3) (Formula 7)

In fact, the two are not equal.

Equation 3 minus Equation 6 calculates the delay error from Master to Slave and Slave to Master as follows:

$N_{\mathrm{meanPathDelayAssymmetry}}=(L_1+L_2)\×8\×\frac{\mathrm{GE}-\mathrm{FE}}{2}+L_3\×8\×\frac{\mathrm{FE}-\mathrm{GE}}{2}$ (Formula 8)

Equation 6 minus Equation 4 calculates the delay error from Master to Slave and Slave to Master as follows:

$N_{\mathrm{meanPathDelayAssymmetry}}=(L_1+L_2)\×8\×\frac{\mathrm{GE}-\mathrm{FE}}{2}+L_3\×8\×\frac{\mathrm{FE}-\mathrm{GE}}{2}$ (Formula 9)

For a 1000M physical network port, the time required to transmit a bit of data is 1ns, and for a 100M physical network port, the time required to transmit a bit of data is 10ns. Substituting into formula 8 or formula 9 can get,

$N_{\mathrm{meanPathDelayAssymmetry}}=(86+4)\×8\×\frac{1-10}{2}+8\×8\×\frac{10-1}{2}=-2952\mathrm{ns}$ (Formula 10)

It is theoretically deduced that for the master-slave, due to the mismatch between the speed of the 1000M physical network port and the 100M physical network port, an error of -2.952us will be caused, which will be mistaken for the deviation between the master and the slave. , the adjustment will cause the phase difference between master and slave.

In order to prove the correctness of this theory, the following experiment was done. The master device has a physical network port speed of 1000M, and the slave device has a physical network port speed of 100M. They have undergone one-level switching and nine-level switching respectively. The experimental results are shown in the table below. It can be seen from Table 2 that the increase in the number of switching stages has no effect on the asymmetry, which is caused by the rate mismatch between the master and slave physical network ports.

Table 2

Explanation: "-" indicates that the phase of the Slave is ahead of the phase of the Master

The same problem exists no matter whether the PTP message is carried on Ethernet 802.3 or on UDP/IPv4 and UDP/IPv6. As long as the rates of the physical network ports between the master and the slave are inconsistent, the delay time from the master to the slave will be different from the delay time from the slave to the master message, which will lead to the phase out of synchronization between the master and the slave after synchronization.

The present invention proposes to solve the problem of delay asymmetry caused by the inconsistency of the speed of the physical network ports between the master and the slave. The method is as follows: the master device informs the slave device of its own physical network port rate information; after the slave device learns the master device's physical network port rate, it compares it with its own physical network port rate. If they are not the same, the calculated average line The transmission delay is compensated, otherwise, no compensation is performed.

Specifically, the master device may send an Announce (notification) message to the slave device, and the notification message carries the rate information of its own physical network port.

The physical network port rate information can be located in the reserved (reserved) byte between domainNumber (domain number) and flagField (identification field), that is: before the master device sends a notification message to the slave device, the master device It can write its own physical network port rate information into the reserved byte between domainNumber and flagField of the notification message.

In the physical network port rate information, 0001 can be used to represent the 10M physical network port rate, 0010 can be used to represent the 100M physical network port rate, 0100 can be used to represent the 1000M physical network port rate, and 1000 can be used to represent the 10000M physical network port rate.

The slave device compensates the clock deviation by subtracting the delay error from the calculated average line transmission delay, wherein,

The delay error is: (Formula 11)

L ₁ indicates the length of the entire frame except the frame preamble and check digit, L ₂ indicates the length of the check bit, L ₃ indicates the length of the frame preamble, Sm indicates the time for the physical network port of the master device to forward each bit of data, and Ss indicates the physical network port of the slave device The time for the network port to forward each bit of data.

Correspondingly, the time synchronization system of the embodiment of the present invention includes a master device and one or more slave devices, wherein,

The master device notifies the slave device of its own physical network port rate information while implementing its master device function;

While the slave device is implementing its master device function, after knowing the physical network port rate of the master device through the Announce message, compare it with its own physical network port rate. If they are not the same, then calculate the average line transmission delay Compensation, otherwise, no compensation.

The master device may be further configured to notify the slave device of its own physical network port rate information by sending a notification message to the slave device, the notification message carrying its own physical network port rate information.

The master device is further configured to write its own physical network port rate information into the reserved byte between the domain number and domain identifier of the notification message before sending the notification message to the slave device.

The slave device may be further used to compensate the clock deviation by subtracting the delay error from the calculated average line transmission delay, wherein,

The delay error is:

L ₁ indicates the length of the entire frame except the frame preamble and check digit, L ₂ indicates the length of the check bit, L ₃ indicates the length of the frame preamble, Sm indicates the time for the physical network port of the master device to forward each bit of data, and Ss indicates the physical network port of the slave device The time for the network port to forward each bit of data.

In the following, the present invention is further described by adding an application example indicating the rate of the master device's physical network port in the header of the Announce message.

The model of applying 1588 for time synchronization is shown in Figure 2, which may pass through multiple switches and routers.

As shown in Figure 3, this example includes the following steps:

Step 301, the master device writes its own physical network port rate information into the reserved byte between the domainNumber and flagField of the Announce message, where 0001 means 10M, 0010 means 100M, 0100 means 1000M, and 1000 means 10000M;

Refer to Table 3 for the header of the original Announce packet, and refer to Table 4 for the header of the new Announce packet in this example;

Step 302, the master device sends the Announce message to the slave device;

Step 303, after receiving the Announce message from the device, analyze the physical network port rate of the master device;

Step 304, the slave device compares the parsed physical network port rate of the master device with the physical network port rate of the slave device, if they are the same, no compensation is performed, if not, the length of the message is parsed, and then according to formula 11 The calculated value is compensated.

By following the above steps, it can be ensured that when the speeds of the physical network ports between the master and the slave are inconsistent, there will be no problem of phase asymmetry after synchronization due to line asymmetry.

Table 3 Announce message header of the prior art

Table 4 Announce message header of this application example

Those skilled in the art can understand that all or part of the steps in the above method can be completed by instructing relevant hardware through a program, and the program can be stored in a computer-readable storage medium, such as a read-only memory, a magnetic disk or an optical disk, and the like. Optionally, all or part of the steps in the above embodiments can also be implemented using one or more integrated circuits. Correspondingly, each module/unit in the above embodiments can be implemented in the form of hardware, or can be implemented in the form of software function modules. The form is realized. The present invention is not limited to any specific combination of hardware and software.

The above descriptions are only preferred embodiments of the present invention, and are not intended to limit the present invention. For those skilled in the art, the present invention may have various modifications and changes. Any modifications, equivalent replacements, improvements, etc. made within the spirit and principles of the present invention shall be included within the protection scope of the present invention.

Claims (8)

1. a method for time synchronized, comprising:

The physical internet ports rate information of self is informed from equipment by main equipment;

Know the physical internet ports speed of main equipment from equipment after, compare with the physical internet ports speed of self, if not identical, then the average line transmission delay calculated is compensated, otherwise, do not compensate;

Described from equipment by the average line transmission delay calculated is deducted delay time error, clock jitter is compensated, wherein,

Described delay time error is: $N_{\mathrm{meanPathDelayAssymmetry}}=(L_1+L_2)\×8\×\frac{\mathrm{Sm}-\mathrm{Ss}}{2}+L_3\×8\×\frac{\mathrm{Ss}-\mathrm{Sm}}{2}$

L ₁represent whole frame length except frame preamble and check digit, L ₂represent check bit length, L ₃represent frame preamble length, Sm represents that the physical internet ports of main equipment forwards the time of every Bit data, and Ss represents the time forwarding every Bit data from the physical internet ports of equipment.

2. the method for claim 1, is characterized in that,

The physical internet ports speed of self is informed from the step of equipment and is comprised by described main equipment:

Main equipment, to from equipment dispatch order message, carries the physical internet ports rate information of self in described notice message.

3. method as claimed in claim 2, is characterized in that,

Described main equipment is to before equipment dispatch order message, and the physical internet ports rate information of self writes in the reserve bytes between the territory number of described notice message and identification field by described main equipment.

4., as the method in claims 1 to 3 as described in any one, it is characterized in that,

In described physical internet ports rate information, the physical internet ports speed, 0010 of 10M represents that 100M physical internet ports speed, 0100 represents that 1000M physical internet ports speed, 1000 represents 10000M physical internet ports speed to adopt 0001 to represent.

5. a system for time synchronized, comprises main equipment and one or more from equipment, it is characterized in that,

Main equipment is used for the physical internet ports rate information of self to inform from equipment;

From equipment for know main equipment physical internet ports speed after, compare with the physical internet ports speed of self, if not identical, then the average line transmission delay calculated compensated, otherwise, do not compensate;

Describedly be further used for, by the average line calculated transmission delay is deducted delay time error, compensating clock jitter from equipment, wherein,

Described delay time error is: $N_{\mathrm{meanPathDelayAssymmetry}}=(L_1+L_2)\×8\×\frac{\mathrm{Sm}-\mathrm{Ss}}{2}+L_3\×8\×\frac{\mathrm{Ss}-\mathrm{Sm}}{2}$

L ₁represent whole frame length except frame preamble and check digit, L ₂represent check bit length, L ₃represent frame preamble length, Sm represents that the physical internet ports of main equipment forwards the time of every Bit data, and Ss represents the time forwarding every Bit data from the physical internet ports of equipment.

6. system as claimed in claim 5, is characterized in that,

Main equipment is further used for, by from equipment dispatch order message, carrying the physical internet ports rate information of self, inform the physical internet ports rate information of self from equipment in described notice message.

7. system as claimed in claim 6, is characterized in that,

Described main equipment is further used for before equipment dispatch order message, is write by the physical internet ports rate information of self in the reserve bytes between the territory number of described notice message and identification field.

8., as the system in claim 5 ~ 7 as described in any one, it is characterized in that,

In described physical internet ports rate information, the physical internet ports speed, 0010 of 10M represents that 100M physical internet ports speed, 0100 represents that 1000M physical internet ports speed, 1000 represents 10000M physical internet ports speed to adopt 0001 to represent.