CN101908565A - Solar cell and manufacturing method thereof - Google Patents

Abstract

The present invention relates to a solar cell and a method of manufacturing the same. Provides high efficiency solar cells. A substrate, a lower electrode layer formed on the substrate, a semiconductor layer formed on the lower electrode layer, and an upper electrode layer formed on the semiconductor layer; the lower electrode layer is formed on the substrate The first lower electrode layer and the second lower electrode layer formed on the first lower electrode layer; the first lower electrode layer is made of a material with a lower resistivity than the second lower electrode layer formed.

Description

Solar cell and manufacturing method thereof

technical field

The present invention relates to a solar cell and a method of manufacturing the same.

Background technique

A solar cell converts light energy into electric energy, and various types of structures are proposed according to the semiconductor used. In recent years, CIGS type solar cells in which the manufacturing process is simple and high conversion efficiency can be expected have attracted attention. A CIGS type solar cell includes, for example: a first electrode film formed on a substrate, a thin film including a compound semiconductor (copper-indium-gallium-selenium compound) layer formed on the first electrode film, and a thin film formed on the thin film. on the second electrode film. Then, a second electrode film is formed in the groove from which a part of the thin film is removed, and the first electrode film and the second electrode film are electrically connected. (For example, refer to Patent Document 1).

[Patent Document 1] JP-A-2002-319686

However, in the above-mentioned solar battery, since the open circuit voltage obtained by a single cell is low, the electromotive force is improved by connecting a plurality of small cells in series and modularizing them. However, with this modularization, current paths increase (series resistance increases), so there is a problem of loss of current flowing through the conductive paths.

Contents of the invention

The present invention is made to solve at least a part of the problems described above, and can be implemented as the following forms or application examples.

(Application example 1) The solar cell in this application example is characterized by comprising a substrate, a lower electrode layer formed on the substrate, a semiconductor layer formed on the lower electrode layer, and a semiconductor layer formed on the semiconductor layer. The upper electrode layer; the lower electrode layer includes a first lower electrode layer and a second lower electrode layer; the first lower electrode layer is formed of a lower resistivity material than the second lower electrode layer.

According to this configuration, the lower electrode layer includes a first lower electrode layer and a second lower electrode layer, and the first lower electrode layer is an electrode layer having a lower resistivity than the second lower electrode layer. In this way, the lower electrode has a two-layer structure. For example, even if one of the lower electrode layers, the second lower electrode layer, has a relatively high resistivity, by auxiliary combining the first lower electrode layer with a low resistivity If formed, it is also possible to reduce the electrical efficiency of the lower electrode layer as a whole. That is, the sheet resistance of the lower electrode layer can be reduced. Accordingly, the loss of current flowing through the solar cell can be reduced.

(Application example 2) The solar cell in the above application example is characterized in that: the first lower electrode layer is formed on the substrate with silver or a compound mainly composed of silver; and the second lower electrode layer is formed with molybdenum. on the aforementioned first lower electrode layer.

According to this configuration, the first lower electrode layer formed of silver or a compound mainly composed of silver is formed on the substrate; the second lower electrode layer formed of molybdenum is formed on the first lower electrode layer. . However, for example, in a CIGS type solar cell, molybdenum is used as a material of the lower electrode layer. The reason for using molybdenum in the lower electrode layer is as follows. In the manufacturing process of the semiconductor layer (CIGS) of a CIGS type solar cell, a laminated precursor including a copper-gallium (Cu-Ga) alloy layer and an indium (In) layer ( precursor), and the stacked precursor is heated (selenized) in a hydrogen selenide atmosphere to form a semiconductor layer (CIGS). However, in this selenization treatment, if the material of the lower electrode layer is, for example, a material that easily forms an alloy with selenium, as a result of the alloy formation, expansion occurs in the semiconductor layer, and cracks and cracks may occur in the semiconductor layer due to the expansion. / or stripping etc. Therefore, molybdenum, which is excellent in selenium resistance, is used as the material of the lower electrode layer. However, the sheet resistance of the lower electrode layer is related to the electrical characteristics of molybdenum. Therefore, in the present invention, the first lower electrode layer using silver or a compound mainly composed of silver is formed to form the lower electrode layer together with the second lower electrode layer containing molybdenum. Thereby, the sheet resistance of the lower electrode layer can be reduced.

(Application Example 3) In the solar cell of the above application example, the first lower electrode layer has concavo-convex portions.

According to this configuration, since the first lower electrode layer has the concave-convex portion, among the light incident on the solar cell, the light reaching the first lower electrode layer is scattered by the concave-convex portion and absorbed by the semiconductor layer. That is, the light confinement effect is improved. Therefore, the conversion efficiency of the solar cell can be improved.

(Application example 4) The solar cell in the above application example is characterized in that: the first lower electrode layer is a nanowire layer mainly composed of silver or carbon formed on the substrate; the second lower electrode layer is formed of molybdenum. formed on the aforementioned first lower electrode layer.

According to this structure, by making the nanowire layer mainly composed of silver or carbon having a resistivity lower than that of molybdenum as the first lower electrode layer, and constituting the lower electrode layer together with the second lower electrode layer containing molybdenum, it is possible to reduce the The sheet resistance of the entire lower electrode layer.

(Application Example 5) In the solar cell of the above application example, the substrate is a transparent substrate, and the first lower electrode layer is formed in a grid or a line with silver or a compound mainly composed of silver. On the aforementioned substrate; the aforementioned second lower electrode layer is a transparent conductor formed on the aforementioned first lower electrode layer and on the aforementioned substrate.

According to this configuration, since it includes, for example, a transparent substrate and a lower electrode of a transparent conductor, it is possible to receive light from the surface side of the substrate. However, when the lower electrode is formed as a single layer, the sheet resistance of the lower electrode layer is related to the electrical characteristics of the transparent conductor. Therefore, in the present invention, the first lower electrode layer is formed using silver, which has a resistivity lower than that of the transparent conductor, or a compound mainly composed of silver. Furthermore, the lower electrode layer is constituted together with the second lower electrode layer which is a transparent conductor. Thereby, the sheet resistance of the entire lower electrode layer can be reduced. Furthermore, since the first lower electrode layer is formed in a grid or line shape, the incident light is not blocked, in other words, the light transmittance can be ensured, and the received light can reach the semiconductor layer.

(Application example 6) In the solar cell of the application example above, it is characterized in that: the substrate is a transparent substrate; The line layer; the second lower electrode layer is a transparent conductor formed on the first lower electrode layer and on the substrate.

According to this configuration, the first lower electrode layer of a nanowire layer mainly composed of silver or carbon having a resistivity lower than that of a transparent conductor is formed, and the lower electrode layer is formed together with the second lower electrode including a transparent conductor. The electrode layer can reduce the sheet resistance of the entire lower electrode layer. Furthermore, by forming the nanowire layer so as to secure an aperture ratio for receiving light, it is possible to allow received light to reach the semiconductor layer without blocking incident light.

(Application example 7) The solar cell manufacturing method of the application example above is characterized by comprising a lower electrode layer forming step of forming a lower electrode layer on a substrate, a semiconductor layer forming step of forming a semiconductor layer on the lower electrode layer, and The upper electrode layer forming step of forming an upper electrode layer on the semiconductor layer; the lower electrode layer forming step includes a first lower electrode layer forming step of forming a first lower electrode layer on the substrate; A second lower electrode layer forming step of forming a second lower electrode layer on the electrode layer; in the first lower electrode layer forming step, the first lower electrode layer having a lower resistivity than the second lower electrode layer is formed.

According to this configuration, the lower electrode layer is formed on the substrate. The lower electrode layer includes a first lower electrode layer and a second lower electrode layer, and an electrode layer having a resistivity lower than that of the second lower electrode layer is formed in the first lower electrode layer forming step. In this way, since the lower electrode is formed in a two-layer structure, for example, even if one of the lower electrode layers, the second lower electrode layer, has a relatively high resistivity, it is possible to auxiliary combine the first lower electrode layer with low resistance. By forming the lower electrode layer, the sheet resistance of the lower electrode layer as a whole can be reduced. Accordingly, the loss of current flowing through the solar cell can be reduced.

Description of drawings

FIG. 1 shows the configuration of a solar cell in the first embodiment, (a) is a cross-sectional view, and (b) is a partially enlarged cross-sectional view.

FIG. 2 is a process diagram showing a method of manufacturing a solar cell in the first embodiment.

3 is a process diagram showing a method of manufacturing a solar cell in the first embodiment.

Fig. 4 shows the configuration of a solar cell in the second embodiment, (a) is a sectional view, and (b) and (c) are partial sectional views.

Fig. 5 is a process diagram showing a method of manufacturing a solar cell in the second embodiment.

6 is a process diagram showing a method of manufacturing a solar cell in the second embodiment.

Explanation of symbols

1, 1a...solar cell, 10...substrate, 11...base layer, 12...lower electrode layer, 12a...first lower electrode layer, 12b...second lower electrode layer, 13...semiconductor layer, 13a...first semiconductor layer, 13b...second semiconductor layer, 14...upper electrode layer, 20...concave and convex portion, 31...first dividing groove, 32 ...the second division groove, 33...the third division groove, 40...the single battery.

Detailed ways

(first embodiment)

Hereinafter, the first embodiment embodying the present invention will be described with reference to the drawings. In addition, in order to make each member in each drawing into a recognizable size in each drawing, each member is illustrated with a different reduction scale.

(Structure of solar cell)

First, the configuration of the solar cell will be described. In addition, in this embodiment, the configuration of a CIGS type solar cell will be described. FIG. 1 shows the configuration of a solar cell in this embodiment, in which (a) is a cross-sectional view, and (b) is a partially enlarged cross-sectional view.

As shown in FIG. 1( a), a solar cell 1 includes a substrate 10, a base layer 11 formed on the substrate 10, a lower electrode layer 12 formed on the base layer 11, and a lower electrode layer 12 formed on the lower electrode layer 12. The semiconductor layer 13 and the aggregate of the unit cells 40 formed on the upper electrode layer 14 formed on the semiconductor layer 13 are constituted.

Adjacent single cells 40 are divided by third dividing grooves 33 . In addition, the lower electrode layer 12 is divided in units of unit cells 40 by the first dividing grooves 31 , and is formed across adjacent unit cells 40 . Furthermore, the lower electrode layer 12 and the upper electrode layer 14 are connected through the second dividing groove 32, and the upper electrode layer 14 of each unit cell 40 is connected to the lower electrode layer 12 of other adjacent unit cells 40, thereby making the The unit cells 40 are connected in series. In this way, by appropriately setting the number of single cells 40 connected in series, it is possible to arbitrarily design and change the desired voltage in the solar cell 1 .

The substrate 10 is a substrate having at least an insulating property on the surface on the side of the lower electrode layer 12 . Specifically, for example, a glass (blue plate glass or the like) substrate, a stainless steel substrate, a polyimide substrate, a mica substrate, or the like can be used.

The base layer 11 is an insulating layer formed on the substrate 10 , for example, an insulating layer mainly composed of SiO ₂ (silicon oxide) and/or an iron fluoride layer can be provided. This base layer 11 has insulating properties, and also has the function of ensuring the close adhesion between the substrate 10 and the lower electrode layer 12 formed on the substrate 10 and preventing Na from flowing from the glass substrate to the bottom when the substrate 10 is a blue plate glass. The function of electrode layer 12 diffusion. In addition, when the substrate 10 itself has the above-mentioned characteristics, the base layer 11 can be omitted.

The lower electrode layer 12 is composed of a first lower electrode layer 12a and a second lower electrode layer 12b. In this embodiment, the first lower electrode layer 12a is formed on the substrate 10 (base layer 11), and the second lower electrode layer 12b is formed on the first lower electrode layer 12a. Furthermore, the first lower electrode layer 12a is formed of a material having a lower resistivity than the second lower electrode layer 12b. Specifically, when molybdenum, which is excellent in selenization resistance, is used for the second lower electrode layer 12b, the first lower electrode layer 12a is made of a material with a resistivity lower than that of molybdenum, such as silver, or contains copper, silicon, nickel, Manganese and other compounds mainly composed of silver. In this way, by using a material with a low resistivity for the first lower electrode layer 12a, the resistance in the current flow path can be reduced. Therefore, the first lower electrode layer 12 a can also be referred to as an auxiliary electrode layer having an auxiliary function of reducing the sheet resistance of the lower electrode layer 12 as a whole.

Furthermore, the first lower electrode layer 12 a includes a concavo-convex portion 20 . In the present embodiment, as shown in FIG. 1( b ), a plurality of fine concavo-convex portions 20 are densely formed on substantially the entire surface of the first lower electrode layer 12 a in the direction of the semiconductor layer 13 . The concavo-convex portion 20 has concavities and convexities with a surface roughness of 0.5 μm or more, and is formed in, for example, a pyramid shape, a triangular groove shape, a rectangular groove shape, a dot shape, a mesh shape, or a combination of these shapes. In addition, the size and/or arrangement of each uneven portion 20 may be uniform or random. By providing the concave-convex portion 20 , light incident on the solar cell 1 can be scattered by the concave-convex portion 20 , and the scattered light can be absorbed by the semiconductor layer 13 . Thereby, the conversion efficiency of the solar cell 1 can be improved.

The semiconductor layer 13 is composed of a first semiconductor layer 13a and a second semiconductor layer 13b. The first semiconductor layer 13 a is formed on the lower electrode layer 12 and is a p-type semiconductor layer (CIGS semiconductor layer) containing copper (Cu), indium (In), gallium (Ga), and selenium (Se).

The second semiconductor layer 13b is formed on the first semiconductor layer 13a, and is an n-type semiconductor layer of cadmium sulfide (CdS), zinc oxide (ZnO), indium sulfide (InS), or the like.

The upper electrode layer 14 is a transparent electrode layer formed on the second semiconductor layer 13b, and is, for example, a transparent electrode body (TCO: Transparent Conducting Oxides) such as ZnOAl, AZO, or the like.

When light such as sunlight is incident on the CIGS type solar cell 1 constituted as described above, pairs of electrons (−) and holes (+) are generated in the semiconductor layer 13, and electrons (−) and holes (+) +) At the joint surface between the p-type semiconductor layer (first semiconductor layer 13a) and the n-type semiconductor layer (second semiconductor layer 13b), electrons (-) gather in the n-type semiconductor, and holes (+) gather in the p-type semiconductor . As a result, an electromotive force is generated between the n-type semiconductor layer and the p-type semiconductor layer. In this state, by connecting external wires to the lower electrode layer 12 and the upper electrode layer 14 , current can be extracted to the outside.

(Manufacturing method of solar cell)

Next, a method for manufacturing a solar cell will be described. In addition, in this embodiment, a method for manufacturing a CIGS type solar cell will be described. 2 and 3 are process diagrams showing a method of manufacturing a solar cell in this embodiment.

In the base layer forming step of FIG. 2( a ), the base layer 11 containing SiO ₂ is formed on one surface of a glass substrate 10 such as blue glass. Base layer 11 containing SiO ₂ can be formed on glass substrate 10 by sputtering, CVD, or the like. This base layer 11 prevents Na from diffusing from the blue glass substrate 10 to the lower electrode layer 12 and also functions to improve the adhesion between the blue glass substrate 10 and the lower electrode layer 12 . In addition, when the glass substrate 10 itself has the function of the said base layer, the base layer formation process can be omitted.

In the lower electrode layer forming step of FIGS. 2( b ) and ( c ), the lower electrode layer 12 is formed on the glass substrate 10 on which the base layer 11 is formed. The lower electrode layer forming step includes a first lower electrode layer forming step and a second lower electrode layer forming step. In the first lower electrode layer forming step shown in FIG. 2( b ), the first lower electrode layer is formed on the base layer 11. 12a. Next, in the second lower electrode layer forming step shown in FIG. 2( c ), the second lower electrode layer 12 b is formed on the first lower electrode layer 12 a.

In the first lower electrode layer forming process of FIG. 2(b), on the base layer 11, sputtering method, vapor deposition method, inkjet method, nano-imprint ink method, printing method, etc. are used to form the electrode layer that will become the first lower electrode layer. Silver (Ag) of the electrode layer 12a. In addition, as the material of the first lower electrode layer 12a, besides silver, it may be formed using a compound containing copper, silicon, nickel, manganese, or the like as a main component of silver.

Furthermore, in the first lower electrode layer forming step, the first lower electrode layer 12 a is formed to have the concavo-convex portion 20 . The concavo-convex portion 20 has concavities and convexities with a surface roughness of 0.5 μm or more, and is formed in, for example, a pyramid shape, a triangular groove shape, a rectangular groove shape, a dot shape, a mesh shape, etc., or a shape obtained by combining these shapes. In addition, the size and/or arrangement of each uneven portion 20 may be formed uniformly or randomly. In addition, the concavo-convex portion 20 may be formed by chemical treatment and/or mechanical treatment after the first lower electrode layer 12a having a flat surface is once formed.

In the second lower electrode layer forming step of FIG. 2( c ), a molybdenum (Mo) layer to be the second lower electrode layer 12 b is formed on the first lower electrode layer 12 a by sputtering. Thus, the lower electrode layer 12 composed of the first lower electrode layer 12 a and the second lower electrode layer 12 b is formed.

In the first dividing step in FIG. 2( d ), a part of the lower electrode layer 12 is removed by laser irradiation or the like, and the lower electrode layer 12 is divided in the thickness direction. In the portion where the lower electrode layer 12 is removed by laser irradiation or the like, the first dividing groove 31 is formed.

In the step of forming the first semiconductor layer in FIG. 2( e ), copper (Cu), indium (In) and gallium (Ga) are first deposited on the lower electrode layer 12 and the first dividing groove 31 by sputtering or the like. Inside, a precursor is formed. Then, the precursor is heated (selenized) in a hydrogen selenide atmosphere to form a p-type semiconductor layer (CIGS) that will become the first semiconductor layer 13a.

In the second semiconductor layer forming step shown in FIG. 3(f), an n-type semiconductor layer to be the second semiconductor layer 13b is formed on the first semiconductor layer 13a with CdS, ZnO and/or InS or the like. The second semiconductor layer 13b can be formed by sputtering or the like.

In the second dividing step in FIG. 3( g ), a part of the semiconductor layer 13 is removed by laser irradiation and/or metal probes, and the semiconductor layer 13 is divided in the thickness direction. In the portion where the semiconductor layer 13 is removed by laser irradiation or the like, the second dividing groove 32 is formed.

In the upper electrode layer forming step of FIG. 3( h ), the upper electrode layer 14 is formed on the semiconductor layer 13 . For example, a transparent electrode (TCO) such as AZO (Al-doped zinc oxide) to be an upper electrode layer is formed by a sputtering method or the like.

In the third division process of FIG. 3(i), a part of the upper electrode layer 14 and the semiconductor layer 13 is removed by laser irradiation and/or a metal probe, and the upper electrode layer 14 and the semiconductor layer 13 are removed in the thickness direction. segmentation. In the portion where the upper electrode layer 14 and the semiconductor layer 13 have been removed by laser irradiation or the like, the third dividing groove 33 is formed, whereby one unit cell 40 is formed.

Through the above-mentioned steps, a CIGS type solar cell 1 in which a plurality of unit cells 40 are connected in series on the same glass substrate 10 is formed.

Therefore, according to the first embodiment described above, the following effects can be achieved.

(1) On the substrate 10 (base layer 11 ), the lower electrode layer 12 composed of the first lower electrode layer 12 a and the second lower electrode layer 12 b is formed. The second lower electrode layer 12b is an electrode layer containing molybdenum (Mo), and the first lower electrode layer 12a is an electrode layer formed of a material (Ag, etc.) having a lower resistivity than molybdenum. Accordingly, since the first lower electrode layer 12 a assists in lowering the resistivity, the sheet resistance of the lower electrode layer 12 as a whole can be lowered. Thereby, the loss of the electric current flowing through the plurality of unit cells 40 can be reduced, and it is possible to provide a high-efficiency solar cell 1 .

(2) The concavo-convex portion 20 is formed on the surface of the first lower electrode layer 12 a in the direction of the first semiconductor layer 13 a. As a result, the light incident on the solar cell 1 is scattered by the concavo-convex portion 20 and the scattered light is absorbed by the semiconductor layer 13 , so that the conversion efficiency of the solar cell 1 can be improved.

(second embodiment)

Next, a second embodiment will be described with reference to the drawings. Specifically, a CIGS type solar cell capable of receiving light from both sides will be described. In addition, each member in each drawing is illustrated with a different scale for each member in order to make it a size that can be recognized in each drawing, and each member is added (similar to the first embodiment) mode) with the same notation.

(Structure of solar cell)

First, the configuration of the solar cell will be described. Fig. 4 shows the structure of the solar cell in this embodiment, in which (a) is a sectional view, and (b) and (c) are partial sectional views.

As shown in FIG. 4( a), the solar cell 1a includes a substrate 10, a base layer 11 formed on the substrate 10, a lower electrode layer 12 formed on the base layer 11, and a lower electrode layer 12 formed on the lower electrode layer 12. The semiconductor layer 13 and the aggregate of the unit cells 40 formed on the upper electrode layer 14 formed on the semiconductor layer 13 are constituted. In addition, since the structure between the adjacent unit cells 40 and the operation method of the solar cell 1a are the same as those of the first embodiment, description thereof will be omitted.

The substrate 10 is a transparent substrate, such as a glass substrate, a PET substrate, an organic transparent substrate, or the like. By using a transparent substrate, light from the surface of the substrate 10 can be received. In this embodiment, a blue plate glass substrate 10 is provided as a substrate.

The base layer 11 is an insulating layer formed on the blue glass substrate 10, for example, an insulating layer mainly composed of SiO ₂ (silicon oxide). Base layer 11 containing SiO ₂ can be formed on glass substrate 10 by sputtering, CVD, or the like. This base layer 11 prevents Na from diffusing from the blue glass substrate 10 to the lower electrode layer 12 and has the effect of improving the adhesion between the blue glass substrate 10 and the lower electrode layer 12 . In addition, when the blue glass substrate 10 itself has the above-mentioned characteristics, the base layer 11 can be omitted.

The lower electrode layer 12 is composed of a first lower electrode layer 12a and a second lower electrode layer 12b. In this embodiment, the first lower electrode layer 12a is formed on the blue glass substrate 10 (base layer 11), and the second lower electrode layer 12b is formed on the first lower electrode layer 12a. The second lower electrode layer 12b is a transparent electrode layer, for example, a transparent electrode (TCO: Transparent Conducting Oxides) layer such as AZO (Al-doped zinc oxide). By forming a transparent electrode layer, it is possible to transmit light incident from the blue glass substrate 10 side.

Furthermore, the first lower electrode layer 12a is formed of a material having a lower resistivity than the second lower electrode layer 12b. Specifically, a material having a resistivity lower than that of the transparent electrode body (TCO) of the second lower electrode layer 12b, such as silver, can be used. As another example, a compound mainly composed of silver containing copper, silicon, nickel, manganese, etc. can also be used. In this way, by using a material with a low resistivity, the first lower electrode layer 12a can reduce the resistance. As a result, the sheet resistance of the lower electrode layer 12 can be reduced. Therefore, the first lower electrode layer 12 a can also be called an auxiliary electrode layer having a function of auxiliary reducing the sheet resistance of the lower electrode layer 12 .

Furthermore, as shown in FIG. 4( b ), the first lower electrode layer 12 a is formed in a lattice shape. It is used to efficiently transmit the light incident from the direction of the blue glass substrate 10 . For this reason, it is preferable to form the first lower electrode layer 12a in a lattice shape so that the aperture ratio for light transmission becomes 90% or more. In addition, as shown in FIG. 4(c), the linear first lower electrode layer 12a may be formed. Even so, it is possible to transmit light incident from the direction of the blue glass substrate 10 . Also in this case, the linear first lower electrode layer 12a is formed such that the aperture ratio for light transmission becomes 90% or more in the same manner as above.

The semiconductor layer 13 is composed of a first semiconductor layer 13a and a second semiconductor layer 13b. The first semiconductor layer 13 a is formed on the lower electrode layer 12 and is a p-type semiconductor layer (CIGS semiconductor layer) containing copper (Cu), indium (In), gallium (Ga), and selenium (Se).

The second semiconductor layer 13b is formed on the first semiconductor layer 13a, and is an n-type semiconductor layer of cadmium sulfide (CdS), zinc oxide (ZnO), indium sulfide (InS), or the like.

The upper electrode layer 14 is a transparent electrode layer, for example, a transparent electrode body (TCO: Transparent Conducting Oxides) such as AZO (Al-doped zinc oxide).

In the CIGS solar cell 1a configured as described above, light can be received from both sides of the upper electrode layer 14 and the blue glass substrate 10 side.

(Manufacturing method of solar cell)

Next, a method for manufacturing a solar cell will be described. In addition, in this embodiment, a method of manufacturing a CIGS type solar cell capable of receiving light from both sides will be described. 5 and 6 are process diagrams showing a method of manufacturing a solar cell in this embodiment.

In the base layer forming step of FIG. 5( a ), the base layer 11 containing SiO ₂ is formed on one surface of the blue glass substrate 10 . Base layer 11 containing SiO ₂ can be formed on glass substrate 10 by sputtering, CVD, or the like. This base layer 11 prevents the diffusion of Na from the blue glass substrate 10 to the lower electrode layer 12 and also has the effect of improving the adhesion between the blue glass substrate 10 and the lower electrode layer 12 . In addition, when the blue plate glass substrate 10 itself has the above-mentioned base layer effect, the base layer forming process can be omitted.

In the lower electrode layer forming step of FIGS. 5( b ) and ( c ), the lower electrode layer 12 is formed on the blue glass substrate 10 on which the base layer 11 is formed. The lower electrode layer forming step includes a first lower electrode layer forming step and a second lower electrode layer forming step. In the first lower electrode layer forming step shown in FIG. 5( b ), the first lower electrode layer is formed on the base layer 11 12a. Next, in the second lower electrode layer forming step shown in FIG. 5( c ), the second lower electrode layer 12 b is formed on the first lower electrode layer 12 a.

In the first lower electrode layer forming process of FIG. 5(b), on the base layer 11, sputtering method, evaporation method, inkjet method, nano-imprint ink method, printing method, etc. are used to form the electrode layer that will become the first lower electrode layer. Silver (Ag) of the electrode layer 12a. In addition, as another material of the first lower electrode layer 12a, it may be formed using a compound containing copper, silicon, nickel, manganese, etc. and containing silver as a main component.

Furthermore, in the first lower electrode layer forming step, as shown in FIG. 4( b ) or ( c ), the first lower electrode layer 12 a is formed in a grid or line shape. In addition, the first lower electrode layer 12a is formed so that the aperture ratio through which light passes through becomes 90% or more in order to ensure the light receiving rate from the blue glass substrate 10 side.

In the second lower electrode layer forming step shown in FIG. 5( c ), the transparent second lower electrode layer 12 b is formed on the first lower electrode layer 12 a. For example, a transparent electrode body (TCO) such as AZO (Al-doped zinc oxide) is formed by a sputtering method or the like. Thus, the lower electrode layer 12 composed of the first lower electrode layer 12 a and the second lower electrode layer 12 b is formed.

In the first dividing step in FIG. 5( d ), a part of the lower electrode layer 12 is removed by laser irradiation or the like, and the lower electrode layer 12 is divided in the thickness direction. In the portion where the lower electrode layer 12 is removed by laser irradiation or the like, the first dividing groove 31 is formed.

In the step of forming the first semiconductor layer in FIG. 5(e), first, copper (Cu), indium (In) and gallium (Ga) are deposited on the lower electrode layer 12 and the first dividing groove by sputtering or the like. In 31, a precursor is formed. Then, the precursor is heated (selenized) in a hydrogen selenide atmosphere to form a p-type semiconductor layer (CIGS) that will become the first semiconductor layer 13a.

In the second semiconductor layer forming step shown in FIG. 6(f), an n-type semiconductor layer to be the second semiconductor layer 13b is formed on the first semiconductor layer 13a with CdS, ZnO and/or InS or the like. The second semiconductor layer 13b can be formed by sputtering or the like.

In the second dividing step in FIG. 6( g ), a part of the semiconductor layer 13 is removed by laser irradiation and/or a metal probe, and the semiconductor layer 13 is divided in the thickness direction. In the portion where the semiconductor layer 13 is removed by laser irradiation or the like, the second dividing groove 32 is formed.

In the upper electrode layer forming step of FIG. 6( h ), the upper electrode layer 14 is formed on the semiconductor layer 13 . For example, a transparent electrode body (TCO) such as AZO (Al-doped zinc oxide) to be an upper electrode layer is formed by a sputtering method or the like.

In the third division process of FIG. 6(i), a part of the upper electrode layer 14 and the semiconductor layer 13 is removed by laser irradiation and/or a metal probe, and the upper electrode layer 14 and the semiconductor layer 13 are removed in the thickness direction. segmentation. In the portion where the upper electrode layer 14 and the semiconductor layer 13 have been removed by laser irradiation or the like, the third dividing groove 33 is formed, whereby one unit cell 40 is formed.

By connecting a plurality of single cells 40 in series through the above-mentioned steps, a CIGS solar cell 1 a capable of receiving light from both sides of the blue glass substrate 10 and the upper electrode layer 14 is formed.

Therefore, according to the above-mentioned second embodiment, in addition to the effects of the first embodiment, there are also the following effects.

(1) The lower electrode layer 12 composed of the first lower electrode layer 12 a and the second lower electrode layer 12 b is formed on the blue plate glass substrate 10 (base layer 11 ). The second lower electrode layer 12b is composed of a transparent electrode body (TCO), and the first lower electrode layer 12a is formed as an electrode layer using a material (Ag, etc.) having a resistivity lower than that of the transparent electrode body (TCO). Accordingly, since the first lower electrode layer 12 a assists in lowering the resistivity, the sheet resistance of the lower electrode layer 12 as a whole can be lowered. Furthermore, the first lower electrode layer 12 a is formed in a lattice shape or a line shape. Thereby, light incident from the side of the blue glass substrate 10 can reach the semiconductor layer 13 efficiently. Accordingly, it is possible to provide a highly efficient solar cell 1a capable of receiving light from both sides.

In addition, it is not limited to the above-mentioned embodiment, The following modification examples are mentioned.

(Modification 1) In the above-mentioned embodiment, the first lower electrode layer 12 a is formed using silver or a compound mainly composed of silver, but the present invention is not limited thereto. For example, the first lower electrode layer 12a may be a nanowire layer mainly composed of silver or carbon. Also, when light is received from the blue plate glass substrate 10 side, the nanowire layer is formed so that the aperture ratio for light transmission becomes 90% or more in order to ensure the light transmittance. Even so, the same effect as above can be obtained.

(Modification 2) In the above-mentioned first embodiment, the concave-convex portion 20 is provided on the lower electrode layer 12, but, for example, as shown in Fig. 4(b) and (c) of the second embodiment, by forming The concavo-convex portion 20 is formed on the grid-like or linear first lower electrode layer 12a. Even so, the same effect as above can be obtained.

(Modification 3) In the above-mentioned embodiment, the first lower electrode layer 12 a is applied to a CIGS solar cell and described, but the present invention is not limited thereto. For example, it can also be applied to the structure of an electrode layer in a CIS (copper-indium-selenium compound) type solar cell and/or a thin-film silicon type solar cell. Even so, the sheet resistance of the electrode layer can be easily reduced.

Claims (7)

1. solar cell is characterized in that possessing:

Substrate,

Be formed at the lower electrode layer on the aforesaid base plate,

Be formed on the aforementioned lower electrode layer semiconductor layer and

Be formed at the top electrode layer on the aforesaid semiconductor layer;

Aforementioned lower electrode layer comprises the 1st lower electrode layer and the 2nd lower electrode layer;

Aforementioned the 1st lower electrode layer is compared with aforementioned the 2nd lower electrode layer, and the material low with resistivity constituted.

2. solar cell according to claim 1 is characterized in that:

Aforementioned the 1st lower electrode layer is that the compound of principal component is formed on the aforesaid base plate by silver or with silver;

Aforementioned the 2nd lower electrode layer is formed on aforementioned the 1st lower electrode layer by molybdenum.

3. solar cell according to claim 1 and 2 is characterized in that:

Aforementioned the 1st lower electrode layer has jog.

4. solar cell according to claim 1 is characterized in that:

Aforementioned the 1st lower electrode layer be formed on the aforesaid base plate, be the nano wire layer of principal component with silver or carbon;

Aforementioned the 2nd lower electrode layer is formed on aforementioned the 1st lower electrode layer by molybdenum.

5. solar cell according to claim 1 is characterized in that:

Aforesaid base plate is the substrate with transparency;

Aforementioned the 1st lower electrode layer is by silver or be the compound of principal component with silver and be formed on the aforesaid base plate by clathrate or wire;

Aforementioned the 2nd lower electrode layer is to be formed at the electric conductor with transparency that reaches on aforementioned the 1st lower electrode layer on the aforesaid base plate.

6. solar cell according to claim 1 is characterized in that:

Aforesaid base plate is the substrate with transparency;

Aforementioned the 1st lower electrode layer be formed on the aforesaid base plate, be the nano wire layer of principal component with silver or carbon;

Aforementioned the 2nd lower electrode layer is to be formed at the electric conductor with transparency that reaches on aforementioned the 1st lower electrode layer on the aforesaid base plate.

7. the manufacture method of a solar cell is characterized in that comprising following operation:

The lower electrode layer that forms lower electrode layer on substrate forms operation,

The semiconductor layer that on aforementioned lower electrode layer, forms semiconductor layer form operation and

The top electrode layer that forms top electrode layer on the aforesaid semiconductor layer forms operation;

Aforementioned lower electrode layer forms operation and is included in the 2nd lower electrode layer formation operation that the 1st lower electrode layer that forms the 1st lower electrode layer on the aforesaid base plate forms operation and form the 2nd lower electrode layer on aforementioned the 1st lower electrode layer;

Form in the operation at aforementioned the 1st lower electrode layer, form resistivity aforementioned 1st lower electrode layer lower than aforementioned the 2nd lower electrode layer.

Images