CN101814773A - Voltage balancing device of super capacitor bank and control method thereof - Google Patents

Abstract

The invention relates to a voltage balancing device, in particular to a device capable of balancing voltage among monomers of a series super capacitor bank and a control method thereof. The device comprises a series super capacitor bank, a switch array, a DC/DC converter, a balancing capacitor, a detection unit and a control unit, wherein the series super capacitor set, the switch array, the DC/DC converter and the balancing capacitor are connected in sequence; the input end of the detection unit is connected with the series super capacitor bank and the balancing capacitor, and the output end is connected with the control unit; the output end of the control unit is connected with the switch array and the DC/DC converter; a control signal output by the control unit controls the switch array and the DC/DC converter; and finally, energy transfer between the super capacitor bank and the balancing capacitor is realized. The invention only needs one DC/DC converter, and compared with a DC/DC converter method, power devices, such as inductance tubes, switching tubes and the like, are saved a lot, and thereby the system reliability is improved, and the energy consumption is reduced.

Description

Supercapacitor bank voltage equalization device and control method thereof

technical field

The invention relates to a voltage equalization device, in particular to a device and a control method capable of equalizing the voltage between individual cells of a series supercapacitor bank.

Background technique

The rated voltage of supercapacitors is low, and a large number of series connections are required in the application. Due to the dispersion of the characteristic parameters between each supercapacitor, the voltage between the monomers of the supercapacitor bank will be unbalanced under normal charging and discharging or in a static state, and overcharging and overdischarging will cause permanent damage to the supercapacitor. And then cause the failure of the whole energy storage system.

In order to balance the individual voltage of the supercapacitor bank connected in series, a voltage equalization circuit is generally used. Among them, passive equalization is to consume the excess energy of supercapacitors with high voltage, that is, consume energy through resistive devices; active equalization is an energy transfer type voltage equalization technology, that is, transfer energy through energy storage devices, with low energy consumption and Good controllability.

In the active equalization method, the flying capacitance method is to switch the equalizing capacitor in parallel between the single capacitor group with the highest voltage in the series capacitor group and the single capacitor group with the lowest series voltage to complete the charge transfer from the single capacitor with the highest voltage. Group to the transfer of the single capacitor group with the lowest voltage, so that the voltage of the single capacitor group with high voltage drops, and the voltage of the single capacitor group with low voltage rises, so as to achieve the purpose of balance. This voltage equalization method can perform voltage equalization quickly, has high voltage equalization accuracy and low loss, and can perform voltage equalization no matter in the charging and discharging state or in the static state. However, the dynamic performance of this voltage equalization method is poor, because it requires a relay network to gate the equalizing capacitor and the high-voltage capacitor (low-voltage capacitor). When the relay is turned on, the system has a large inrush current and the equipment reliability is low.

The DC/DC converter method in the active equalization method is to connect a DC/DC converter between every two adjacent supercapacitors. By comparing the voltages between adjacent supercapacitors, the supercapacitor with a higher voltage The energy is transferred to the capacitor with low voltage through the converter. For a series capacitor bank consisting of N capacitors, N-1 DC/DC converters are required. The advantage of this method is that the energy loss is low, the voltage equalization speed is fast, and the voltage equalization can be performed on both charging and discharging states. But the disadvantage is that many power devices such as inductors and switching tubes are needed, the control is complicated, and the cost is high.

Contents of the invention

The purpose of the present invention is to overcome the above-mentioned defects of the existing supercapacitor voltage equalization technology, and provide a new voltage equalization method-the flyover converter method for series supercapacitor banks. This method uses the advantages of DC/DC converter voltage stabilization and good dynamic performance to solve the problem of large system inrush current in the flying capacitor method, and can effectively control the energy flow between the balance capacitor and the series supercapacitor group monomers, so that The voltage equalization circuit has low energy consumption, fast equalization speed, small impact current and low cost.

In order to achieve the above object, the present invention adopts the following technical solutions. The present invention includes a series supercapacitor group 1 , a switch array 2 , a DC/DC converter 3 , a balancing capacitor 4 , a detection unit 5 and a control unit 6 . in:

The supercapacitor group 1 is connected to the detection unit 5 , and the voltage signal, current signal and temperature signal are detected by the detection unit 5 . The voltage signal is to detect the voltage of each individual supercapacitor and the voltage on the balance capacitor; the current signal is to detect the current on the balance capacitor, and use the current signal to judge the charging and discharging state of the super capacitor bank; the temperature signal is to detect the super capacitor bank. Temperature, since the state and parameters of the supercapacitor are affected by its own temperature, real-time detection of temperature can help to accurately estimate the state of the supercapacitor, so as to better balance the control.

The control unit 6 is connected with the detection unit 5, processes the voltage, current and temperature signals input by the detection unit 5, and outputs the control signals of the relay switch array 2 and the DC/DC converter 3;

The series supercapacitor bank 1, the switch array 2, the DC/DC converter 3 and the balancing capacitor 4 are connected in sequence, the input terminal of the detection unit 5 is connected to the series supercapacitor bank 1 and the balancing capacitor 4, and the output terminal is connected to the control unit 6 , the output terminal of the control unit 6 is connected with the switch array 2 and the DC/DC converter 3, and the control signal output by the control unit 6 controls the switch array 2 and the DC/DC converter 3, and finally realizes the supercapacitor bank 1 and the balancing capacitor 4 energy transfer between. The balancing capacitor 4 is a capacitor for energy transfer with the supercapacitor bank 1 to realize the voltage equalization function of the supercapacitor bank.

The gating sequence of the switch array and the control mode of the DC/DC converter are implemented in the following steps:

(1) The detector 5 detects the current of the balancing capacitor 4, and transmits the current to the control unit 6, and the control unit 6 judges the charging and discharging state of the supercapacitor bank according to the detected magnitude and direction of the current on the balancing capacitor. If the supercapacitor bank is in the charging state, the control strategy in the charging state is selected; otherwise, the control strategy in the discharging state is selected.

The control strategy during the described state of charge is as follows:

1) The detection unit 5 detects the individual voltages of the supercapacitor group 1 (the voltage of a single supercapacitor in the supercapacitor group) and the voltage of the balancing capacitor 4;

2) The control unit 6 finds out the supercapacitor with the largest voltage in the supercapacitor bank, and its voltage is denoted as Umax, and sends a control signal to the switch array 2, so that the supercapacitor with the largest voltage is connected to the DC/DC converter,

3) The control unit 6 sends a control signal to the power switch of the DC/DC converter 3, so that the DC/DC converter 3 works in a boost state;

4) When ΔU _a and ΔU _b satisfy ΔU _b ≥ kΔU _a , k∈[0, 1], the control unit 6 sends a signal to the switch array 2 to connect the new capacitor with the highest voltage to the DC/DC converter;

Among them: U _full is the rated voltage when the super capacitor is fully charged, U _new is the voltage of the capacitor with the highest voltage newly generated during the charging process, U _old is the voltage of the capacitor connected to the DC/DC converter before; ΔU _a = U _full -U _new , ΔU _b =U _new -U _old , k is any constant between [0, 1].

The control strategy during the described discharge state is as follows:

1) The detection unit 5 detects the individual voltages of the super capacitor group 1 and the voltage _Uf of the equalizing capacitor 4;

2) The control unit 6 finds out the supercapacitors with the _maximum voltage (Umax) and the minimum voltage ( _Umin ) in the supercapacitor bank, and finds their average voltage U _ave (the maximum voltage of the supercapacitor bank and the minimum voltage of the single unit mean value), compare U _ave with the voltage U _f of the balancing capacitor;

If U _ave is greater than or equal to the equalizing capacitor voltage, the control unit 6 outputs a control signal so that the capacitor with the maximum gate voltage of the switch array 2 is connected to the DC/DC converter 3, and the control unit 6 inputs the control signal to the DC/DC converter 3, Make it work in the positive boost state, charge the equalizing capacitor 4 to U _av , U _av is the average value of the equalizing capacitor voltage and the voltage of the supercapacitor group monomer connected in parallel with the equalizing capacitor;

If U _ave is less than the balance capacitor voltage, the control unit 6 outputs a control signal to make the capacitor with the minimum gate voltage of the switch array 2 connected to the DC/DC converter 3, and the control unit 6 inputs the control signal to the DC/DC converter 3, so that It works in the reverse boost state, charging the equalizing capacitor 4 to U _av ;

3) Repeat step 1) to check whether the voltages of the individual cells in the series supercapacitor group 1 meet the control requirements for balanced precision. The balanced precision includes two indicators, namely, the voltage variance δ _v and the maximum voltage deviation Δ _v . If the voltage meets the voltage variance and maximum voltage deviation requirements at the same time, the equalization is stopped.

The voltage variance δ _v is calculated by the following formula:

${\mathrm{\δ}}_v=\underset{i=1}{\overset{N}{\mathrm{\Σ}}}{(v_i-v_{\mathrm{avg}})}^2\≤{\mathrm{\ϵ}}_1,$ In the formula: v _i is the voltage value of a single cell in the super capacitor group, v _avg is the average voltage value of each super capacitor in the super capacitor group, N is the number of super capacitors in the super capacitor group, ε ₁ is a positive given Fixed value, the value range is generally [0, 1], which determines the requirements for control accuracy.

The maximum voltage deviation _Δv is calculated by the following formula:

Δ _v = max |v _i -v _j |≤ε ₂ , v _i and v _j are the voltage values of two different super capacitors in the super capacitor bank, and ε ₂ is also a positive given value, and the value range is generally It is [0, 0.25], which determines the allowable value of the maximum voltage.

Compared with the prior art, the present invention has the advantages of:

1) The present invention uses a DC/DC converter to solve the disadvantages of large inrush current and low equipment reliability of the flying capacitor system, and realizes the controllable energy flow between the series capacitor bank and the balancing capacitor.

2) The present invention only needs one DC/DC converter, which has fewer power devices such as inductance and switching tubes than the DC/DC converter method, so that the system reliability is improved and energy consumption is reduced.

Description of drawings

Figure 1 is a block diagram of the voltage equalization system

Figure 2 is the circuit diagram of the flying DC/DC converter method

Figure 3 is a flow chart of voltage equalization control

In the figure: 1. Series supercapacitor bank, 2. Switch array, 3. DC/DC converter, 4. Equalizing capacitor, 5. Detection unit, 6. Control unit.

Detailed ways

Below in conjunction with Fig. 1, Fig. 2, Fig. 3 the present invention will be further described:

As shown in FIG. 1 , this embodiment includes a series supercapacitor bank 1 , a switch array 2 , a DC/DC converter (DC-DC converter) 3 , a balancing capacitor 4 , a detection unit 5 and a control unit 6 . The detection unit 5 is used to detect the voltage of each supercapacitor group 1 monomer and the balancing capacitor 4, and the control unit 6 enables the switch array 2, so that the series connected supercapacitor group 1 and the DC/DC converter 3 and the balancing capacitor 4 are gated, In this way, the energy flow between the series supercapacitor bank 1 and the balancing capacitor 4 is realized.

As shown in FIG. 2 , a group of supercapacitors connected in series, four individual supercapacitors 100 , 101 , 102 and 103 are selected to illustrate the connection of specific circuits. The voltage balancing circuit is composed of a switch array 211 , a DC/DC converter 311 and a balancing capacitor 400 . The switch array is composed of switches 200 , 201 , 202 and 203 .

The first terminal 01 of the switch 200 is connected to the positive terminal a0 of the supercapacitor, and the second terminal 02 is connected to the connection midpoint a1 of two adjacent supercapacitors 100 and 101; the first terminal 11 of the switch 201 is connected to the switch The second terminal 02 of 200, the second terminal 12 is connected to the connection midpoint a2 of two adjacent supercapacitors 101 and 102, the third terminal 13 is connected to the third terminal 03 of the switch 200, the fourth terminal The terminal 14 is connected to the fourth terminal 04 of the switch 200; the connection method of the subsequent switches is similar to this. The function of the switch array is to connect the balancing capacitor 400 in parallel with the two supercapacitors to be balanced, so as to transfer the charge of the supercapacitor with high voltage to the supercapacitor with low voltage through the balancing capacitor 400 .

The DC/DC converter 3 is composed of two power switch tubes, two diodes and an inductor. The diode 300 is connected in parallel to both ends of the power switch 302 , the diode 301 is connected in parallel to both ends of the power switch 303 , the power switch 302 is connected in series with the power switch 303 , and one end of the inductance is connected to the middle point b1 of the power switch 302 and the power switch 303 . These power devices ultimately form a Boost-Buck (boost-boost) power converter. When the voltage of a single supercapacitor group is greater than the voltage on the balancing capacitor, the power switch 302 is turned on, and the power switch 303 is turned off. voltage state (the so-called forward direction: the input terminal of the DC/DC converter is a supercapacitor bank, and the output terminal is a balancing capacitor), and the energy is transferred from the supercapacitor bank to the balancing converter 400; When the voltage is low, the power switch 302 is turned off, the power switch 303 is turned on, the diode 300 and the inductor 304 form a boost circuit, and the DC/DC converter works in a reverse boost state (so-called reverse: the input terminal of the DC/DC converter is a balancing capacitor, and the output end is a supercapacitor bank), and the energy is transferred from the balancing converter 400 to the supercapacitor bank. The bidirectional DC/DC converter has the advantages of simple structure, low energy consumption, high stability and easy realization.

The gating sequence of the switch array and the control mode of the DC/DC converter are shown in Figure 3. The specific implementation steps are as follows:

(1) Judging the charge and discharge state of the supercapacitor bank by detecting the magnitude and direction of the current on the balance controller 4 . If the supercapacitor bank is in the charging state, the control strategy in the charging state is selected; otherwise, the control strategy in the discharging state is selected.

(2) If the supercapacitor is in charging state, proceed as follows:

1) The detection unit 5 detects the voltage of each cell of the supercapacitor bank 1 (the voltage of a single supercapacitor in the supercapacitor bank) and the voltage of the balancing capacitor 4 .

2) The control unit 6 finds the supercapacitor with the highest voltage in the supercapacitor bank, and its voltage is denoted as Umax, and sends a control signal to the switch array 2 to connect the supercapacitor with the highest voltage to the DC/DC converter.

3) The control unit 6 sends a control signal to the power switch of the DC/DC converter 3 to make the DC/DC converter 3 work in a boost state.

4) When ΔU _a and ΔU _b satisfy ΔU _b ≥ kΔU _a (k∈[0,1]), the control unit 6 sends a signal to the switch array 2 to connect the new capacitor with the highest voltage to the DC/DC converter.

Among them: U _full is the rated voltage when the super capacitor is fully charged, U _new is the voltage of the capacitor with the highest voltage newly generated during the charging process, U _old is the voltage of the capacitor connected to the DC/DC converter before; ΔU _a = U _full -U _new , ΔU _b =U _new -U _old , k is any constant between [0, 1].

(3) If the supercapacitor is in a discharge state, proceed as follows:

1) The detection unit 5 detects the voltage of each individual cell of the supercapacitor group 1 and the voltage of the balancing capacitor 4 .

2) The control unit 6 finds out the supercapacitors with the maximum voltage (U _max ) and the minimum voltage (U _min ) in the supercapacitor bank, and calculates their average voltage u _ave , and compares U _ave with the voltage U _f of the balancing capacitor;

If U _ave is greater than or equal to the equalizing capacitor voltage, the control unit 6 outputs a control signal so that the capacitor with the maximum gate voltage of the switch array 2 is connected to the DC/DC converter 3, and the control unit 6 inputs the control signal to the DC/DC converter 3, Make it work in positive boost state. Charge the equalizing capacitor 4 to U _av ;

If U _ave is less than the balance capacitor voltage, the control unit 6 outputs a control signal to make the capacitor with the minimum gate voltage of the switch array 2 connected to the DC/DC converter 3, and the control unit 6 inputs the control signal to the DC/DC converter 3, so that It works in reverse boost state. Charge the equalization capacitor 4 to U _av ,

3) Repeat step 1) to check whether the voltages of the individual cells in the series supercapacitor group 1 meet the control requirements for balanced precision. The balanced precision includes two indicators, namely, the voltage variance δ _v and the maximum voltage deviation Δ _v . If the voltage meets the voltage variance and maximum voltage deviation requirements at the same time, the equalization is stopped.

The voltage variance δ _v is calculated by the following formula:

${\mathrm{\δ}}_v=\underset{i=1}{\overset{N}{\mathrm{\Σ}}}{(v_i-v_{\mathrm{avg}})}^2\≤{\mathrm{\ϵ}}_1,$ In the formula: v _i is the voltage value of a single cell in the super capacitor group, v _avg is the average voltage value of each super capacitor in the super capacitor group, N is the number of super capacitors in the super capacitor group, ε ₁ is a positive given Fixed value, the value in this embodiment is 0.8, which determines the requirements for control accuracy.

The maximum voltage deviation _Δv is calculated by the following formula:

Δ _v =max|v _i -v _j |≤ε ₂ , v _i , v _j are the voltage values of two different super capacitors in the super capacitor bank respectively, and ε ₂ is also a positive given value, in this embodiment The value is 0.25, which determines the allowable value of the maximum voltage.

Claims (2)

1. voltage balancing device of super capacitor bank is characterized in that: comprise serial connected super capacitance group (1), switch arrays (2), DC/DC converter (3), equalizing capacitor (4), detecting unit (5) and control unit (6); Wherein: serial connected super capacitance group (1), switch arrays (2), DC/DC converter (3) is connected successively with equalizing capacitor (4), the input of detecting unit (5) is connected with equalizing capacitor (4) with serial connected super capacitance group (1), output is connected with the input of control unit (6), the output of control unit (6) is connected with DC/DC converter (3) with switch arrays (2), the control signal of control unit (6) output is come control switch array (2) and DC/DC converter (3), finally realizes the energy delivery between super capacitor group (1) and the equalizing capacitor (4).

2. a control method that is used for the described voltage balancing device of super capacitor bank of claim 1 is characterized in that, this method may further comprise the steps:

Detector (5) detects the electric current of equalizing capacitor (4), and give control unit (6) with this electric current transmission, control unit (6) is judged the charging and discharging state of bank of super capacitors (1) according to the size and Orientation of electric current on the detected equalizing capacitor, if the super capacitor group is in charged state, control strategy when then taking charged state, otherwise, the control strategy when taking discharge condition;

Control strategy during described charged state is as follows:

1) detecting unit (5) detects each monomer voltage of super capacitor group (1) and equalizing capacitor (4) voltage;

2) control unit (6) is found out the super capacitor of voltage maximum in the super capacitor group, and its voltage is designated as Umax, and sends control signal for switch arrays (2), and the super capacitor of voltage maximum is connected with the DC/DC converter;

3) control unit (6) sends control signal to the power switch of DC/DC converter (3), makes DC/DC converter (3) be operated in pressure-increasning state;

4) as Δ U _aWith Δ U _bSatisfy Δ U _b〉=k Δ U _aThe time, k ∈ [0,1], control unit (6) sends signal to switch arrays (2), and the highest capacitor of new voltage is connected with the DC/DC converter;

Wherein: U _FullRated voltage when being full of electricity for super capacitor, U _NewBe the voltage of the electric capacity that the new voltage that produces is the highest in the charging process, U _OldBe the capacitance voltage that links to each other with the DC/DC converter before; Δ U _a=U _Full-U _New, Δ U _b=U _New-U _Old, k is the arbitrary constant between [0,1];

Control strategy during described discharge condition is as follows:

1) detecting unit (5) detects each monomer voltage of super capacitor group (1) and equalizing capacitor (4) voltage U _f

2) control unit (6) is found out the maximum U of voltage in the super capacitor group _MaxWith minimum U _MinSuper capacitor, and obtain their average voltage U _Ave, compare U _AveVoltage U with equalizing capacitor _f

If U _AveMore than or equal to equalizing capacitor voltage, then control unit (6) output control signal is joined the capacitor of switch arrays (2) gate voltage maximum and DC/DC converter (3), control unit (6) is to DC/DC converter (3) input control signal, make it be operated in the forward pressure-increasning state, equalizing capacitor (4) is charged to U _Av, U _AvIt is the average of equalizing capacitor voltage and the super capacitor group monomer voltage in parallel with equalizing capacitor;

If U _AveLess than equalizing capacitor voltage, then control unit (6) output control signal is joined the capacitor of switch arrays (2) gate voltage minimum and DC/DC converter (3), control unit (6) is to DC/DC converter (3) input control signal, make it be operated in reverse pressure-increasning state, equalizing capacitor is filled (4) to U _Av

3) repeating step 1), check whether each monomer voltage of serial connected super capacitance group (1) satisfies accuracy of equalization control requirement, and the described accuracy of equalization comprises two indexs, i.e. voltage variance δ _vWith the maximum voltage deviation delta _vIf each monomer voltage satisfies voltage variance and maximum voltage deviation simultaneously, then stops equilibrium.

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