CN101752231B - Ion injection method of bag-shaped injection region and manufacture method of MOS (Metal Oxide Semiconductor) transistor - Google Patents
Ion injection method of bag-shaped injection region and manufacture method of MOS (Metal Oxide Semiconductor) transistor Download PDFInfo
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- CN101752231B CN101752231B CN2008102041797A CN200810204179A CN101752231B CN 101752231 B CN101752231 B CN 101752231B CN 2008102041797 A CN2008102041797 A CN 2008102041797A CN 200810204179 A CN200810204179 A CN 200810204179A CN 101752231 B CN101752231 B CN 101752231B
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Abstract
The invention relates to an ion injection method of a bag-shaped injection region for forming an MOS (Metal Oxide Semiconductor) transistor and a manufacture method of the MOS transistor, wherein the ion injection method of a bag-shaped injection region for forming the MOS transistor comprises the following steps of: rotating a wafer for a first angle by using a straight line which runs through the center of the wager and is vertical to the wafer as a rotating shaft; injecting source/drain region ions for forming the bag-shaped injection region; rotating the wafer for a second angle by using the straight line as a rotating shaft, wherein the rotating direction of the first angle is the same as that of the second angle; and by keeping the ion injection direction unchanged, repeatedly carrying out the steps of injecting the source-drain region ion for forming the bag-shaped injection area and rotating the wafer for the second angle until the wafer returns to the state after the wafer is rotated for the first angle. Compared with the prior art, the invention can control the junction capacitance of the MOS transistor.
Description
Technical field
The present invention relates to the manufacturing field of semiconductor device, relate in particular to the ion injection method of formation MOS transistor bag shape injection region and the manufacture method of MOS transistor.
Background technology
Along with semiconductor device develops to high density and small size, Metal-oxide-semicondutor (MOS) transistor is main actuating force.And drive current and hot carrier injection are of paramount importance two parameters of MOS transistor design.Traditional design is injected the performance that (pocket implant) distinguishes and source/drain electrode injection shape and heat budget or the like obtain to expect by doping shape, the bag shape of control gate oxide layer, channel region, well area, source/drain extension region.
Along with the channel length of MOS device shortens, too approaching between source/drain electrode depletion region, can cause occurring undesirable break-through (punch through) electric current, produced short-channel effect.Therefore, those skilled in the art adopts lightly doped drain (lightly doped drain usually, LDD) structure, formation source/drain extension region, in the source/drain extension region implant heavier dopant ion for example arsenic ion forming super shallow junction, with the threshold voltage vt that improves device and the effective short-channel effect of control device.And,, can near source/drain extension region, form the bag shape injection region (pocket/halo) of encirclement source/drain extension region for the semiconductor device of the following size of 0.18um.The existence of bag shape injection region can reduce the degree of exhaustion of depletion region, to produce less penetrating current.
But, lightly doped drain (lightly doped drain, LDD) doping ionic species of structure is different with the conduction type of the dopant well in Semiconductor substrate or formation MOSFET zone, and the conduction type of bag shape injection zone is identical with the conduction type of the dopant well in Semiconductor substrate or formation MOSFET zone, therefore, between source/drain extension region and bag shape injection region, can produce PN junction, dopant ion density in ldd structure and bag shape injection region produces junction leakage all than under the condition with higher.
Can in No. 200610030636.6 disclosed content of Chinese invention patent, find about the more details that form bag shape injection region.
But,, how to control the junction capacitance C of MOS transistor along with further reducing of dimensions of semiconductor devices
J0Become the another demand of industry.
Summary of the invention
Technical problem to be solved by this invention is: junction capacitance how to control MOS transistor.
For addressing the above problem, the invention provides a kind of ion injection method that forms MOS transistor bag shape injection region, comprise step: with described wafer serving as axle rotation first angle by crystal circle center and perpendicular to the straight line of wafer; Source/drain region the ion that forms bag shape injection region injects; Serves as axle rotation second angle with described wafer with described straight line, and the direction of rotating second angle is identical with the direction of rotation first angle; The direction that keeps ion to inject is constant, and the source/drain region ion that repeats to form bag shape injection region injects and rotate the step of second angle, the state after wafer is got back to rotation first angle.
Alternatively, the orientation index of described wafer is＜100 〉, described first angle is 30 to 40 degree or 50 to 60 degree.
Alternatively, described second angle is 90 degree, 45 degree or 22.5 degree.
Alternatively, the direction of described ion injection becomes 60 degree to 90 degree with wafer.
Alternatively, the summation of rotating second angle is 360 degree.
According to a further aspect in the invention, provide a kind of manufacture method of MOS transistor, comprise step: on Semiconductor substrate, form grid structure; Carrying out source/drain extension region in the Semiconductor substrate of grid structure both sides injects; With described wafer serving as axle rotation first angle by crystal circle center and perpendicular to the straight line of wafer; Source/drain region the ion that forms bag shape injection region injects; Serves as axle rotation second angle with described wafer with described straight line, and the direction of rotating second angle is identical with the direction of rotation first angle; The direction that keeps ion to inject is constant, and the source/drain region ion that repeats to form bag shape injection region injects and rotate the step of second angle, the state after wafer is got back to rotation first angle; Formation source/drain electrode in the Semiconductor substrate of grid structure both sides.
Alternatively, the orientation index of described wafer is＜100 〉, described first angle is 30 to 40 degree or 50 to 60 degree.
Alternatively, described second angle is 90 degree, 45 degree or 22.5 degree.
Alternatively, the direction of described ion injection becomes 60 degree to 90 degree with wafer.
Alternatively, the summation of rotating second angle is 360 degree.
Compared with prior art, the present invention can control the junction capacitance of MOS transistor.
In addition, the present invention has creatively selected to form bag initial rotation angle degree that the ion of shape injection region injects, and has found the technological parameter that can further reduce the MOS transistor junction capacitance.
Description of drawings
Fig. 1 is a flow chart of making MOS transistor according to one embodiment of the invention;
Fig. 2 to Fig. 7 is a schematic diagram of making MOS transistor according to above-mentioned flow process;
Fig. 8 is the graph of a relation between first angle beta and the MOS transistor junction capacitance made.
Embodiment
The present inventor finds, carrying out bag shape injection region when mixing, and the difference of initial rotation angle degree can influence the junction capacitance of made MOS transistor.
Based on above-mentioned consideration, in the following content of embodiment, provide a kind of manufacture method of MOS transistor, as shown in Figure 1, comprise step:
S101 provides wafer;
S102 forms grid structure on wafer;
S103 carries out source/drain extension region and injects in the grid structure both sides;
S104 rotates first angle with wafer;
S105, the source/drain region ion that forms bag shape injection region injects;
S106 rotates second angle with wafer;
S107, repeating step S105 and S106 form bag shape injection region;
S108, formation source/drain region.
Below in conjunction with accompanying drawing above-mentioned steps is elaborated.
As shown in Figure 2, at first execution in step S101 provides wafer 201.The material that forms wafer 201 can be silicon, III-V family or II-VI compound semiconductor or silicon-on-insulator (SOI).In wafer, form isolation structure 202, described isolation structure 202 can for shallow trench isolation from (STI) structure or selective oxidation silicon (LOCOS) isolation structure.Also be formed with the gate channel layer of various traps (well) structure and substrate surface in the described wafer 201.In general, the ion doping conduction type that forms trap (well) structure is identical with gate channel layer ion doping conduction type, and density is low than gate channel layer; The degree of depth that ion injects is general encloses extensivelyr, need reach the degree of depth greater than isolation structure simultaneously.In order to simplify, only with a blank wafer 201 diagrams, should not limit protection scope of the present invention herein at this.
Then execution in step S102 as shown in Figure 3, forms grid structure 203.The process that forms grid structure 203 is at first to form gate dielectric layer 204 and grid 205 on wafer 201 successively.
Wherein, gate dielectric layer 204 can be silica (SiO
2) or silicon oxynitride (SiNO).At the following process node of 65nm, the characteristic size of grid is very little, gate dielectric layer 204 preferred high-k (high K) materials.Described hafnium comprises hafnium oxide, hafnium silicon oxide, nitrogen hafnium silicon oxide, lanthana, zirconia, zirconium silicon oxide, titanium oxide, tantalum oxide, strontium barium oxide titanium, barium monoxide titanium, strontium oxide strontia titanium, aluminium oxide etc.Particularly preferably be hafnium oxide, zirconia and aluminium oxide.
Then, form offset spacers (Offset Spacer) 206 so that the edge of protection grid 205 in polysilicon gate 205 peripheries.The material that forms offset spacers 206 can for example be a silicon nitride, can adopt the method for in-situ oxidation to form.
Then execution in step S103 as shown in Figure 4, is a mask with offset spacers 206, carries out ion and inject formation source/drain extension region 207 in the wafer 201 of grid structure 203 both sides.The conduction type of described source/drain extension region 207 is N type or P type, and the ion that promptly carries out 207 injections of source/drain extension region can be selected from any one of phosphonium ion, arsenic ion, boron difluoride ion, boron ion or indium ion.
The technology of carrying out 207 injections of source/drain extension region is: when the injection ion was arsenic ion, ion implantation energy was 2KeV to 5KeV, and ion implantation dosage is 5 * 10
14/ cm
2To 2 * 10
15/ cm
2When the injection ion was phosphonium ion, ion implantation energy was 1KeV to 3KeV, and ion implantation dosage is 5 * 10
14/ cm
2To 2 * 10
15/ cm
2
When the injection ion was the boron ion, ion implantation energy was 0.5KeV to 2KeV, and ion implantation dosage is 5 * 10
14/ cm
2To 2 * 10
15/ cm
2When the injection ion was the boron difluoride ion, ion implantation energy was 1KeV to 4KeV, and ion implantation dosage is 5 * 10
14/ cm
2To 2 * 10
15/ cm
2
Then execution in step S104 as shown in Figure 5, rotates first angle beta with wafer 201, and described first angle beta is less than 90 degree.Here, step S104 is the first step that forms bag shape injection region 208 (with reference to figure 6).
Among the step S104, the rotation of wafer 201 is with the center 231 by wafer 201, and is rotated for axle perpendicular to the straight line of wafer 201.That is to say that wafer 201 is to be rotated in being parallel to the plane of its circular surface.
The angle of rotating among the step S104 can find a reference point, i.e. breach (notch) 230 on the wafer 201.This breach 230 is the little grooves that are used for the location, crystal orientation on wafer 201 edges, is being used for that such breach is all arranged on each wafer of semiconductor manufacturing.Certainly, selected this breach 230 only is the angle of demarcating rotation for convenience, should not one skilled in the art will appreciate that selected other reference points also can realize purpose of the present invention on wafer as to scope restriction of the present invention at this.
The direction of rotating among the step S104 can be a clockwise direction, also can be that counterclockwise this can set according to actual needs.In following embodiment, describe to adopt the anticlockwise example that rotates to be.And about the scope that the inventor creatively draws first angle beta, will discuss below.
Execution in step S105 forms source/drain region ion injection of bag shape injection region 208 then.
To form a bag shape injection region 208 is example to inject the boron ion, carry out concrete technological parameter that the boron ion injects can for: ion implantation energy is 4KeV to 8KeV; Ion implantation dosage is 4 * 10
13/ cm
2To 6 * 10
13/ cm
2Inventor's discovery, though above-mentioned technological parameter can be realized aforementioned purpose,, in order to form a bag shape injection region 208 better, the energy that carries out the injection of boron ion is preferably 5KeV to 6KeV, for example 5.5KeV; Implantation dosage is preferably 5 * 10
13/ cm
2
As shown in Figure 6, carrying out the boron ion here injects can to adopt with the form an angle inclination of α of wafer 201 and injects.Carry out injection angle α that the boron ion injects can for 60 degree to 90 degree.
In addition, the inventor also finds, adopts the boron fluoride ion to replace the boron ion to form bag injection of shape injection region 208, better effects if.Because the ionic diameter of boron fluoride ion is bigger, do not pass through lattice structure in the lattice structure of easier embedding wafer 201.Certainly, here, adopting boron ion and boron fluoride ion all is preferred embodiment, one skilled in the art will appreciate that according to prior art to adopt other ions to form bag shape injection region 208.
Then execution in step S106 as shown in Figure 7, rotates the second angle γ with wafer 201.
Identical with step S104, the rotation of the wafer 201 among the step S106 also is with the center 231 by wafer 201, and is rotated for axle perpendicular to the straight line of wafer 201.Be that wafer 201 is to be rotated in being parallel to the plane of its circular surface.
The direction of rotation of step S106 is identical with the direction of rotation among the step S104, if step S106 and step S104 counter-rotating can not realize purpose of the present invention, be among the step S104 if turn clockwise, then the rotation among the step S106 also should be clockwise, if and the rotation among the step S104 is to be rotated counterclockwise, then the rotation among the step S106 also should be counterclockwise.
The preferred angle of the second angle γ can be 90 degree, 45 degree or 22.5 degree.But one skilled in the art will appreciate that the second angle γ also can be other angles.
With the purpose of the wafer 201 rotation second angle γ is at the follow-up ion that carries out once more when injecting, and it is more even to be in the source region of each MOS transistor of diverse location on the wafer 201 and ion that the drain region is accepted.
Execution in step S107 then, repeating step S105 and S106 form a bag shape injection region 208.
Step S105 and step S106 and step S107 carry out for the ion that will form bag shape injection region 208 injects to be divided into repeatedly, and the ion that all allows wafer 201 rotate a certain angle uniform distribution to inject before each the injection.
Repeated execution of steps S105 and S106, the state after wafer 201 is got back to rotation first angle is promptly got back to state as shown in Figure 5.In one embodiment of the invention, wafer 201 only returns to turn around and gets final product, and that is to say that the summation that repeating step S106 rotates the second angle γ is 360 degree.Therefore, in this embodiment, the number of times of repeating step S105 and S106 is relevant with the size of the second angle γ.For example,, only need the state after rotation just can be got back to rotation first angle for 4 times, and 45 need rotate the state that just can get back to for 8 times after rotating first angle when spending as the second angle γ, by that analogy when the second angle γ is 90 when spending.
In one embodiment of the invention, the inventor with orientation index for＜100 wafer be example, investigate with the relation of the junction capacitance of the MOS transistor that finally produces wafer being rotated the first different angle betas.
Fig. 8 is the graph of a relation between first angle beta and the MOS transistor junction capacitance made.As shown in Figure 8, the junction capacitance of MOS transistor is relevant with first angle beta.And, more than one of the first optimum angle beta, but spend the junction capacitance minimum of made MOS transistor when first angle beta equals 35 degree or 55.And the inventor thinks, when first angle beta at 30 degree between 40 degree or when 50 degree were between 60 degree, the junction capacitance of MOS transistor was all in smaller scope, thereby these two first angle beta scopes all are acceptables.
Before the present invention, the someone does not find when the ion that carries out bag shape injection region injects, and has relation between the junction capacitance of initial rotation angle degree and the final MOS transistor that forms, and just more the initial rotation angle degree is not carried out optimization yet.The inventor thinks, because by changing the wafer initial angle, can change raceway groove and ion injection direction at the relative angle between projection on the wafer, also change simultaneously ion and injected the interior channel path of wafer, thereby effectively changed the horizontal and vertical distribution of the bag shape ion injection that is injected in the raceway groove.By optimizing initial rotation angle, can reach the effect of optimizing Impurity Distribution and suppressing channeling effect to greatest extent, thereby obviously reduce the source substrate doping density that leaks down, effectively improve the substrate junction capacitance.The present inventor has found above-mentioned relation, thereby can control the junction capacitance of made MOS transistor by rotating different initial angles.Further, the inventor has creatively selected to make the initial angle of MOS transistor junction capacitance minimum.
Last execution in step S108, formation source/drain region (figure does not show).In the process that forms source region and drain region, the step of activation injection ions such as thermal annealing can also be arranged.The processing step that forms source region and drain region is well known to those skilled in the art, does not repeat them here.
Though the present invention with preferred embodiment openly as above; but it is not to be used for limiting claim; any those skilled in the art without departing from the spirit and scope of the present invention; can make possible change and modification, so protection scope of the present invention should be as the criterion with the scope that claim of the present invention was defined.
Claims (10)
1. an ion injection method that forms MOS transistor bag shape injection region is characterized in that, comprises step:
The wafer that the grid structure both sides inject is formed active/drain extension region by ion is serving as axle rotation first angle by described crystal circle center and perpendicular to the straight line of wafer;
Source/drain region the ion that forms bag shape injection region injects;
Serves as axle rotation second angle with described wafer with described straight line, and the direction of rotating second angle is identical with the direction of rotation first angle;
The direction that keeps ion to inject is constant, and the source/drain region ion that repeats to form bag shape injection region injects and rotate the step of second angle, the state after wafer is got back to rotation first angle.
2. the ion injection method of formation MOS transistor bag shape as claimed in claim 1 injection region is characterized in that: the orientation index of described wafer is＜100 〉, described first angle is 30 to 40 degree or 50 to 60 degree.
3. the ion injection method of formation MOS transistor bag shape as claimed in claim 1 injection region is characterized in that: described second angle is 90 degree, 45 degree or 22.5 degree.
4. the ion injection method of formation MOS transistor bag shape as claimed in claim 1 injection region is characterized in that: the direction that described ion injects becomes 60 degree to 90 degree with wafer.
5. the ion injection method of formation MOS transistor bag shape as claimed in claim 1 injection region is characterized in that: the summation of rotating second angle is 360 degree.
6. the manufacture method of a MOS transistor is characterized in that, comprises step:
On Semiconductor substrate, form grid structure;
Carrying out source/drain extension region in the Semiconductor substrate of grid structure both sides injects;
With described wafer serving as axle rotation first angle by crystal circle center and perpendicular to the straight line of wafer;
Source/drain region the ion that forms bag shape injection region injects;
Serves as axle rotation second angle with described wafer with described straight line, and the direction of rotating second angle is identical with the direction of rotation first angle;
The direction that keeps ion to inject is constant, and the source/drain region ion that repeats to form bag shape injection region injects and rotate the step of second angle, the state after wafer is got back to rotation first angle;
Formation source/drain electrode in the Semiconductor substrate of grid structure both sides.
7. the manufacture method of MOS transistor as claimed in claim 6 is characterized in that: the orientation index of described wafer is＜100 〉, described first angle is 30 to 40 degree or 50 to 60 degree.
8. the manufacture method of MOS transistor as claimed in claim 6 is characterized in that: described second angle is 90 degree, 45 degree or 22.5 degree.
9. the manufacture method of MOS transistor as claimed in claim 6 is characterized in that: the direction that described ion injects becomes 60 degree to spend to 90 with wafer.
10. the manufacture method of MOS transistor as claimed in claim 6 is characterized in that: the summation of rotating second angle is 360 degree.
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| CN101908487B (en) * | 2009-06-05 | 2012-07-11 | 中芯国际集成电路制造(上海)有限公司 | Ion implantation method of bag-shaped implanted region and manufacturing method of MOS (Metal Oxide Semiconductor) transistor |
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| US6171913B1 (en) * | 1998-09-08 | 2001-01-09 | Taiwan Semiconductor Manufacturing Company | Process for manufacturing a single asymmetric pocket implant |
| US6458665B1 (en) * | 1999-05-10 | 2002-10-01 | Hyundai Electronics Industries Co., Ltd. | Halo ion implantation method for fabricating a semiconductor device |
| CN1901203A (en) * | 2005-07-21 | 2007-01-24 | 台湾积体电路制造股份有限公司 | Semiconductor device and method of forming a semiconductor structure |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101908487B (en) * | 2009-06-05 | 2012-07-11 | 中芯国际集成电路制造(上海)有限公司 | Ion implantation method of bag-shaped implanted region and manufacturing method of MOS (Metal Oxide Semiconductor) transistor |
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