CN101639508B - Detection circuit and display - Google Patents

Abstract

The invention relates to a detection circuit used for detecting signal lines in a display area. The detection circuit includes a short circuit, a plurality of first short-circuit switches, and a plurality of second short-circuit switches. The plurality of first and second short-circuit switches are respectively arranged on two sides of the display area to increase the space of adjacent short-circuit switches, thereby reducing the coupling effect. In the detection circuit, a first short-circuit switch is electrically connected between the short-circuit line and the first end of a signal line, and a second short-circuit switch is electrically connected between the second end of the signal line and another signal line between the second ends of . In addition, the present invention also relates to a display, which includes a display area and a detection circuit. The invention effectively solves the high cost and inconvenience caused by cutting the detection circuit in the prior art, and the invention uses short-circuit switches on different sides of the display pixel area to reduce the interference and coupling effect between adjacent short-circuit switches .

Description

A detection circuit and a display

technical field

The present invention relates to a detection circuit of a liquid crystal display, more specifically, relates to a detection circuit in which short-circuit switches are respectively arranged on different sides of a pixel area to reduce interference and coupling effects.

Background technique

Please refer to Figure 1. FIG. 1 is a schematic diagram of a prior art liquid crystal display 100 (2G3D) in a testing stage. As shown in FIG. 1 , in the test phase, the liquid crystal display 100 includes a detection circuit 140 and a pixel area (display area) 110 .

The detection circuit 140 is used to detect whether there is a broken pixel in the pixel area 110 . The detection circuit 140 includes two gate shorting bars GSL _A , GSL _B , three data shorting bars DSL _C , DSL _D , DSL _E , and five conductor pads GA, GB, C, D and E . The conductor pads GA, GB, C, D, and E are electrically connected to the gate short line GSL _A , the gate short line GSL _B , the data line short DSL _C , the data line short DSL _D- and the data line short Route DSL _E.

The pixel area 110 includes N gate lines (signal lines) GL ₁ ˜GL _N , M data lines (signal lines) DL ₁ ˜DL _M to form pixels interleaved with the gate lines and data lines. The gate lines GL ₁ -GL _N can be divided into two groups: odd gate lines (such as GL ₁ , GL ₃ , GL _{5 .} . . ) and even gate lines (such as GL ₂ , GL ₄ , GL ₆ . . . ). The data lines DL ₁ ~ DL _M can be further divided into three groups: red data lines (DL ₁ , DL ₄ , DL ₇ , DL ₁₀ ... etc.), green data lines (DL ₂ , DL ₅ , DL ₈ , DL ₁₁ ... etc.) ) and blue data lines (DL ₃ , DL ₆ , DL ₉ , DL ₁₂ …etc.). Each gate line has a first end 1 and a second end 2 . For example, the gate line GL ₁ has a first terminal 1 and a second terminal 2 . Each data line has a first end 1 and a second end 2 . For example, the data line _DL1 has a first terminal 1 and a second terminal 2 .

In the pixel area 110, one pixel includes three sub-pixels (red sub-pixel, green sub-pixel and blue sub-pixel). As shown in FIG. 1 , a red sub-pixel PX ₁₁ is electrically connected to a corresponding gate line and a red data line through a pixel switch SW _P11 to receive corresponding gate driving signals and data signals to drive the red sub-pixel PX ₁₁ (i.e. display red). More specifically, a first terminal 1 of the pixel switch SW _P11 is electrically connected to the red data line DL ₁ , a second terminal 2 of the pixel switch SW _P11 is electrically connected to the pixel PX ₁₁ , and a control of the pixel switch SW _P11 The terminal C is electrically connected to the gate line GL ₁ . In the test phase of the liquid crystal display 100 , the detection circuit 140 will be used to short-circuit all the gate lines GL ₁ -GL _N in the pixel area 110 to the two gate line short-circuit lines GSL _A and GSL _B respectively, and the pixel area 110 All the data lines DL ₁ -DL _M are respectively short-circuited with the three data line short-circuit lines DSL _C , DSL _D and DSL _E , and test signals are respectively input into the conductor pads GA, GB, C, D, E to test the pixel area 110 Whether there are broken pixels in it.

When the testing phase is completed, laser cutting is performed (as indicated by the dotted line in the diagram). Afterwards, the gate drive circuit (signal drive circuit) 120 and the data drive circuit (signal drive circuit) 130 are electrically connected to the corresponding conductor pads P _G1 -P _GN and P _D1 -P _DM respectively, so as to drive the gate The output terminals of the circuit 120 are electrically connected to the first terminals 1 of the gate lines GL ₁ -GL _N through the conductor pads P _G1 -P _GN respectively, and the output terminals of the data driving circuit 130 are connected through the conductor pads P _D1 -P _DM is electrically connected to the first ends 1 of the data lines DL ₁ -DL _M respectively. In this way, the manufacture of the liquid crystal display 100 can be completed.

However, due to the testing method of the prior art, it is necessary to cut off the short-circuited part (that is, the detection circuit 140 ) by laser cutting procedure, which is costly and causes inconvenience to users.

Contents of the invention

The invention provides a detection circuit. The detection circuit is used to detect a plurality of signal lines included in a display area. Each signal line includes a first end and a second end. The first end of each signal line is electrically connected to a signal driving circuit. The detection circuit includes a first signal line short circuit switch and a second signal line short circuit switch. The first signal line short-circuit switch includes a first end electrically connected to the first end, a second end and a third end of a first signal line for receiving a first control signal. The first signal line short-circuit switch controls the electrical connection between the first end of the first signal line short-circuit switch and the second end of the first signal line short-circuit switch according to the first control signal. The second signal line short-circuit switch includes a first end electrically connected to the second end of the first signal line, a second end electrically connected to the second end of a second signal line, and a The third terminal is used for receiving a second control signal. The second signal line short-circuit switch controls the electrical connection between the first end of the second signal line short-circuit switch and the second end of the second signal line short-circuit switch according to the second control signal.

The invention further provides a detection circuit. The detection circuit is used to detect a plurality of signal lines included in a display area. Each signal line includes a first end and a second end. The first end of each signal line is arranged on a first side of the display area for electrically connecting a signal driving circuit. The second end of each signal line is disposed on a second side different from the first side of the display area. The detection circuit includes a short circuit, a plurality of first signal line short circuit switches and a plurality of second signal line short circuit switches. The short circuit is arranged on the first side of the display area for receiving a test signal to detect the plurality of signal lines. The plurality of first signal line short-circuit switches are arranged on the first side of the display area. Each first signal line short-circuit switch includes a first end electrically connected to the first end of a corresponding signal line, a second end electrically connected to the short-circuit line, and a third end for to receive a first control signal. The first signal line short-circuit switch controls the electrical connection between the first end of the first signal line short-circuit switch and the second end of the first signal line short-circuit switch according to the first control signal. The plurality of second signal line short-circuit switches are arranged on the second side of the display area. Each second signal line short-circuit switch corresponds to a first signal line short-circuit switch. Each second signal line short-circuit switch includes a first end electrically connected to the second end of the corresponding signal line electrically connected to the signal line short-circuit switch, and a second end electrically connected to the corresponding signal line short-circuit switch. the second end of a signal line which is different from the signal line to which the first end of the short-circuit switch of the second signal line is electrically connected, and a third end for receiving a second control signal . The second signal line short-circuit switch controls the electrical connection between the first end of the second signal line short-circuit switch and the second end of the second signal line short-circuit switch according to the second control signal.

The invention further provides a display. The display includes a display area and a detection circuit. The display area includes a plurality of pixels, a plurality of pixel switches for driving the plurality of pixels, and a plurality of signal lines for transmitting signals to the plurality of pixel switches. Each signal line includes a first end and a second end. The first end of each signal line is disposed on a first side of the display area. The second end of each signal line is disposed on a second side different from the first side of the display area. The detection circuit includes a short circuit, which is arranged on the first side of the display area, and is used to receive a test signal to detect the plurality of signal lines, the plurality of short-circuit switches of the first signal lines and the short-circuit of the plurality of second signal lines switch. The plurality of first signal line short-circuit switches are arranged on the first side of the display area. Each first signal line short-circuit switch is electrically connected between the short-circuit line and the first end of a corresponding signal line. The plurality of second signal line short-circuit switches are arranged on the second side of the display area. Each second signal line short-circuit switch corresponds to a first signal line short-circuit switch. Each second signal line short-circuit switch is electrically connected to the second end of the signal line electrically connected to the first signal line short-circuit switch corresponding to the second signal line short-circuit switch and the second signal line short-circuit switch between the second ends of a corresponding signal line. Each of the second signal line short-circuit switches is electrically connected between different signal lines.

The present invention effectively solves the problems of high cost and inconvenience caused by cutting the detection circuit in the above-mentioned background technology, and the present invention uses short-circuit switches on different sides of the pixel area to increase the margin of layout and reduce phase Interference and coupling effects between short-circuit switches can provide users with greater convenience.

Description of drawings

FIG. 1 is a schematic diagram of a prior art liquid crystal display in a testing stage.

FIG. 2 is a schematic diagram of a liquid crystal display in a test phase according to a first embodiment of the present invention.

FIG. 3 is a schematic diagram illustrating the short-circuit behavior of the gate line during the test phase.

FIG. 4 is a schematic diagram illustrating short-circuit behavior of a data line during a test phase.

FIG. 5 is a schematic diagram of a liquid crystal display in a testing phase according to a second embodiment of the present invention.

Each label symbol in the accompanying drawing is explained as follows:

1: first end

2: Second end

100, 200, 500: LCD display

110, 210, 510: pixel area

120, 220, 520: gate drive circuit

130, 230, 530: data drive circuit

140, 240, 540: detection circuit

C: console

DL ₁ ～DL _M : data line

DSL _C , DSL _D , DSL _E : data cable short circuit

GL ₁ ～GL _N : gate line

GSL _A , GSL _B : gate line short circuit

P _G1 ～P _GN , P _D1 ～P _DM , GA, GB, C, D, E: conductor pad

PX ₁₁ : Subpixel

S _CG1 ~S _CGN , S _CD1 ~S _CDM : Control signal

SW _P11 : Pixel switch

SW _G1 ～SW _GN : gate line short circuit switch

SW _D1 ～SW _DM : data line short circuit switch

Detailed ways

Certain terms are used in the specification and subsequent claims to refer to particular components. Those of ordinary skill in the art will appreciate that manufacturers may refer to the same component by different terms. This description and subsequent patent applications do not use the difference in name as a way to distinguish components, but use the difference in function of components as a basis for distinction. The "comprising" mentioned throughout the specification and subsequent claims is an open term, so it should be interpreted as "including but not limited to". In addition, the term "electrical connection" here includes any direct and indirect electrical connection means. Therefore, if it is described in the text that a first device is electrically connected to a second device, it means that the first device can be directly connected to the second device, or indirectly connected to the second device through other devices or connection means.

Please refer to Figure 2. FIG. 2 is a schematic diagram of a liquid crystal display 200 (2G3D) according to a first embodiment of the present invention at a testing stage. As shown in FIG. 2 , the liquid crystal display 200 includes a detection circuit 240 and a pixel area (display area) 210 .

The pixel area 210 includes N gate lines (signal lines) GL ₁ ˜GL _N , M data lines (signal lines) DL ₁ ˜DL _M to form pixels interleaved with the gate lines and data lines. The gate lines GL ₁ -GL _N can be divided into two groups: odd gate lines (such as GL ₁ , GL ₃ , GL _{5 .} . . ) and even gate lines (such as GL ₂ , GL ₄ , GL _{6 .} . . ). The data lines DL ₁ ~ DL _M can be further divided into three groups: red data lines (DL ₁ , DL ₄ , DL ₇ , DL ₁₀ ... etc.), green data lines (DL ₂ , DL ₅ , DL ₈ , DL ₁₁ ... etc.) ) and blue data lines (DL ₃ , DL ₆ , DL ₉ , DL ₁₂ …etc.). Each gate line has a first end 1 and a second end 2 . For example, the gate line GL ₁ has a first terminal 1 and a second terminal 2 . Each data line has a first end 1 and a second end 2 . For example, the data line _DL1 has a first terminal 1 and a second terminal 2 . In the pixel area 210, one pixel includes three sub-pixels (red sub-pixel, green sub-pixel and blue sub-pixel). As shown in FIG. 2 , a red sub-pixel PX ₁₁ is electrically connected to a corresponding gate line and a red data line through a pixel switch SW _P11 to receive corresponding gate driving signals and data signals to drive the red sub-pixel PX ₁₁ (i.e. display red). More specifically, a first end 1 of the pixel switch SW _P11 is electrically connected to the red data line DL ₁ , a second end 2 of the pixel switch SW _P11 is electrically connected to the pixel PX ₁₁ , and a control of the pixel switch SW _P11 The terminal C is electrically connected to the gate line GL ₁ .

The detection circuit 240 includes two gate line short lines GSL _A and GSL _B , three data line short lines DSL _C , DSL _D and DSL _E , five conductor pads GA, GB, C, D and E, and N gate line short switches (signal line short-circuit switches) SW _G1 ˜SW _GN and M data line short-circuit switches (signal line short-circuit switches) SW _D1 ˜SW _DM . Gate line short lines GSL _A and GSL _B , as shown in FIG. 2 , are set on the left side of the pixel area 210; data line short lines DSL _C , DSL _D and DSL _E , as shown in FIG. 2 , are set in the pixel area 210 the underside of the The conductor pads GA, GB, C, D, and E are electrically connected to the gate short line GSL _A , the gate short line GSL _B , the data line short DSL _C , the data line short DSL _D- and the data line short Route DSL _E.

In addition, the conductor pads _PG1 - _PGN are arranged on the left side of the pixel area 210, and are used to electrically connect the gate driving circuit (signal driving circuit) 220 to the gate lines GL ₁ -GL _N after the test phase is completed. . More specifically, after the test phase is completed, the gate driving circuit 220 is electrically connected to the corresponding conductor pads _PG1 ˜P _GN , so that the output terminal of the gate driving circuit 220 is transmitted through the conductor pads _PG1 ˜P _GN It is electrically connected to the first end 1 of the gate lines GL ₁ -GL _N. Conductor pads P _D1 ˜P _DM are disposed on the lower side of the pixel region 210 for electrically connecting the data driving circuit 230 (signal driving circuit) to the data lines DL ₁ ˜D _M after the test phase is completed. More specifically, after the test phase is completed, the data driving circuit 230 is electrically connected to the corresponding conductor pads P _D1 ˜P _DM , so that the output terminal of the data driving circuit 230 is electrically connected through the conductor pads P _D1 ˜P _DM . Connected to the first end 1 of the data lines DL ₁ -DL _M.

The gate line short switches SW _G1 -SW _GN and the data line short switches SW _D1 -SW _DM all have the same structure. For example, the gate-line short _- circuit switch SW _G1 includes a first terminal 1, a second terminal 2, and a control terminal C; S _CG1 controls its first end 1 to be electrically connected to its second end 2 (for example, when the control signal S _CG1 controls the gate line short-circuit switch SW _G1 to open, the first end 1 of the gate line short-circuit switch SW _G1 will be short-circuited to The second end 2 of the gate line short-circuit switch SW _G1 ; on the contrary, when the control signal S _CG1 controls the gate line short-circuit switch SW _G1 to close, the first end 1 of the gate line short-circuit switch SW _G1 will be short-circuited with the gate line The electrical connection of the second terminal 2 of the switch SW _G1 will be disconnected to form an open circuit. The data line short circuit switch SW _D1 includes a first terminal 1, a second terminal 2 and a control terminal C; the data line short circuit switch SW _D1 and It will control its first terminal 1 to be electrically connected to its second terminal 2 according to the control signal S _CD1 received on its control terminal C (for example, when the control signal S _CD1 controls the data line short-circuit switch SW _D1 to open, the data line short-circuit switch The first end 1 of SW _G1 will be short-circuited to the second end 2 of the data line short-circuit switch SW _D1 ; on the contrary, when the control signal S _CD1 controls the data line short-circuit switch SW _D1 to close, the first end of the data line short-circuit switch SW _G1 The electrical connection between the terminal 1 and the second terminal 2 of the data line short-circuit switch SW _D1 is disconnected to form an open circuit.

The gate-line short-circuit switches SW _G1 -SW _GN are arranged on the left and right sides of the pixel area 210 respectively, so as to increase the layout margin of the gate-line short-circuit switches SW _G1 -SW _GN , which means that the gate-line short-circuit switches SW _G1 -SW GN The SW _GNs are disposed on the left and right sides of the pixel region 210 respectively, so that adjacent gate-line short-circuit switches can have a wider distance to reduce cross-talk and coupling effects.

The data line short-circuit switches SW _D1 -SW _DM are respectively arranged on the upper and lower sides of the pixel area 210 to increase the margin of the data-line short-circuit switches SW _D1 -SW _DM in the layout, which means that the data line short-circuit switches SW _D1 -SW _DM are respectively It is arranged on the upper and lower sides of the pixel region 210 , so that the adjacent data line short-circuit switches can have a wider distance, so as to reduce the influence of mutual interference and coupling.

The gate line short-circuit switches SW _G1 ˜SW _GN of the detection circuit 240 can be divided into two groups: odd-numbered gate-line short-circuit switches (such as SW _G1 , SW _G3 , SW _G5 . . . ) and even-numbered gate-line short-circuit switches (such as SW _G2 , SW _G4 , SW _G6 ...etc). The two adjacent gate lines in the same group (hereinafter referred to as the first gate line and the second gate line) correspond to the gate line short-circuit switch of the first gate line (hereinafter referred to as the first gate line short-circuit switch) It is arranged on the left side of the pixel area 210 ; More specifically, the first end 1 of the first gate line short-circuit switch is electrically connected to the first end 1 of the first gate line; the second end 2 of the first gate line short-circuit switch is electrically connected to the first end 1 of the first gate line short-circuit switch. Connected to the corresponding odd/even short-circuit line; the first end 1 of the second gate line short-circuit switch is electrically connected to the second end 2 of the first gate line; the first end 2 of the second gate line short-circuit switch Two terminals 2 are electrically connected to the second terminal 2 of the second gate line. For example, among odd-numbered gate-line short-circuit switches, the gate-line short-circuit switches corresponding to adjacent odd-numbered gate lines GL ₁ and GL ₃ are gate-line short-circuit switches SW _G1 and SW _G3 ; The first end 1 of the switch SW _G1 is electrically connected to the first end 1 of the gate line GL ₁ ; the second end 2 of the gate line short switch SW _G1 is electrically connected to the gate line short line GSL _A ; The first end 1 of the gate line shorting switch SW _G3 is electrically connected to the second end 2 of the gate line GL ₁ ; the second end 2 of the gate line shorting switch SW _G3 is electrically connected to odd gate lines This second end 2 of the GL ₃ . The other odd-numbered gate line short-circuit switches are connected in the same way. And the connection mode of the even-numbered gate line short-circuit switch can be deduced by analogy.

The data line short-circuit switches SW _D1 -SW _DM of the detection circuit 240 can be divided into three groups: red data line short-circuit switches (such as SW _D1 , SW _D4 , SW _D7 , etc.), green data line short-circuit switches (such as SW _D2 , SW _D5 , SW _D8 ... etc.), and blue data line short-circuit switches (such as SW _D3 , SW _D6 , SW _D9 ... etc.). For the two adjacent data lines in the same group (hereinafter referred to as the first data line and the second data line), the data line short-circuit switch corresponding to the first data line (hereinafter referred to as the first data line short-circuit switch) is arranged in the pixel area 210 Lower side: the data line short-circuit switch corresponding to the second data line (hereinafter referred to as the second data line short-circuit switch) is disposed on the upper side of the pixel region 210 . More specifically, the first end 1 of the first data line short-circuit switch is electrically connected to the first end 1 of the first data line; the second end 2 of the first data line short-circuit switch is electrically connected to the corresponding The data line short-circuit line DSL _C , DSL _D or DSL _E ; the first end 1 of the second data line short-circuit switch is electrically connected to the second end 2 of the first data line; the second data line short-circuit switch The second end 2 is electrically connected to the second end 2 of the second data line. For example, among the red data line short-circuit switches, the data line short-circuit switches corresponding to the adjacent red data lines DL ₁ and DL ₄ are data line short-circuit switches SW _D1 and _{SW D4} ; The first end 1 is electrically connected to the first end 1 of the red data line DL ₁ ; the second end 2 of the data line short-circuit switch SW _D1 is electrically connected to the data line short-circuit DSL _A ; the data line short-circuit switch SW _D4 The first end 1 is electrically connected to the second end 2 of the red data line DL ₁ ; the second end 2 of the data line shorting switch SW _D4 is electrically connected to the second end 2 of the red data line DL ₄ . The other red data line short-circuit switches are connected in the same way. The green/blue data line short-circuit switch is connected in the same way.

Please refer to Figure 3. FIG. 3 is a schematic diagram illustrating the short-circuit behavior of the gate line during the test phase. As shown in FIG. 3 , during the test phase, through the detection circuit 240, all the gate line short-circuit switches SW _G1 ~ SW _GN are turned on to conduct, forming a short-circuit situation as shown in FIG. Conductor pads G0 and GE input test signals to test all gate lines GL ₁ -GL _N .

Please refer to Figure 4. FIG. 4 is a schematic diagram illustrating short-circuit behavior of a data line during a test phase. As shown in FIG. 4, during the test phase, through the detection circuit 240, all data line short-circuit switches SW _D1 -SW _DM will be turned on to conduct, forming a short-circuit situation as shown in FIG. Pads R, G and B input test signals to test all the data lines DL ₁ -DL _M .

In addition, the control terminals C of each short-circuit switch SW _G1 ˜SW _GN , SW _D1 ˜SW _DM can be fully or partially electrically connected together, depending on user requirements. However, it must be determined that all the short-circuit switches SW _G1 ˜SW _GN , SW _D1 ˜SW _DM need to be fully turned on during the testing phase; After being connected to the conductor pads P _G1 ˜P _GN , P _D1 ˜P _DM , all the short-circuit switches SW _G1 ˜SW _GN , SW _D1 ˜SW _DM must be closed to avoid affecting the normal operation of the liquid crystal display 200 .

Please refer to Figure 5. FIG. 5 is a schematic diagram of a liquid crystal display 500 (2G2D) according to a second embodiment of the present invention at a testing stage. As shown in FIG. 5 , the liquid crystal display 500 includes a detection circuit 540 and a pixel area (display area) 510 . In the liquid crystal display 500, the detection circuit 540 and the pixel area 510 are similar to the detection circuit 240 and the pixel area 210 in the liquid crystal display 200, the only difference is that the detection circuit 540 includes two gate line short lines GSL _A and GSL _B , two data Line shorts DSL _C , DSL _D , four conductor pads GA, GB, C and D. Compared with the detection circuit 240 , the detection circuit 540 only uses two short-circuit lines of the data lines to perform the short-circuit function. The pixel regions 510 are grouped according to the design of the short circuit of the detection circuit 540 . Relevant functional descriptions are as described above, and will not be repeated here.

To sum up, the detection circuit provided by the present invention uses short-circuit switches on different sides of the pixel area to increase the margin of layout, and at the same time reduce the interference and coupling effect between adjacent short-circuit switches, and provide users with better Great convenience.

The above descriptions are only preferred embodiments of the present invention, and all equivalent changes and modifications made according to the scope of the patent application of the present invention shall fall within the scope of the present invention.

Claims (13)

1. A detection circuit for detecting a plurality of signal lines contained in a display area, each signal line includes a first end and a second end, and the first end of each signal line is electrically connected to a A signal drive circuit, characterized in that the detection circuit includes: A first signal line short-circuit switch, comprising: a first end electrically connected to a first end of a first signal line; a second end; and A third end, used to receive a first control signal, the first signal line short-circuit switch controls the first end of the first signal line short-circuit switch and the first signal line short-circuit switch according to the first control signal electrical connections at both ends; and A second signal line short-circuit switch, comprising: a first end electrically connected to the second end of the first signal line; a second end electrically connected to a second end of a second signal line; and A third end, used to receive a second control signal, the second signal line short-circuit switch controls the first end of the second signal line short-circuit switch and the second signal line short-circuit switch according to the second control signal electrical connections at both ends. 2. The detection circuit according to claim 1, further comprising: A first short-circuit line is used for receiving a first test signal, and the first short-circuit line is electrically connected to the second end of the first signal-line short-circuit switch. 3. The detection circuit according to claim 2, wherein when the first short-circuit line receives the first test signal, the first and second control signals control the first and second signal line short-circuit switches to open . 4. The detection circuit according to claim 1, further comprising: A short-circuit switch for the third signal line, comprising: a first end electrically connected to the first end of a third signal line; a second end; and A third end, used to receive a third control signal, the third signal line short-circuit switch controls the first end of the third signal line short-circuit switch and the third signal line short-circuit switch according to the third control signal electrical connections at both ends; and A short-circuit switch for the fourth signal line, comprising: a first end electrically connected to the second end of the third signal line; a second end electrically connected to a second end of a fourth signal line; and A third end, used to receive a fourth control signal, the fourth signal line short-circuit switch controls the first end of the fourth signal line short-circuit switch and the fourth signal line short-circuit switch according to the fourth control signal electrical connections at both ends; Wherein the third signal line and the fourth signal line are different from the first signal line and the second signal line. 5. The detection circuit according to claim 3, further comprising: a second short circuit for receiving a second test signal, the second short circuit is electrically connected to the second end of the third signal line short circuit switch; When the second short-circuit line receives the second test signal, the third and fourth control signals control the short-circuit switch of the third and fourth signal lines to open. 6. The detection circuit according to claim 1, wherein the plurality of signal lines are a plurality of gate lines; the signal driving circuit is a gate driving circuit. 7. The detection circuit according to claim 1, wherein the plurality of signal lines are a plurality of data lines; the signal driving circuit is a data driving circuit. 8. A detection circuit for detecting a plurality of signal lines included in a display area, each signal line includes a first end and a second end, and the first end of each signal line is arranged on the A first side of the display area is used to electrically connect a signal driving circuit, the second end of each signal line is arranged on a second side different from the first side of the display area, and the detection circuit includes : a short circuit, arranged on the first side of the display area, for receiving a test signal to detect the plurality of signal lines; A plurality of first signal line short-circuit switches are arranged on the first side of the display area, and each first signal line short-circuit switch includes: a first end electrically connected to the first end of a corresponding signal line; a second terminal electrically connected to the short circuit; and A third end, used to receive a first control signal, the first signal line short-circuit switch controls the first end of the first signal line short-circuit switch and the first signal line short-circuit switch according to the first control signal electrical connections at both ends; and A plurality of second signal line short-circuit switches are arranged on the second side of the display area, each second signal line short-circuit switch corresponds to a first signal line short-circuit switch, and each second signal line short-circuit switch includes: a first end electrically connected to the second end of the signal line electrically connected to the corresponding first signal line short-circuit switch; a second terminal electrically connected to the second terminal of the corresponding first signal line which is different from the signal line to which the first terminal of the second signal line short-circuit switch is electrically connected; and A third end, used to receive a second control signal, the second signal line short-circuit switch controls the first end of the second signal line short-circuit switch and the second signal line short-circuit switch according to the second control signal electrical connections at both ends. 9 . The detection circuit according to claim 8 , wherein when the short circuit receives the test signal, the plurality of first and second signal line short circuit switches are all turned on. 10 . 10. The detection circuit according to claim 8, wherein the plurality of signal lines are a plurality of gate lines; the signal driving circuit is a gate driving circuit. 11. The detection circuit according to claim 8, characterized in that: the plurality of signal lines are a plurality of data lines; the signal driving circuit is a data driving circuit. 12. A display, characterized in that it comprises: A display area, including: a plurality of pixels; a plurality of pixel switches for driving the plurality of pixels; and A plurality of signal lines are used to transmit signals to the plurality of pixel switches, each signal line includes a first end and a second end, and the first end of each signal line is arranged at a first end of the display area side, the second end of each signal line is arranged on the second side different from the first side of the display area; A detection circuit, comprising: a short circuit, arranged on the first side of the display area, for receiving a test signal to detect the plurality of signal lines; A plurality of first signal line short-circuit switches are arranged on the first side of the display area, and each first signal line short-circuit switch is electrically connected between the short-circuit line and the first end of a corresponding signal line; and A plurality of second signal line short-circuit switches are arranged on the second side of the display area, each second signal line short-circuit switch corresponds to a first signal line short-circuit switch, and each second signal line short-circuit switch is electrically Connected between the second end of the signal line electrically connected to the first signal line short-circuit switch corresponding to the second signal line short-circuit switch and the second end of a signal line corresponding to the second signal line short-circuit switch between; Each of the second signal line short-circuit switches is electrically connected between different signal lines. 13 . The display according to claim 12 , wherein when the short circuit receives the test signal, the plurality of first and second signal circuit short switches are all turned on. 14 .

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