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CN101534603A - Conductor used in flexible substrate, method for producing conductor, and flexible substrate - Google Patents

Conductor used in flexible substrate, method for producing conductor, and flexible substrate Download PDF

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CN101534603A
CN101534603A CN200810081793A CN200810081793A CN101534603A CN 101534603 A CN101534603 A CN 101534603A CN 200810081793 A CN200810081793 A CN 200810081793A CN 200810081793 A CN200810081793 A CN 200810081793A CN 101534603 A CN101534603 A CN 101534603A
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conductor
oxide
oxides
flexible
flexible substrate
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CN101534603B (en
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辻隆之
堀越稔之
伊藤真人
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Hitachi Cable Ltd
Hitachi Cable Fine Tech Ltd
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Hitachi Cable Ltd
Hitachi Cable Fine Tech Ltd
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Abstract

The invention provides a conductor used in a flexible substrate, a method for producing the conductor, and the flexible substrate, and the conductor used in the flexible substrate has small or almost no possibility of generating crystal whiskers from an Sn coating surface or soldering tins around the conductor, and does not increase contact resistance even when being placed in the high-temperature environment. On the conductor which is arranged inside a flexible flat cable or a flexible printed circuit board, an Sn or Sn alloy coated film (15) is formed on the surface of the conductor which is composed of Cu or Cu alloys, and superficial oxidize films (16a) and (16b) of the coating film (15) are composed of an oxide of Sn-excluded elements or a mixed oxide of an Sn oxide and an oxide of Sn-excluded elements.

Description

挠性基板用导体及其制造方法以及挠性基板 Conductor for flexible substrate, manufacturing method thereof, and flexible substrate

技术领域 technical field

本发明涉及一种关联配线用导体及终端连接部、特别是涉及电子设备上使用的挠性扁平电缆(FFC)、挠性印刷配线板(FPC)等的挠性基板上使用的导体及其制造方法以及挠性基板。The present invention relates to a conductor and a terminal connection part for related wiring, in particular to a conductor and a conductor used on flexible substrates such as flexible flat cables (FFC) and flexible printed circuit boards (FPC) used in electronic equipment. Its manufacturing method and flexible substrate.

背景技术 Background technique

以往为了防止配线材料的氧化,在配线材料特别是在铜或铜合金的表面要施加Sn、Ag、Au或Ni的镀层。Conventionally, in order to prevent oxidation of wiring materials, Sn, Ag, Au, or Ni plating is applied to the surface of wiring materials, especially copper or copper alloys.

例如,如图2所示,在连接器11与挠性扁平电缆(以下称FFC)13的终端连接部,在连接器(连接部件)11的插头(金属端子)12和FFC13的导体14的表面等施加镀层。特别是由于Sn的成本低廉,由于柔软而在嵌合的压力下容易变形,接触面积增加,可将接触电阻降低至很低,所以,一般广泛使用在配线材料的表面施加了Sn镀层的材料。For example, as shown in FIG. 2 , at the terminal connection portion between the connector 11 and the flexible flat cable (hereinafter referred to as FFC) 13, on the surface of the plug (metal terminal) 12 of the connector (connecting member) 11 and the conductor 14 of the FFC 13 Wait for the coating to be applied. In particular, because Sn is cheap, it is easy to deform under the pressure of fitting due to its softness, and the contact area is increased, so that the contact resistance can be reduced to a very low level, so generally, the material with Sn plating applied to the surface of the wiring material is widely used. .

作为该Sn镀层用合金,以往使用耐晶须性良好的Sn-Pb合金,但近年来,从配合环境方面的对策的观点出发,追求使用无Pb材料(非铅材料)、非卤素材料,对配线材料上使用的各种材料也追求无Pb化、非卤素化。As the alloy for Sn plating, a Sn-Pb alloy with good whisker resistance has been used conventionally. However, in recent years, from the viewpoint of environmental measures, the use of Pb-free materials (non-lead materials) and non-halogen materials has been pursued. Pb-free and non-halogenated materials are also being pursued for various materials used in wiring materials.

专利文献1:特开2006-111898号公报Patent Document 1: JP-A-2006-111898

专利文献2:特开2005-216749号公报Patent Document 2: JP-A-2005-216749

专利文献3:特开2005-206869号公报Patent Document 3: JP-A-2005-206869

专利文献4:特开2006-45665号公报Patent Document 4: JP-A-2006-45665

非专利文献1:JEITA完成无铅化紧急提议报告会资料(2005.2.17)Non-Patent Document 1: JEITA Completion of Lead-free Urgent Proposal Report Meeting Materials (2005.2.17)

非专利文献2:JEITA无铅焊实用化研究2005年成果报告书(2005.6)Non-Patent Document 2: 2005 JEITA Practical Research Report on Lead-free Soldering (2005.6)

发明内容 Contents of the invention

但是,随着Sn镀层的无Pb化,特别是在Sn或Sn系合金镀层上,如图3所示,产生的问题是会在镀层上产生Sn的针状结晶即晶须21,由于晶须21而发生邻接配线间的短路事故。However, with the Pb-free Sn coating, especially on the Sn or Sn-based alloy coating, as shown in Figure 3, there is a problem that needle-like crystals of Sn, that is, whiskers 21, will be produced on the coating. 21 and a short circuit accident occurs between adjacent wiring.

为了缓和被认为是晶须的发生原因之一的Sn镀层中的应力,能够通过将电镀了的Sn进行回流处理,来减少晶须的发生。但是,并不准确地知晓该晶须抑制的机理。另外,在施加了与连接器的嵌合等新的外部应力时,即便实施回流处理,也不能抑制晶须的产生。而且有报告说,虽然通过Bi或Ag等的合金电镀层或合金化学镀层能够抑制晶须,但通过回流处理,反而会比纯Sn时产生更多晶须。In order to alleviate the stress in the Sn plating layer, which is considered to be one of the causes of whiskers, the occurrence of whiskers can be reduced by reflowing the plated Sn. However, the mechanism of this whisker suppression is not precisely known. In addition, when a new external stress such as fitting with a connector is applied, generation of whiskers cannot be suppressed even if a reflow process is performed. Furthermore, it has been reported that although whiskers can be suppressed by an alloy plating layer such as Bi or Ag or an alloy electroless plating layer, more whiskers are generated by reflow treatment than pure Sn.

在电子零件上,为了零件安装必须进行回流处理,在这些合金镀层上也有问题。On electronic components, reflow processing is necessary for component mounting, and these alloy platings are also problematic.

目前作为有效的对策,公开了施加1μm以下的薄Sn镀层的方法,但特别是在高温放置时,有接触电阻比以往增大的问题。Currently, as an effective countermeasure, a method of applying a thin Sn plating layer of 1 μm or less has been disclosed, but there is a problem that the contact resistance is increased compared to conventional ones especially when left at a high temperature.

本发明是考虑了以上的情况而推出的,其目的在于提供一种挠性基板用导体即其制造方法以及挠性基板,特别是在施加了与连接器的嵌合等大的外部应力的环境下,在导体周围的Sn镀层膜表面或焊锡上产生晶须的可能性小、或几乎不产生,在高温放置环境下,也不会发生接触电阻增大。The present invention has been made in consideration of the above circumstances, and its object is to provide a conductor for a flexible circuit board, its manufacturing method, and a flexible circuit board, especially in an environment where a large external stress such as fitting with a connector is applied. In this case, there is little or no whisker generation on the surface of the Sn plating film around the conductor or on the solder, and there is no increase in contact resistance in a high-temperature storage environment.

为了实现上述目的,技术方案1的发明涉及一种挠性基板用导体,该导体配设在挠性扁平电缆或挠性印刷电路板内部,其特征在于:在由Cu或Cu合金构成的导体的表面形成Sn或Sn合金镀膜,该镀膜的表面氧化膜由Sn以外的元素的氧化物构成或由Sn氧化物与Sn以外的元素的氧化物的混合氧化物来构成。In order to achieve the above object, the invention of claim 1 relates to a conductor for flexible substrates, the conductor is arranged inside a flexible flat cable or a flexible printed circuit board, and is characterized in that the conductor made of Cu or Cu alloy A Sn or Sn alloy coating film is formed on the surface, and the surface oxide film of the coating film is composed of oxides of elements other than Sn or mixed oxides of Sn oxide and oxides of elements other than Sn.

技术方案2的发明是根据技术方案1所述的挠性基板用导体,上述Sn以外的元素为氧化倾向高于Sn的元素。在此,氧化倾向高的元素是表示该氧化物标准生成自由能的值小于Sn(在负值上绝对值大)的元素,例如Zn、P、Al、Ti等。The invention of claim 2 is the conductor for flexible substrates according to claim 1 , wherein the elements other than Sn are elements with higher oxidation tendency than Sn. Here, an element with a high oxidation tendency is an element having a standard free energy of formation of the oxide smaller than Sn (large in absolute value on a negative value), such as Zn, P, Al, Ti, and the like.

技术方案3的发明是根据技术方案1或2所述的挠性基板用导体,上述Sn以外的元素是选自Zn、P、Al、Ti中的至少一种以上的元素。The invention of claim 3 is the conductor for flexible substrates according to claim 1 or 2, wherein the element other than Sn is at least one element selected from the group consisting of Zn, P, Al, and Ti.

技术方案4的发明是根据技术方案1至3所述的挠性基板用导体,上述由Sn以外的元素的氧化物或Sn氧化物与Sn以外的元素的氧化物的混合氧化物所产生的表面氧化膜厚度为5nm以下。The invention of Claim 4 is the conductor for flexible substrates according to Claims 1 to 3, wherein the surface formed of an oxide of an element other than Sn or a mixed oxide of an oxide of Sn and an oxide of an element other than Sn is The oxide film thickness is 5nm or less.

技术方案5的发明涉及一种挠性基板用导体的制造方法,该导体配设在挠性扁平电缆或挠性印刷电路板内部,其特征在于:在由Cu或Cu合金构成的导体的表面形成Sn或Sn合金镀膜,并在其表面形成选自Zn、P的至少一种以上的元素的镀膜,其后,通过回流处理,使得表面氧化膜由这些选择的元素的氧化物构成或由Sn氧化物与这些选择的元素的氧化物的混合氧化物构成。The invention of claim 5 relates to a method of manufacturing a conductor for a flexible substrate arranged inside a flexible flat cable or a flexible printed circuit board, wherein the conductor is formed on the surface of a conductor made of Cu or a Cu alloy. Sn or Sn alloy coating, and a coating of at least one element selected from Zn and P is formed on the surface, and then, through reflow treatment, the surface oxide film is made of oxides of these selected elements or oxidized by Sn Composition of mixed oxides of compounds and oxides of these selected elements.

技术方案6的发明涉及一种挠性基板用导体的制造方法,该导体配设在挠性扁平电缆或挠性印刷电路板内部,其特征在于:在由Cu或Cu合金构成的导体的表面形成包含选自Zn、P的至少一种以上的元素的Sn或Sn合金镀膜,其后通过回流处理,使得表面氧化膜由这些选择的元素的氧化物构成或由Sn氧化物与这些选择的元素的氧化物的混合氧化物构成。The invention of claim 6 relates to a method of manufacturing a conductor for a flexible substrate arranged inside a flexible flat cable or a flexible printed circuit board, wherein the conductor is formed on the surface of a conductor made of Cu or a Cu alloy. Sn or Sn alloy coating film containing at least one element selected from Zn and P, followed by reflow treatment, so that the surface oxide film is composed of oxides of these selected elements or composed of Sn oxide and these selected elements Oxides of mixed oxides.

技术方案7的发明涉及一种挠性基板,其特征在于:在并行排列有多根技术方案1~4的任一项所述的挠性基板用导体的导体群的两面设置绝缘层。The invention of claim 7 relates to a flexible substrate characterized in that an insulating layer is provided on both surfaces of a conductor group in which a plurality of conductors for a flexible substrate according to any one of claims 1 to 4 are arranged in parallel.

技术方案8的发明是根据技术方案7所述的挠性基板,由单面具有粘结层的树脂膜材料构成上述绝缘层。The invention of claim 8 is the flexible substrate according to claim 7 , wherein the insulating layer is formed of a resin film material having an adhesive layer on one side.

根据本发明,在挠性扁平电缆或挠性印刷电路板上,即便在施加了犹如嵌合部的外部应力的场合,也可以抑制Sn的针状结晶即晶须,能够解决作为邻接配线间的短路的不良。另外,即便在高温环境下也不会使接触可靠性损失。According to the present invention, even when an external stress such as a fitting portion is applied to a flexible flat cable or a flexible printed circuit board, it is possible to suppress needle-like crystals of Sn that are whiskers, and it is possible to solve problems between adjacent wirings. The short circuit is bad. In addition, there is no loss of contact reliability even in a high-temperature environment.

附图说明 Description of drawings

图1是显示本发明的一个实施方式的模式图。FIG. 1 is a schematic diagram showing one embodiment of the present invention.

图2是显示连接器与FFC的嵌合例的立体图。Fig. 2 is a perspective view showing a fitting example of a connector and an FFC.

图3是说明在连接器与FFC的嵌合下,产生晶须,邻接配线间短路的样子的放大立体图。FIG. 3 is an enlarged perspective view illustrating how whiskers are generated when the connector and the FFC are fitted, and adjacent wirings are short-circuited.

图4是显示用于鉴定本发明的实施例和现有例的Sn的表面氧化膜的XPS分析结果的图。Fig. 4 is a graph showing the results of XPS analysis for identifying the surface oxide film of Sn in Examples of the present invention and a conventional example.

图5是显示用于鉴定本发明的实施例和现有例的Zn的表面氧化膜的XPS分析结果的图。Fig. 5 is a graph showing the results of XPS analysis for identifying the surface oxide film of Zn in Examples of the present invention and a conventional example.

图6是显示本发明的实施例和现有例的表面氧化膜、Sn镀膜的AES深度方向的分析结果的图。Fig. 6 is a graph showing the results of AES analysis in the depth direction of the surface oxide film and Sn plating film of the examples of the present invention and the conventional examples.

图7是显示本发明的实施例与现有例的导体在150℃、24小时热处理后的表面氧化膜、Sn镀膜的AES深度方向的分析结果的图。Fig. 7 is a graph showing the analysis results of the AES depth direction of the surface oxide film and Sn plating film of the conductors of the examples of the present invention and the conventional example after heat treatment at 150°C for 24 hours.

图中,In the figure,

11—连接器;12—插头;13—FFC;14—导体;15—Sn镀膜;16a、16b—表面氧化膜;21—晶须11—connector; 12—plug; 13—FFC; 14—conductor; 15—Sn coating; 16a, 16b—surface oxide film; 21—whisker

具体实施方式 Detailed ways

以下基于附图详述本发明的一个最佳实施方式。A best embodiment of the present invention will be described in detail below based on the drawings.

Sn镀层导体的氧化膜通常仅由Sn的氧化物构成,但为了实现上述目的,本发明涉及的导体是将表面氧化膜做成Sn以外的元素的氧化物或Sn氧化物与Sn以外的氧化物的混合物。作为Sn以外的元素,有Zn、P、Al、Ti。The oxide film of a Sn-plated conductor is usually composed of only Sn oxides, but in order to achieve the above object, the conductor of the present invention is made of oxides of elements other than Sn or Sn oxides and oxides other than Sn. mixture. Elements other than Sn include Zn, P, Al, and Ti.

例如,如图1(a)所示,在Cu或Cu合金构成的导体(未图示)的表面或周围形成Sn或Sn合金镀膜15,在其表面形成Zn氧化物或Sn氧化物与Zn氧化物构成的表面氧化膜16a。For example, as shown in Figure 1 (a), a Sn or Sn alloy coating 15 is formed on or around a conductor (not shown) made of Cu or a Cu alloy, and a Zn oxide or a combination of Sn oxide and Zn oxide is formed on the surface. The surface oxide film 16a composed of substances.

另外,如图1(b)所示,在Sn或Sn合金镀膜15的表面形成P氧化物或Sn氧化物与P氧化物构成的表面氧化膜16b。In addition, as shown in FIG. 1( b ), a surface oxide film 16 b composed of P oxide or Sn oxide and P oxide is formed on the surface of the Sn or Sn alloy plated film 15 .

该表面氧化膜16a、16b可以是在Sn或Sn合金镀膜15的表面形成Zn、P、Al和Ti的镀层后,将其作为氧化物,或者也可以在Sn或Sn合金中添加Zn或P元素,将其在导体上镀层,形成Sn或Sn合金镀膜15,将其表面氧化,形成包含Zn、P、Al或Ti的表面氧化膜16a、16b。The surface oxide film 16a, 16b can be formed on the surface of the Sn or Sn alloy coating 15 after the coating of Zn, P, Al and Ti is used as an oxide, or Zn or P element can also be added to Sn or Sn alloy. , it is plated on the conductor to form a Sn or Sn alloy coating 15, and its surface is oxidized to form surface oxide films 16a, 16b containing Zn, P, Al or Ti.

通常,在向Sn镀层施加了应力时,表面氧化膜的缺陷成为晶须产生的核心,被称为生长。(参考文献:锡晶须生长过程的解释与对策R&D策划社)In general, when stress is applied to the Sn plating layer, defects in the surface oxide film become the core of whisker generation, which is called growth. (Reference: Explanation and Countermeasures of Tin Whisker Growth Process R&D Planning Agency)

在专利文献1中,公开的方法是通过将Sn镀膜进行氧化处理,形成厚而致密的Sn氧化物或氢氧化膜,减少表面的缺陷,抑制晶须。In Patent Document 1, the disclosed method is to form a thick and dense Sn oxide or hydroxide film by oxidizing the Sn coating, thereby reducing surface defects and suppressing whiskers.

但是,在连接器的嵌合部等Sn镀膜大大变形的场合,不能防止表面氧化膜的缺陷的发生。另外,表面形成厚的氧化膜会使接触电阻增大,是不理想的。However, when the Sn plating film is greatly deformed, such as in the fitting portion of the connector, the occurrence of defects in the surface oxide film cannot be prevented. In addition, the formation of a thick oxide film on the surface will increase the contact resistance, which is not ideal.

本发明者们潜心进行了研究,结果发现,通过在表面形成Zn、P、Al、Ti中的至少一种的氧化物,能够改变现有的仅由Sn的氧化物构成的氧化膜的性状,能够减少晶须产生的几率。另外得知,如果这些氧化物变厚,则连接器嵌合引起的晶须产生几率反之变大。The inventors of the present invention have conducted intensive studies and found that the properties of an existing oxide film composed only of Sn oxides can be changed by forming an oxide of at least one of Zn, P, Al, and Ti on the surface. Can reduce the chance of whiskers. It was also found that when these oxides become thicker, the probability of whisker generation due to connector fitting increases conversely.

因此,通过在Cu扁平线上熔融镀层,施加添加了各种浓度的Zn、P、Al或Ti的、厚度为8~10μm的Sn镀膜,通过XPS分析(X线光电子分光法),研究了表面氧化物的种类,根据AES深度方向分析(俄歇电子分光法)研究了氧化膜的厚度。另外,将各个试样与连接器嵌合,进行2周的室温放置后,从连接器上卸下,对嵌合部进行SEM观察,计量了10μm以上的晶须的晶须产生几率。Therefore, by melting the coating on a Cu flat wire, applying a Sn coating film with a thickness of 8 to 10 μm added with various concentrations of Zn, P, Al, or Ti, and studying the surface by XPS analysis (X-ray photoelectron spectroscopy). For the type of oxide, the thickness of the oxide film was studied by AES depth direction analysis (Auger Electron Spectroscopy). In addition, each sample was fitted to the connector, left to stand at room temperature for 2 weeks, then removed from the connector, and the fitting portion was observed by SEM to measure the probability of whisker generation of whiskers of 10 μm or more.

将各个数据显示在表1中。Each data is shown in Table 1.

表1Table 1

  试样No. 添加金属 表面氧化膜构成(根据XPS分析) 表面氧化膜厚度(根据AES分析) 晶须产生几率 1 Sn氧化物 2.5nm 47% 2 Zn Zn氧化物 2.5nm 29% 3 Zn Zn氧化物 3nm 40% 4 Zn Zn氧化物 4nm 44% 5 Zn Zn氧化物 6nm 55% 6 P Sn氧化物、P氧化物 2.5nm 21% 7 Al Al氧化物 3nm 40% 8 Ti Ti氧化物 3nm 40% Sample No. add metal Composition of surface oxide film (according to XPS analysis) Surface oxide film thickness (according to AES analysis) Chance of Whiskers 1 none Sn oxide 2.5nm 47% 2 Zn Zn oxide 2.5nm 29% 3 Zn Zn oxide 3nm 40% 4 Zn Zn oxide 4nm 44% 5 Zn Zn oxide 6nm 55% 6 P Sn oxide, P oxide 2.5nm twenty one% 7 al Al oxide 3nm 40% 8 Ti Ti oxide 3nm 40%

与表面氧化膜仅由Sn氧化物构成的试样No.1比较,Zn氧化物构成的试样No.2~4、Sn氧化物和P氧化物的混合构成的试样No.6、Al氧化物构成的试样No.7、Ti氧化物构成的试样No.8能够使晶须产生几率降低。Compared with sample No. 1 whose surface oxide film was composed of only Sn oxide, sample No. 2 to 4 composed of Zn oxide, sample No. 6 composed of a mixture of Sn oxide and P oxide, Al oxide Sample No. 7 composed of Ti oxide and Sample No. 8 composed of Ti oxide can reduce the probability of whisker generation.

这样,确认了与仅由Sn氧化物构成表面的场合相比,通过Sn以外的元素的氧化物或Sn氧化物与Sn以外的元素的氧化物的混合氧化物,能够抑制晶须产生频度。Thus, it was confirmed that the frequency of whisker generation can be suppressed by oxides of elements other than Sn or mixed oxides of Sn oxide and oxides of elements other than Sn than when the surface is composed of only Sn oxides.

另外,从试样5的结果可以得知,即便将表面氧化膜做成Sn以外的元素的氧化物,在其厚度厚的场合,也不能得到晶须抑制效果。因此,表面氧化膜优选为5nm以下,更优选为3nm以下。Also, from the results of Sample 5, it can be seen that even if the surface oxide film is made of an oxide of an element other than Sn, the whisker suppression effect cannot be obtained if the thickness is thick. Therefore, the surface oxide film is preferably 5 nm or less, more preferably 3 nm or less.

Zn、P、Al、Ti都有比Sn易氧化的倾向,通过将这些元素在Sn镀层中添加并进行热处理,能够使这些氧化物自然形成,能够使Sn镀层表面氧化膜的性状变化。Zn, P, Al, and Ti all have a tendency to be oxidized more easily than Sn. By adding these elements to the Sn coating and performing heat treatment, these oxides can be formed naturally, and the properties of the oxide film on the surface of the Sn coating can be changed.

作为Zn添加的方法,如专利文献2所公开的,有在Sn镀层的周围施加Zn镀层,并进行热处理的方法。届时,能够通过使Zn镀层的厚度变化,来使表面氧化膜的厚度变化。As a method of adding Zn, as disclosed in Patent Document 2, there is a method of applying a Zn plating layer around a Sn plating layer and performing heat treatment. At that time, the thickness of the surface oxide film can be changed by changing the thickness of the Zn plating layer.

实施例Example

通过电镀在φ0.6mm的Cu线周围施加厚度5μm的Sn镀层,然后通过薄镀在其周围施加0.5μm厚度Zn。其后,经过冷拔、压轧工序,制作了0.05mm厚度、0.3mm宽度的扁平线。然后用通电退火实施了回流处理。A Sn plating layer with a thickness of 5 μm was applied around a Cu wire of φ0.6 mm by electroplating, and then a Zn layer with a thickness of 0.5 μm was applied around it by thin plating. Thereafter, a flat wire having a thickness of 0.05 mm and a width of 0.3 mm was produced through cold drawing and rolling processes. Then, reflow treatment was performed by electrical annealing.

最后,将这些导体按0.5mm间距并行排列50根,用单面具有聚酯系粘结剂层的聚酯膜将其两面进行叠层,制作了FFC。Finally, 50 of these conductors were arranged in parallel at a pitch of 0.5 mm, and both sides were laminated with a polyester film having a polyester adhesive layer on one side to fabricate an FFC.

现有例Existing example

通过电镀在φ0.6mm的Cu线周围施加厚度5μm的Sn镀层。其后,经过冷拔、压轧工序,制作了0.05mm厚度、0.3mm宽度的扁平线。其后的工序是在与实施例完全相同的条件下制作了FFC。A Sn plating layer with a thickness of 5 μm was applied around the Cu wire of φ0.6 mm by electroplating. Thereafter, a flat wire having a thickness of 0.05 mm and a width of 0.3 mm was produced through cold drawing and rolling processes. In the subsequent steps, FFCs were produced under exactly the same conditions as in Examples.

实施在实施例及现有例中制作的FFC端子部上的Sn镀层导体的XPS,在图4、图5中显示其表面氧化膜分析结果。XPS was carried out on the Sn-plated conductors on the FFC terminal parts fabricated in Examples and Conventional Examples, and the analysis results of the surface oxide film are shown in FIGS. 4 and 5 .

图4显示Sn的XPS分析,实施例及现有例都是键能(Binding Energy)为486、487eV,可见X线强度(kCPS)的峰值,可确认形成了SnO、SnO2FIG. 4 shows the XPS analysis of Sn. Both the Examples and the Conventional Examples show that the binding energy (Binding Energy) is 486 and 487 eV, and the peak of the X-ray intensity (kCPS) can be seen, and it can be confirmed that SnO and SnO 2 are formed.

另外,关于Zn,如图5所示,在实施例中,为键能262eV,可见X线强度的峰值,可确认ZnO形成,但在现有例中不能确认Zn的峰值。In addition, regarding Zn, as shown in FIG. 5, in the example, the bond energy was 262eV, the peak of the X-ray intensity was seen, and the formation of ZnO was confirmed, but the peak of Zn could not be confirmed in the conventional example.

因此得知,在现有例中,表面氧化膜仅由Sn氧化物构成,在实施例中,是由Sn氧化物与Zn氧化物的混合构成。Therefore, in the conventional example, the surface oxide film was composed of only Sn oxide, and in the working example, it was composed of a mixture of Sn oxide and Zn oxide.

下面,在图6(a)、图6(b)中显示在实施例及现有例中制作的FFC端子部的Sn镀层导体的AES深度方向分析结果。Next, the results of AES analysis in the depth direction of the Sn-plated conductors at the terminal portion of the FFC fabricated in Examples and Conventional Examples are shown in FIG. 6( a ) and FIG. 6( b ).

将图6(a)的实施例与图6(b)的现有例比较,可以确认Sn、Cu、O、C的深度方向的分布大致相同,但在实施例中,Zn浓度的峰值一直到深度5nm。Comparing the embodiment of Fig. 6 (a) with the conventional example of Fig. 6 (b), it can be confirmed that the distributions in the depth direction of Sn, Cu, O, and C are approximately the same, but in the embodiment, the peak value of the Zn concentration reaches Depth 5nm.

然后,将实施例及现有例的FFC与连接器嵌合,进行250hr的室温放置。其后,将FFC从连接器上卸下,通过对嵌合部进行SEM观察,计量出1μm以上的晶须产生几率。在表2中显示从XPS分析结果及AES深度方向分析中得到的氧化膜厚度和晶须发生频度频度。Then, the FFCs of the examples and the conventional examples were fitted to the connectors, and left at room temperature for 250 hours. Thereafter, the FFC was removed from the connector, and the fitting portion was observed by SEM to measure the probability of occurrence of whiskers of 1 μm or more. Table 2 shows the oxide film thickness and the frequency of occurrence of whiskers obtained from the XPS analysis results and the AES depth direction analysis.

表2Table 2

  表面氧化膜构成 氧化膜厚度 晶须产生频度 实施例 Sn氧化物、Zn氧化物 2.7nm 7.6% 现有例 Sn氧化物 2.5nm 22% Composition of surface oxide film Oxide film thickness Frequency of whiskers Example Sn oxide, Zn oxide 2.7nm 7.6% Existing example Sn oxide 2.5nm twenty two%

这样,确认了本发明的实施例与现有例比较,晶须产生频度从22%降低到7.6%,约降低了1/3。Thus, it was confirmed that in the examples of the present invention, the frequency of whisker generation was reduced from 22% to 7.6%, which is about 1/3 reduction compared with the conventional examples.

进而,为了比较热处理造成的导体表面氧化的进度,将实施例及现有例中制作的FFC在150℃下实施了24hr的热处理。其后,实施了FFC端子部的Sn镀层的AES深度方向分析。其结果显示在图7(a)、图7(b)中。Furthermore, in order to compare the progress of conductor surface oxidation by heat treatment, the FFC produced in Examples and Conventional Examples was subjected to heat treatment at 150° C. for 24 hr. Thereafter, AES analysis in the depth direction of the Sn plating layer at the FFC terminal portion was carried out. The results are shown in Fig. 7(a) and Fig. 7(b).

在图7(b)的现有例中,与初期状态的图6(b)比较,在初期状态下,O原子是在5nm以下有峰值,但通过热处理,O原子进入到10nm以上的内部,氧化膜很厚地生长了。与此不同,在图7(a)的本发明的实施例中,在初期状态下,O原子在5nm以下的峰值在热处理中也大致未变,O原子的进入深度与初期状态相比,没有看到很大的差。In the conventional example of Fig. 7(b), compared with Fig. 6(b) in the initial state, in the initial state, O atoms have a peak at 5 nm or less, but by heat treatment, O atoms enter the interior of 10 nm or more, The oxide film grew thickly. In contrast, in the embodiment of the present invention shown in FIG. 7(a), in the initial state, the peak value of the O atoms below 5 nm is substantially unchanged during the heat treatment, and the penetration depth of the O atoms is not as compared with the initial state. Saw a big difference.

由此能够确认,在本发明的实施例中,在通常使用FFC的环境下,表面氧化膜几乎不生长,能够维持良好的晶须特性、接触电阻特性。From this, it can be confirmed that in the examples of the present invention, under the environment where the FFC is usually used, the surface oxide film hardly grows, and good whisker characteristics and contact resistance characteristics can be maintained.

Claims (8)

1.一种挠性基板用导体,其配设在挠性扁平电缆或挠性印刷电路板内部,其特征在于:在Cu或Cu合金构成的导体的表面形成Sn或Sn合金镀膜,该镀膜的表面氧化膜由Sn以外的元素的氧化物或Sn氧化物与Sn以外的元素的氧化物混合而成的混合氧化物构成。1. A conductor for a flexible substrate, which is arranged inside a flexible flat cable or a flexible printed circuit board, characterized in that: a Sn or Sn alloy coating is formed on the surface of a conductor made of Cu or a Cu alloy, and the coating has a The surface oxide film is composed of oxides of elements other than Sn or mixed oxides in which Sn oxides and oxides of elements other than Sn are mixed. 2.根据权利要求1所述的挠性基板用导体,其特征在于:上述Sn以外的元素是氧化倾向高于Sn的元素。2. The conductor for flexible boards according to claim 1, wherein the element other than Sn is an element having a higher oxidation tendency than Sn. 3.根据权利要求1或2所述的挠性基板用导体,其特征在于:上述Sn以外的元素是选自Zn、P、Al、Ti的至少一种以上的元素。3. The conductor for flexible substrates according to claim 1 or 2, wherein the element other than Sn is at least one element selected from the group consisting of Zn, P, Al, and Ti. 4.根据权利要求1至3所述的挠性基板用导体,其特征在于:由上述Sn以外的元素的氧化物或Sn氧化物与Sn以外的元素的氧化物混合而成的混合氧化物所构成的表面氧化膜厚度为5nm以下。4. The conductor for flexible substrates according to claims 1 to 3, characterized in that the conductor is made of an oxide of an element other than Sn or a mixed oxide obtained by mixing an oxide of an element other than Sn and an oxide of an element other than Sn. The formed surface oxide film has a thickness of 5nm or less. 5.一种挠性基板用导体的制造方法,该导体配设在挠性扁平电缆或挠性印刷电路板内部,其特征在于:在Cu或Cu合金构成的导体的表面形成Sn或Sn合金镀膜,并在该表面形成选自Zn、P的至少一种以上元素的镀膜,其后通过回流处理,使得表面氧化膜由这些选择的元素的氧化物构成或者由Sn氧化物与这些选择的元素的氧化物的混合氧化物构成。5. A method for producing a conductor for a flexible substrate, the conductor being arranged inside a flexible flat cable or a flexible printed circuit board, characterized in that a Sn or Sn alloy coating film is formed on the surface of the conductor composed of Cu or Cu alloy , and form a coating film of at least one element selected from Zn and P on the surface, and then reflow treatment so that the surface oxide film is composed of oxides of these selected elements or composed of Sn oxide and these selected elements. Oxides of mixed oxides. 6.一种挠性基板用导体的制造方法,该导体配设在挠性扁平电缆或挠性印刷电路板内部,其特征在于:在Cu或Cu合金构成的导体的表面形成包含选自Zn或P的至少一种以上元素的Sn或Sn合金镀膜,其后通过回流处理,使得表面氧化膜由这些选择的元素的氧化物构成或者由Sn氧化物与这些选择的元素的氧化物的混合混合氧化物构成。6. A method of manufacturing a conductor for a flexible substrate, the conductor being disposed inside a flexible flat cable or a flexible printed circuit board, characterized in that: a conductor containing Cu or Cu alloy is formed on the surface of a conductor comprising Zn or Sn or Sn alloy coating of at least one element of P, followed by reflow treatment, so that the surface oxide film is composed of oxides of these selected elements or mixed and oxidized by a mixture of Sn oxides and oxides of these selected elements things constitute. 7.一种挠性基板,其特征在于:在并行排列有多根权利要求1~4的任一项所述的挠性基板用导体的导体群的两面设置了绝缘层。7. A flexible substrate characterized in that an insulating layer is provided on both surfaces of a conductor group in which a plurality of conductors for a flexible substrate according to any one of claims 1 to 4 are arranged in parallel. 8.根据权利要求7所述的挠性基板,其特征在于:由单面具有粘结层的树脂膜材料构成上述绝缘层。8. The flexible substrate according to claim 7, wherein the insulating layer is formed of a resin film material having an adhesive layer on one side.
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CN106676598A (en) * 2016-12-13 2017-05-17 上海交通大学 A method for restraining tin whisker growing based on micro-nano cone structure
CN109509731A (en) * 2017-09-14 2019-03-22 屏东科技大学 Tin-silver joint structure of semiconductor and its manufacturing method

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JP4367149B2 (en) * 2004-01-30 2009-11-18 日立電線株式会社 Flat cable conductor, method of manufacturing the same, and flat cable
JP5376553B2 (en) * 2006-06-26 2013-12-25 日立金属株式会社 Wiring conductor and terminal connection

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN106676598A (en) * 2016-12-13 2017-05-17 上海交通大学 A method for restraining tin whisker growing based on micro-nano cone structure
CN106676598B (en) * 2016-12-13 2019-08-23 上海交通大学 A method of growth of tin crystal whisker is inhibited based on micro-nano needle wimble structure
CN109509731A (en) * 2017-09-14 2019-03-22 屏东科技大学 Tin-silver joint structure of semiconductor and its manufacturing method

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