CN101499803B

CN101499803B - Digital to Analog Converter

Info

Publication number: CN101499803B
Application number: CN2008100067025A
Authority: CN
Inventors: 王凌澐; 邱明正
Original assignee: Himax Technologies Ltd
Current assignee: Himax Technologies Ltd
Priority date: 2008-01-28
Filing date: 2008-01-28
Publication date: 2011-09-07
Anticipated expiration: 2028-01-28
Also published as: CN101499803A

Abstract

The invention provides a digital-to-analog converter for converting input words into dual-output voltages. The input word comprises least significant bits and remaining bits. The digital-to-analog converter includes a resistor string digital-to-analog conversion section and a selection section. The resistor string digital-to-analog conversion part can provide the nth order voltage level and the (n +2) th order voltage level according to the rest bits. The selection section includes a first multiplexer and a second multiplexer. The first multiplexer is coupled to the resistor string digital-analog conversion part and provides a first output voltage according to the panel polarity signal. The second multiplexer is coupled to the resistor string digital-analog conversion part and provides a second output voltage according to the least significant bit of the input word. The digital-to-analog converter may further include an operational amplifier for averaging the dual output voltages to generate the analog output signal.

Description

Digital analog converter

Technical field

The invention relates to a kind of digital analog converter, and particularly relevant for a kind of digital analog converter that uses two parts to handle an input word.

Background technology

At present many different digital analog converters (DAC) are being arranged on the market, for example resistance string (R-String) digital analog converter.Fig. 1 is a kind of traditional resistor string D/A converter.Resistor string D/A converter 100 comprises a string resistance 110 and a selector 120.Selector 120 comprises selection wire 124, wherein all comprises switch element 122 on each bar selection wire 124.Each switch element 122 is controlled by wherein one of input word.

Resistance string is connected in a high reference voltage (V _H) and a low reference voltage (V _L) between.Each selection wire 124 is connected in the node in the resistance string.The same time has only all switches of a selection wire 124 to be opened by this input word, and the voltage of a corresponding node in the resistance string is coupled to output node (Vo).

With N bit digital analog-converted, resistor string D/A converter 100 needs 2 ^NThe bar selection wire.And each selection wire 124 needs N switch element.Therefore, the resistor string D/A converter 100 of N position needs 2 ^N* N switch element.When the figure place of input word increased, the quantity of switch element also increased rapidly, and caused layout area to enlarge.This will have bad influence for dwindling chip and reducing cost.

Summary of the invention

Therefore one aspect of the present invention is providing a kind of digital analog converter exactly, can reduce circuit load and reduce layout area.

According to one embodiment of the invention, digital analog converter can be converted into dual output voltage with an input word, and input word comprises a least significant bit and remaining bit.Digital analog converter comprises resistor string digital analog conversion part and selects part.Resistor string digital analog conversion part can provide n rank voltage level and (n+2) rank voltage level according to remaining bit.

The selection portion branch comprises first multiplexer and second multiplexer.First multiplexer is coupled to resistor string digital analog conversion part, provides first output voltage according to the panel polar signal.Second multiplexer is coupled to resistor string digital analog conversion part, according to the least significant bit of input word, and provides second output voltage.

According to another embodiment of the present invention, digital analog converter can be converted into an analog output signal with an input word, and input word comprises a least significant bit and a plurality of remaining bit.Digital analog converter comprises resistor string digital analog conversion part and selects part.Resistor string digital analog conversion part can provide n rank voltage level and (n+2) rank voltage level according to remaining bit.

Select part to be used to provide dual output voltage, comprise first multiplexer and second multiplexer.First multiplexer is coupled to resistor string digital analog conversion part, provides first output voltage according to the panel polar signal.Second multiplexer is coupled to resistor string digital analog conversion part, according to the least significant bit of input word, and provides second output voltage.

Digital analog converter more can comprise operational amplifier, is used for average dual output voltage, produces analog output signal.

Generally speaking, an input word comprises least significant bit and remaining bit.Resistor string digital analog conversion part can provide n rank voltage level and (n+2) rank voltage level according to remaining bit, and the selection number of elements of its each selection wire lacks one than the selection number of elements of traditional N position resistor string D/A converter.Therefore, the circuit load of digital analog converter can effectively reduce, and reduces layout area.In addition, select part to be coupled to resistor string digital analog conversion part, and provide dual output voltage according to the panel polar signal.Adopt operational amplifier and average dual output voltage, produce analog output signal.

Describe the present invention below in conjunction with the drawings and specific embodiments, but not as a limitation of the invention.

Description of drawings

For above-mentioned and other purposes of the present invention, feature, advantage and embodiment can be become apparent, being described in detail as follows of appended accompanying drawing:

Figure 1 shows that a traditional resistor string digital analog converter;

Figure 2 shows that according to one embodiment of the invention;

Figure 3 shows that the resistor string digital analog conversion part in one embodiment of the invention.

Wherein, Reference numeral

100: resistor string D/A converter 110: resistance

120: selector 122: switch element

124: selection wire 200: digital analog converter

202: resistor string digital analog conversion part 204: select part

Multiplexer 206 in 208: the first: operational amplifier

300: 210: the second multiplexers of resistor string digital analog conversion part

306: switch element 302:N selects 2 selectors

304: selection wire

308: resistance

Embodiment

Please refer to Fig. 2, it is depicted as according to one embodiment of the invention.Digital analog converter 200 is converted into dual output voltage V with an input word _O1And V _O2Input word comprise least significant bit (LeastSignificant Bit, LSB) and remaining bit.8 input word B ₇B ₆B ₅B ₄B ₃B ₂B ₁B ₀Comprise least significant bit B ₀And remaining bit B ₇B ₆B ₅B ₄B ₃B ₂B ₁Digital analog converter 200 comprises resistor string digital analog conversion part 202 and selects part 204.Resistor string digital analog conversion part 202 can provide n rank voltage level and (n+2) rank voltage level according to the remaining bit of input word.Select part 204 that dual output voltage V is provided _O1And V _O2Select part 204 to comprise first multiplexer 208 and second multiplexer 210.First multiplexer 208 is coupled to resistor string digital analog conversion part 202.First multiplexer 208 is to provide first output voltage V according to panel polar signal (for example MREV signal) _O1Second multiplexer 210 is coupled to resistor string digital analog conversion part 202.Second multiplexer 210 is the least significant bits according to input word, and second output voltage V is provided _O2

Digital analog converter 200 can comprise operational amplifier 206.Digital analog converter 206 is coupled to selects part 204, and is used for average dual output voltage V _O1And V _O2, produce analog output signal.

Please refer to Fig. 3, it is depicted as an embodiment of resistor string digital analog conversion part.Resistor string digital analog conversion part 300 comprises that voltage generator and N select 2 selectors 302.Voltage generator can produce voltage level V ₀, V ₂..., V ₂₅₄, V ₂₅₆Voltage level V ₀, V ₂..., V ₂₅₄, V ₂₅₆It is even number discontinuous (discrete) aanalogvoltage that is used for digital-to-analogue conversion in 8 input words.Voltage generator comprises that resistance 308 electrically is series at a high reference voltage (V _R) and a low reference voltage (V _L) between, voltage level V also is provided ₀, V ₂..., V ₂₅₄, V ₂₅₆N selects 2 selectors 302 to be coupled to voltage generator, and provides n rank voltage level and (n+2) rank voltage level ((V for example according to the remaining bit of input word ₀And V ₂) or (V ₂₅₂And V ₂₅₄) voltage level).Special, N selects 2 selectors 302 to have selection wire 304 correspondences and is coupled to this voltage generator, and selects n rank voltage level and (n+2) rank voltage level.With 8 bit digital analog converters, each selection wire 304 comprises seven switch elements 306 ((input word bit sum-1) individual switch in series), and each switch element 306 (D ₇D ₆D ₅D ₄D ₃D ₂D ₁) by a remaining bit (B ₇B ₆B ₅B ₄B ₃B ₂B ₁) control.Switch element 306 comprises PMOS and nmos pass transistor.These transistorized arrangement positions can be with two adjacent voltage level V _nAnd M _N+2, when transistor is received remaining bit (B ₇B ₆B ₅B ₄B ₃B ₂B ₁) time, correspondence exports node V to _In1And V _In2, wherein n is the integer between 0 to 254.Specifically, when receiving remaining bit 0000000, voltage level V ₀And V ₂Promptly output becomes voltage V relatively _In1And V _In2When receiving remaining bit 1111111, voltage level V ₂₅₄And V ₂₅₆Promptly output becomes voltage V relatively _In1And V _In2

Please refer to Fig. 2, second input (0) of the first input end of first multiplexer 208 (1) and second multiplexer 210 is to be coupled to voltage level V _In1, second input (0) of first multiplexer 208 and the first input end (1) of second multiplexer 210 are to be coupled to voltage level V _In2

First multiplexer 208 is selected voltage V according to panel polarity MREV signal _In1And V _In2One of them becomes first output voltage V _O1Second multiplexer 210 is selected voltage V according to the least significant bit of input word _In1And V _In2One of them becomes first output voltage V _O2Special, when the plate signal was high voltage face to face, first multiplexer 208 was selected voltage V _In1It is first output voltage V _O1, when the plate signal was low-voltage face to face, first multiplexer 208 was selected voltage V _In2It is first output voltage V _O1When the least significant bit of input word was high voltage, second multiplexer 210 was selected voltage V _In2It is second output voltage V _O2, when the least significant bit of input word was low-voltage, second multiplexer 210 was selected voltage V _In1It is second output voltage V _O2

For clearer explanation, can find out the signal V that is produced by different MREV signal input word and logic level from table 1 _In1, V _In2, V _O1, V _O2, and V _OVoltage level.

Input word

V _in1

V _in2

V _O1

V _O2

V _O

MREV＝1

00,000,000

V0

V2

V0

MREV＝0

11,111,111

V254

V256

MREV＝1

00,000,001

V0

V2

V0

V2

V1

?MREV＝0

11,111,110

V254

V256

V254

V255

Table 1

In the flat panel (for example oled panel) of mobile phone, those skilled in the art often utilize the panel polar signal of MREV signal as its data transaction.Please refer to the secondary series of table 1, when input word is 00,000,000 o'clock, V _In1Equal V0 and V _In2Equal V2.The MREV signal is to be in high logic level, is first output voltage V so select V0 _O1Because the least significant bit of input word is 0, be second output voltage V so select V0 _O2

With reference to the 3rd row of table 1, when input word is 11,111,111 o'clock, V _In1Equal V254 and V _In2Equal V256.The MREV signal is to be in low logic level, is first output voltage V so select V256 _O1Because the least significant bit of input word is 1, also be second output voltage V so select V256 _O2

Operational amplifier 206 is coupled to selects part 204, can be used for average dual output voltage V _O1And V _O2, produce analog output signal V _O, for example, analog output signal V _OEqual (V _O1+ V _O2/ 2).With input word 0000000 is example, voltage V _O1And V _O2Be all V0, so V _O=V ₀+ V0/2=V0.With input word 0000001 is example, voltage V _O1And V _O2Be V0 and V2, so V _O=V0+V2/2=V1.

Though the present invention discloses as above with a preferred embodiment; right its is not in order to limit the present invention; the present invention also can have other various embodiments; under the situation that does not deviate from spirit of the present invention and essence thereof; those of ordinary skill in the art can make various corresponding changes and distortion according to the present invention, but these corresponding changes and distortion all should belong to the protection range of the appended claim of the present invention.

Claims

1. A digital-to-analog converter for converting an input word into a dual output voltage, wherein the input word comprises a least significant bit and a plurality of remaining bits, characterized in that the digital-to-analog converter comprises:

A resistor string digital-to-analog conversion part is used to provide an n-th step voltage level and an (n+2)-th step voltage level according to the remaining bits, wherein the resistor string digital-to-analog conversion part further includes:

a voltage generator for generating multiple voltage levels; and

An N selects 2 selector, has a plurality of selection lines correspondingly coupled to the voltage generator to provide the corresponding voltage level, each selection line includes (total number of input word bits-1) switching elements connected in series,

wherein each of the switching elements is switched by one of the remaining bits; and

A selection section, including:

A first multiplexer is coupled to the digital-to-analog conversion part of the resistor string, and provides a first output voltage according to a panel polarity signal; and

A second multiplexer is coupled to the resistor string digital-to-analog conversion part, and provides a second output voltage according to the least significant bit of the input word.

2. The digital-to-analog converter according to claim 1, wherein the voltage generator comprises a plurality of series resistors for providing the voltage level.

3. The digital-to-analog converter according to claim 1, wherein the first multiplexer selects one of the nth-order voltage level and the (n+2)th-order voltage level as The first output voltage, and the second multiplexer selects one of the nth stage voltage level and the (n+2)th stage voltage level as the second output voltage.

4. The digital-to-analog converter according to claim 3, wherein when the panel polarity signal is a high voltage, the first multiplexer selects the nth-order voltage level as the first output voltage, When the panel polarity signal is a low voltage, the first multiplexer selects the (n+2)th stage voltage level as the first output voltage.

5. The digital-to-analog converter according to claim 3, wherein when the least significant bit of the input word is a high voltage, the second multiplexer selects the (n+2)th stage voltage level As the second output voltage, when the least significant bit of the input word is a low voltage, the second multiplexer selects the nth-order voltage level as the second output voltage.

6. The digital-to-analog converter according to claim 1, wherein the voltage level is a grayscale voltage.

7. A digital-to-analog converter for converting an input word into an analog output signal, characterized in that the input word comprises a least significant bit and a plurality of remaining bits, and the digital-to-analog converter comprises:

a voltage generator for generating multiple voltage levels; and

An N selects 2 selector, has a plurality of selection lines correspondingly coupled to the voltage generator, and provides the corresponding voltage level, and each selection line includes (total number of input word bits-1) switching elements connected in series , wherein each of the switching elements is switched by one of the remaining bits; and

An optional section for providing dual output voltages consisting of:

a second multiplexer coupled to the resistor string digital-to-analog conversion part, and provides a second output voltage according to the least significant bit of the input word; and

An operational amplifier, coupled to the dual output voltages, is used to average the dual output voltages to generate analog output signals.

8. The digital-to-analog converter according to claim 7, wherein the voltage generator comprises at least a plurality of series resistors for providing the voltage level.

9. The digital-to-analog converter according to claim 7, wherein the first multiplexer selects one of the nth-order voltage level and the (n+2)th-order voltage level as the first An output voltage, and the second multiplexer selects one of the nth stage voltage level and the (n+2)th stage voltage level as the second output voltage.

10. The digital-to-analog converter according to claim 9, wherein when the panel polarity signal is a high voltage, the first multiplexer selects the nth-order voltage level as the first output voltage, When the panel polarity signal is a low voltage, the first multiplexer selects the (n+2)th stage voltage level as the first output voltage.

11. The digital-to-analog converter according to claim 9, wherein when the least significant bit of the input word is a high voltage, the second multiplexer selects the (n+2)th stage voltage level as For the second output voltage, when the least significant bit of the input word is a low voltage, the second multiplexer selects the nth stage voltage level as the second output voltage.

12. The digital-to-analog converter as claimed in claim 7, wherein the voltage level is a gray scale voltage.