CN101459838B - Inter-frame prediction system, method and multimedia processor - Google Patents
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Abstract
The invention relates to the field of processing video images and provides a system, a method and a multimedia processor for predicting interframes, which comprises a preprocessing module for receiving the parameter of the current block, confirming the DMA parameter output which is needed by DMA operation and transmitting a first data effective signal, a first buffer memory area for receiving and memorizing the DMA parameter, a DMA operation module for obtaining the DMA parameter, outputting reference data of a reference block after the DMA operation and transmitting a second data effective signal, a second buffer memory area for receiving and memorizing reference data, a reference data reading module for reading the reference data and outputting the data, an interpolation module for carrying out the interpolation operation according to reference data. The invention adopts a flow line type design, which fully utilizes the DMA bandwidth, improves the interframe predicting performance, simultaneously supports the image rotating function, reduces the requirements to the dimension of the images, adopts a reusable buffer memory area, saves the area of a chip and saves the cost of realizing on hardware.
Description
Technical field
The invention belongs to field of video image processing, relate in particular to a kind of inter-frame prediction system, method and multimedia processor based on novel video encoding standard.
Background technology
At present, mobile multimedia processor is widely used in the various portable type electronic products, and market is also more and more higher to the requirement of properties of product, so this Video processing ability to mobile multimedia processor is had higher requirement.
Inter prediction comprises the prediction of motion vector, the reading and the interpolation of fraction pixel of reference data.Because there is certain correlation in the scenery that live image closes in the frame, therefore image is divided into some or macro block (MB), and manage to search out each piece or the position of macro block in the contiguous frames image, and draw the relation of locus between the two, the relative displacement that obtains is exactly motion vector (MV), and this process that obtains motion vector is called estimation (ME).
(DMA is a kind of mechanism of quick transmission data for Direct Memory Access, DMA) operation in the general employing direct memory access (DMA) of reading of reference data.Data passes can be from the adaptive internal memory that snaps into, from the internal memory to the adapter or from one section internal memory to another section internal memory.The importance of DMA technology is, utilizes it not needing when data transmit to carry out central processing unit (Central Processing Unit, participation CPU).
Existing technology is when doing inter prediction, the DMA bandwidth availability ratio is not high when reading reference data, be because by DMA read must wait until that interpolating module finishes interpolation operation after the reference data after, just can read new reference data again, DMA has long time to be in idle condition like this, can't utilize the DMA bandwidth fully.
Summary of the invention
The purpose of the embodiment of the invention is to provide a kind of inter-frame prediction system, method and multimedia processor, being intended to solve in the existing inter-frame prediction method DMA reads reference data and will wait until that could continue to read new reference data after interpolation operation is finished causes the DMA bandwidth availability ratio low, the problem of inter prediction poor performance.
The embodiment of the invention is achieved in that a kind of inter-frame prediction system, and described system comprises:
Pretreatment module, be used to receive the motion vector parameter and the anglec of rotation parameter of current block, determine the needed DMA parameter of direct memory access (DMA) dma operation according to described motion vector parameter and anglec of rotation parameter,, and send the first data useful signal described DMA parameter output;
First buffer area is used to receive and store the described DMA parameter that described pretreatment module is exported;
The dma operation module is used for obtaining described DMA parameter from described first buffer area behind the first data useful signal that receives the pretreatment module transmission, carries out exporting the reference data of reference block behind the dma operation, and sends the second data useful signal;
Second buffer area is used to receive and store the reference data of the reference block of described dma operation module output;
The reference data read module is used for behind the second data useful signal that receives the transmission of dma operation module, reads the reference data and the output of described reference block from second buffer area;
Interpolating module is used to receive the reference data of the reference block of described reference data read module output, carries out interpolation arithmetic.
Another purpose of the embodiment of the invention is to provide a kind of inter-frame prediction method, and described method comprises the steps:
Pretreatment module is determined the needed DMA parameter of direct memory access (DMA) dma operation according to the motion vector parameter and the anglec of rotation parameter of current block, described DMA parameter is stored in first buffer area, and sends the first data useful signal;
The dma operation module receives the described first data useful signal, obtains the DMA parameter from described first buffer area, and the reference data of carrying out output reference block behind the dma operation according to described DMA parameter is stored in second buffer area, and sends the second data useful signal;
Interpolating module receives the described second data useful signal, obtains the reference data of reference block from described second buffer area, carries out interpolation arithmetic.
Another purpose of the embodiment of the invention is to provide a kind of mobile multimedia processor that adopts above-mentioned inter-frame prediction system to realize.
The embodiment of the invention adopts the design of pipeline system, and all modules all are concurrent execution, and it is about about 25% to make that the performance of inter prediction has improved, and the DMA bandwidth availability ratio reaches more than 90%; Support the image spinfunction simultaneously, reduced requirement, adopt reusable buffer area, save chip area, saved the cost of realizing on the hardware picture size.
Description of drawings
Fig. 1 is a kind of inter-frame prediction system modular structure figure that the embodiment of the invention provides;
Fig. 2 is the figure out-of-bounds situation schematic diagram that the embodiment of the invention provides;
Fig. 3 is that the macro block reference data storage of the 16x16 that provides of the embodiment of the invention is in the situation schematic diagram of second buffer area;
Fig. 4 is a kind of inter-frame prediction method flow chart that the embodiment of the invention provides;
Fig. 5 is the signature that image that the embodiment of the invention provides is divided the index value of sub-piece when not rotating;
Fig. 6 is the signature that image that the embodiment of the invention provides revolves the index value of dividing sub-piece when turning 90 degrees;
Fig. 7 is the signature that image Rotate 180 that the embodiment of the invention provides is divided the index value of sub-piece when spending;
Fig. 8 is the signature that image rotation 270 that the embodiment of the invention provides is divided the index value of sub-piece when spending;
Fig. 9 is the REF megacell metadata cache schematic diagram that the embodiment of the invention provides;
Figure 10 be the embodiment of the invention provide when depositing the reference data of UV component, the situation schematic diagram of two 2 * 2 public buffer areas of sub-piece.
Embodiment
In order to make purpose of the present invention, technical scheme and advantage clearer,, the present invention is further elaborated below in conjunction with drawings and Examples.Should be appreciated that specific embodiment described herein only in order to explanation the present invention, and be not used in qualification the present invention.
The embodiment of the invention is based on novel video encoding standard, take the pipeline system design, earlier determine the DMA parameter according to the parameters such as motion vector of current block, the DMA parameter is stored in carries out the reference data that dma operation reads reference block in the buffer area again, carry out interpolation arithmetic according to reference data then, make full use of the DMA bandwidth.
The embodiment of the invention is mainly used in multimedia processor.As a preferred embodiment of the present invention, a kind of inter-frame prediction system modular structure as shown in Figure 1, comprise pretreatment module 101, first buffer area 102, dma operation module 103, DMA port one 04, memory module 105, adjusting module 106, the second buffer areas 107, reference data read module 108 and interpolating module 109.
As one embodiment of the present of invention, when definite DMA parameter, need to consider the situation of visual out-of-bounds: putting in order within the frame image if read the data of current pixel piece, then according to the needed reference data size of this current pixel piece reading of data, the size of the needed reference data of this current pixel piece is relevant with the fraction pixel motion vector, when the dy of fraction pixel motion vector component is zero, the data that need read are less, for example the piece of 16x16 only need read the size of data of (16+5) x16, the piece of 8x8 just reads the size of data of (8+5) x8, when the dy of fraction pixel motion vector component is non-vanishing, need reading of data bigger, for example the piece of 16x16 just reads the size of data of (16+5) x (16+5), and the piece of 8x8 just reads the size of data of (8+5) x (8+5).If the data of read pixel piece outside whole frame image, then are reclassified as this block of pixels the sub-piece of a plurality of 4x4, each sub-piece calculates the DMA parameter respectively then.As shown in Figure 2, a 8X8 piece is divided the piece of two 4x4 and the piece of a 4x8, but because the piece out-of-bounds of 4x8, so this 8X8 piece finally is divided into the piece of four 4x4.Other out-of-bounds situation is like this too.
In the embodiment of the invention, adjusting module 106 is connected with second buffer area 107 with dma operation module 103, is used for when the image out-of-bounds reference data of reference block being carried out the out-of-bounds adjustment.
Reference data read module 108 is used for behind the second data useful signal that receives 103 transmissions of dma operation module, reads the reference data and the output of reference block from second buffer area 107.
Interpolating module 109 is used to receive the reference data of the reference block of reference data read module 108 outputs, carries out interpolation arithmetic.
In the embodiment of the invention, the DMA parameter comprises the request block type parameter, and this request block type has 7 kinds: 16 * 16,16 * 8,8 * 16,8 * 8,8 * 4,4 * 8 and 4 * 4.As one embodiment of the present of invention, when the size of the current block that reads was 4 * 4, then interpolating module carried out computing according to current block in the interpolation arithmetic; When the size of the current block that reads is 16 * 16 or 16 * 8 or 8 * 16 or 8 * 8 or 8 * 4 or 4 * 8, current block is divided into a plurality of 4 * 4 sub-piece, then interpolating module carries out computing according to the sub-piece of 4 * 4 after dividing.
In the embodiment of the invention, how being put into second buffer area with the macro block reference data of a 16x16 is example.Because considering interpolation arithmetic is to adopt the branch pixel to carry out interpolation, so the macro block of 16x16 has been carried out extension, actual is that the data block of a 21x21 is (actual mechanical process because the size of data of each DMA transmission data maximum is 256 bytes from the DMA data downloaded, so the data block of 21x21 can only be carried out twice dma operation, read for the first time 21x12 data, read 21x9 data for the second time).Carry out the reorganization of data then, be put in the data buffer area of four 9x9, the line data that wherein has repeats to have write repeatedly.For example the data line of line=8 repeats to have write three times, has been put into the data buffer area of the 0th, the 1st, the 2nd 9x9 respectively, as shown in Figure 3.
A kind of mobile multimedia processor that adopts above-mentioned inter-frame prediction system to realize.
A kind of inter-frame prediction method realization flow that the embodiment of the invention provides as shown in Figure 4, it is existing that details are as follows:
In step S401, pretreatment module is determined the needed DMA parameter of dma operation according to the motion vector parameter and the anglec of rotation parameter of current block, the DMA parameter is stored in first buffer area, and sends the first data useful signal;
In step S402, the dma operation module receives the first data useful signal, obtains the DMA parameter from first buffer area, and the reference data of carrying out output reference block behind the dma operation according to the DMA parameter is stored in second buffer area, and sends the second data useful signal;
In step S403, interpolating module receives the second data useful signal, obtains the reference data of reference block from second buffer area, carries out interpolation arithmetic.
In the embodiment of the invention, pretreatment module is determined the postrotational position of image according to anglec of rotation parameter, and by the dma operation module with postrotational image storage in second buffer area.The operation of interpolating module is based on 4 * 4 sub-pieces, and therefore the macroblock partitions with 16x16 is the sub-piece of 16 4x4.According to the sub-piece after dividing, reference data is put into second buffer area respectively.
Fig. 5 shows the index value (index) of dividing sub-piece under 0 angle, only need deposit reference data in the corresponding cache region according to index value (index) to get final product when 0 spends.Fig. 6, Fig. 7, Fig. 8 show 90 degree respectively, 180 degree and 270 degree are divided the index value of sub-piece down, when angle is not 0, the index value of piece need be converted to the index value of (angle is 0) relevant position when not rotating, index value according to conversion comes store data then, for example 90 index when spending are 0 Y component blocks, index need be converted to the index of 0 relevant position when spending, index after the conversion is 5, then with deposit data in the buffer area that is labeled as 5 Y component, other angle does not in like manner repeat them here.
The processing of mark pixel motion vector when rotating for image, as an example of the present invention, during 1/4 pixel interpolation processing of luminance component, the motion vector change of being correlated with when rotated, as shown in table 1,
| The number of degrees of rotation | Directions X | The |
|
| 0 | | Mv_dy | |
| 90 | 4-Mv_dy | Mv_dx | |
| 180 | 4-Mv_dx | 4-Mv_dy | |
| 270 | Mv_dy | 4-Mv_dx |
Table 1
Wherein Mv_dx represents the motion vector of the fraction pixel on 0 directions X when spending, and Mv_dy represents the motion vector of the fraction pixel on 0 direction of Y when spending; Revolve turn 90 degrees after, the motion vector of the fraction pixel on the directions X is 4-Mv_dy, the motion vector Mv_dx of the fraction pixel on the Y direction; Behind the Rotate 180 degree, the motion vector of the fraction pixel on the directions X is 4-Mv_dx, the motion vector 4-Mv_dy of the fraction pixel on the Y direction; Behind rotation 270 degree, the motion vector of the fraction pixel on the directions X is Mv_dy, the motion vector 4-Mv_dx of the fraction pixel on the Y direction.
During 1/8 pixel interpolation processing of chromatic component, motion vector has also been done relevant change when doing relevant rotation, as shown in table 2:
| The number of degrees of rotation | Directions X | The |
|
| 0 | | Mv_dy | |
| 90 | 8-Mv_dy | Mv_dx | |
| 180 | 8-Mv_dx | 8-Mv_dy |
| The number of degrees of rotation | Directions X | The Y direction |
| 270 | Mv_dy | 8-Mv_dx |
Table 2
Wherein Mv_dx is the fraction pixel motion vector on 0 directions X when spending, and Mv_dy is the fraction pixel motion vector on 0 direction of Y when spending; Revolve turn 90 degrees after, the motion vector of the fraction pixel on the directions X is 8-Mv_dy, the motion vector Mv_dx of the fraction pixel on the Y direction; Behind the Rotate 180 degree, the motion vector of the fraction pixel on the directions X is 8-Mv_dx, the motion vector 8-Mv_dy of the fraction pixel on the Y direction; Behind rotation 270 degree, the motion vector of the fraction pixel on the directions X is Mv_dy, the motion vector 8-Mv_dx of the fraction pixel on the Y direction.
After the motion vector conversion is intact, can carry out the interpolation of fraction pixel according to new motion vector.
Second buffer area is the data buffer area of two 96x72bits, and as shown in Figure 9, wherein deposit address 0～71 is the data of Y component, and what deposited address 72～83 is the data of U component, and what deposited address 84～95 is the data of V component.A unit (unit) of depositing the Y component is the data block of the required 9x9 of 4x4 piece interpolation, and a unit (unit) of depositing the UV component is the data block of the required 3x3 of 2x2 piece interpolation.
As one embodiment of the present of invention, when depositing the reference data of UV component, because close two the 2x2 pieces of index are a public buffer area (data buffer area of address 72～74 that for example the 2x2 piece of index=0 and index=1 is public) can have problems at two kinds of piece partition modes as shown in figure 10 like this.Therefore opened up the buffer area (buffer) of two 3x3 in inside modules, the buffer of first 3x3 is used for depositing the reference data of the required 3x3 of the top 2x2 piece A of Figure 10, the buffer of second 3x3 is used for depositing the reference data of the required 3x3 of the following 2x2 piece B of Figure 10, after waiting all data all to read then to finish, write together again in the second outside buffer area.
In sum, no matter current block is 16 * 16, and any partition mode in 16 * 8,8 * 16,8 * 8,8 * 4,4 * 8 and 4 * 4 does not need to split into the piece of 4x4, all can once rotate.Simultaneously and since when rotation multiplexing buffer area, therefore saved chip area, reduced hardware cost.
The embodiment of the invention adopts the design of pipeline system, and all modules all are concurrent execution, and it is about about 25% to make that the performance of inter prediction has improved, and the DMA bandwidth availability ratio reaches more than 90%; Support the image spinfunction simultaneously, reduced requirement, adopt reusable buffer area, save chip area, saved the cost of realizing on the hardware picture size.
The above only is preferred embodiment of the present invention, not in order to restriction the present invention, all any modifications of being done within the spirit and principles in the present invention, is equal to and replaces and improvement etc., all should be included within protection scope of the present invention.
Claims (13)
1. an inter-frame prediction system is characterized in that, described system comprises:
Pretreatment module, be used to receive the motion vector parameter and the anglec of rotation parameter of current block, determine the needed DMA parameter of direct memory access (DMA) dma operation according to described motion vector parameter and anglec of rotation parameter,, and send the first data useful signal described DMA parameter output;
First buffer area is used to receive and store the described DMA parameter that described pretreatment module is exported;
The dma operation module is used for obtaining described DMA parameter from described first buffer area behind the first data useful signal that receives the pretreatment module transmission, carries out exporting the reference data of reference block behind the dma operation, and sends the second data useful signal;
Second buffer area is used to receive and store the reference data of the reference block of described dma operation module output;
The reference data read module is used for behind the second data useful signal that receives the transmission of dma operation module, reads the reference data and the output of described reference block from second buffer area;
Interpolating module is used to receive the reference data of the reference block of described reference data read module output, carries out interpolation arithmetic.
2. inter-frame prediction system as claimed in claim 1 is characterized in that, described system further comprises:
Memory module is connected with the dma operation module by the DMA port, is used to store the reference data of reference block.
3. inter-frame prediction system as claimed in claim 2 is characterized in that, described dma operation is specially:
From memory module, obtain the reference data of reference block according to described DMA parameter.
4. inter-frame prediction system as claimed in claim 1 is characterized in that, described system further comprises:
Adjusting module is connected with second buffer area with the dma operation module, and whether described DMA parameter comprises image out-of-bounds parameter, and adjusting module is used for when the image out-of-bounds reference data of reference block being carried out the out-of-bounds adjustment.
5. inter-frame prediction system as claimed in claim 1 is characterized in that, described DMA parameter comprises the request block type parameter, and the described request block type comprises: 16 * 16,16 * 8,8 * 16,8 * 8,8 * 4,4 * 8 and 4 * 4.
6. system as claimed in claim 5 is characterized in that, when the size of the current block that reads was 4 * 4, then described interpolating module carried out computing according to described current block in the described interpolation arithmetic; When the size of the current block that reads is 16 * 16 or 16 * 8 or 8 * 16 or 8 * 8 or 8 * 4 or 4 * 8, described current block is divided into a plurality of 4 * 4 sub-piece, then described interpolating module carries out computing according to the sub-piece of 4 * 4 after dividing.
7. the system as claimed in claim 1, it is characterized in that described DMA parameter further comprises: whether be last DMA request, whether need repeatedly the DMA request, whether the macro block periphery needs expands, step-length is crossed in piece position, YUV pattern, DMA address, the out-of-bounds of directions X, the out-of-bounds of Y direction, reservation, DMA data counts, DMA.
8. mobile multimedia processor that the inter-frame prediction system that adopts claim 1 is realized.
9. an inter-frame prediction method is characterized in that, described method comprises the steps:
Pretreatment module is determined the needed DMA parameter of direct memory access (DMA) dma operation according to the motion vector parameter and the anglec of rotation parameter of current block, described DMA parameter is stored in first buffer area, and sends the first data useful signal;
The dma operation module receives the described first data useful signal, obtains the DMA parameter from described first buffer area, and the reference data of carrying out output reference block behind the dma operation according to described DMA parameter is stored in second buffer area, and sends the second data useful signal;
Interpolating module receives the described second data useful signal, obtains the reference data of reference block from described second buffer area, carries out interpolation arithmetic.
10. method as claimed in claim 9 is characterized in that, described dma operation is specially:
From memory module, obtain the reference data of reference block according to described DMA parameter.
11. method as claimed in claim 9 is characterized in that, whether described DMA parameter comprises image out-of-bounds parameter, when the image out-of-bounds, the reference data of reference block is carried out the out-of-bounds adjustment.
12. method as claimed in claim 9 is characterized in that, described method further comprises:
Pretreatment module is determined the postrotational position of image according to anglec of rotation parameter, and by the dma operation module with postrotational image storage in second buffer area.
13. method as claimed in claim 9 is characterized in that, when the size of the current block that reads was 4 * 4, then described interpolating module carried out computing according to described current block in the described interpolation arithmetic; When the size of the current block that reads is 16 * 16 or 16 * 8 or 8 * 16 or 8 * 8 or 8 * 4 or 4 * 8, described current block is divided into a plurality of 4 * 4 sub-piece, then described interpolating module carries out computing according to the sub-piece of 4 * 4 after dividing.
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| CN1620817A (en) * | 2001-07-06 | 2005-05-25 | 皇家菲利浦电子有限公司 | Motion Estimation and Compensation Using Controlled Vector Statistics |
| CN1741618A (en) * | 2004-09-03 | 2006-03-01 | 北京航空航天大学 | A Fast Subpixel Motion Estimation Method |
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| CN1557099A (en) * | 2002-07-15 | 2004-12-22 | ������������ʽ���� | Image encoding device, image encoding method, image decoding device, image decoding method, and communication device |
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Address after: 3 / F, C1 area, innovation building, 182 science Avenue, Science City, Guangzhou, Guangdong 510600 Patentee after: Guangzhou Ankai Microelectronics Co.,Ltd. Address before: 3 / F, C1 area, innovation building, 182 science Avenue, Science City, Guangzhou, Guangdong 510600 Patentee before: ANYKA (GUANGZHOU) MICROELECTRONICS TECHNOLOGY Co.,Ltd. |
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Address after: 510555 No. 107 Bowen Road, Huangpu District, Guangzhou, Guangdong Patentee after: Guangzhou Ankai Microelectronics Co.,Ltd. Address before: 3 / F, C1 area, innovation building, 182 science Avenue, Science City, Guangzhou, Guangdong 510600 Patentee before: Guangzhou Ankai Microelectronics Co.,Ltd. |