CN101303616B - Computer, power supply system applied to computer and power supply method of power supply system - Google Patents
Computer, power supply system applied to computer and power supply method of power supply system Download PDFInfo
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Abstract
Description
技术领域technical field
本发明涉及一种计算机的电源供应器系统,尤其涉及一种应用于计算机的并联双组电源供应器的电源供应器系统及其电源供应方法。The invention relates to a power supply system of a computer, in particular to a power supply system and a power supply method applied to a parallel dual-group power supply for a computer.
背景技术Background technique
为了提供计算机内部电路组件所需的工作电源,计算机内的主机板都会连接至电源供应器(Power Supply),而电源供应器可以将交流电转换为直流电后提供至计算机的主机板及其外围装置。请参照图1,其所示为已知电源供应器系统对计算机主机板(Motherboard)供电示意图。该系统主要包括:In order to provide the working power required by the computer's internal circuit components, the motherboard in the computer is connected to a power supply (Power Supply), and the power supply can convert AC power into DC and provide it to the computer's motherboard and its peripheral devices. Please refer to FIG. 1 , which shows a schematic diagram of a known power supply system supplying power to a computer motherboard (Motherboard). The system mainly includes:
一电源供应器80与一主机板90。如图1所示,电源供应器80具有一组引脚,该组引脚包含一24引脚(24pin)、一4引脚(4pin)、一显卡引脚(VGA pin)、与一硬盘引脚(HD pin)。而上述的引脚通过传输线个别连接至一24引脚插头(24pin plug)82、一4引脚插头(4pin plug)84、一显卡插头(VGA plug)86、与一硬盘插头(HD plug)88。而主机板90上也有相对应的24引脚插座(24pinjack)92、一4引脚插座(4pin jack)94、一显卡插座(VGA jack)96、与一硬盘插座(HD jack)98。A
因此,电源供应器80的插头与主机板90的插座彼此连接时,电源供应器80即可提供+3V、+5V、+5VSB(+5V Stand-By-Power)、+12V等不同电平的电压至主机板90,进而达成电源供应器80对主机板90上不同组件所需不同电平电压的供电。其中,+5VSB是属于待命电源,也就是说,当计算机处于关机时,电源供应器80可提供+5VSB的直流电压至主机板90。Therefore, when the plug of the
一般使用者在计算机系统关机后,并不会关闭电源供应器的交流开关,因此电源供应器仍会持续不断的提供主机板待命电源,如+5VSB。长期下来,由于电源供应器中待命电源的电路以及其它电路的使用时间不同,会造成电源供应器中待命电源的相关电路会比较容易损坏。也就是说,当电源供应器中的其它电路还可以使用时,待命电源的电路已经损毁。因此,使用者必须更换新的电源供应器。Generally, users will not turn off the AC switch of the power supply after the computer system is shut down, so the power supply will continue to provide standby power for the motherboard, such as +5VSB. In the long run, due to the different use time of the standby power circuit and other circuits in the power supply, the related circuits of the standby power in the power supply will be easily damaged. That is to say, when other circuits in the power supply can still be used, the circuit of the standby power supply has been damaged. Therefore, the user must replace the power supply with a new one.
发明内容Contents of the invention
本发明提出一种电源供应器系统的电源供应方法,应用于一第一电源供应器与一第二电源供应器提供一第一电压至一主机板,包含下列步骤:检测第一电源供应器的第一电压以及第二电源供应器的第一电压是否到达一稳态;当第一电源供应器的第一电压到达稳态时,将第一电源供应器的第一电压连接至一第一引脚;当第二电源供应器的第一电压到达稳态时,将第二电源供应器的第一电压连接至第一引脚;以及,利用第一引脚提供第一电压至该主机板。The present invention proposes a power supply method for a power supply system, which is applied to a first power supply and a second power supply to provide a first voltage to a motherboard, including the following steps: detecting the first power supply Whether the first voltage of the first power supply and the first voltage of the second power supply reach a steady state; when the first voltage of the first power supply reaches a steady state, connect the first voltage of the first power supply to a first lead pin; when the first voltage of the second power supply reaches a steady state, connect the first voltage of the second power supply to the first pin; and use the first pin to provide the first voltage to the motherboard.
再者,本发明提出一种并联式电源供应器系统,包含:一第一电源供应器,具有一第一电压输出端;一第二电源供应器,具有一第二电压输出端;一第一开关电路的一输入端连接至该第一电压输出端;一第二开关电路的一输入端连接至该第二电压输出端;一第一时序控制电路,具有一第一端接收第一电源供应器输出的一电源完好信号,一第二端连接至第一开关电路的一第一致能端;一第二时序控制电路,具有一第三端接收第二电源供应器所输出的一电源完好信号,一第四端连接至第二开关电路的一第二致能端;以及,一插头,具有一第一引脚同时连接至第一开关电路的一输出端以及第二开关电路的一输出端;其中,第一电压输出端与第二电压输出端输出相同的电压;其中,上述第一时序控制电路根据上述第一电源供应器输出的上述电源完好信号输出第一致能信号致能上述第一开关电路,上述第一开关电路接收上述第一电压输出端输出的电压并将上述电压输出至上述第一引脚;其中,上述第二时序控制电路根据上述第二电源供应器输出的上述电源完好信号输出第二致能信号致能上述第二开关电路,上述第二开关电路接收上述第二电压输出端输出的电压并将上述电压输出至上述第一引脚。Moreover, the present invention proposes a parallel power supply system, comprising: a first power supply with a first voltage output terminal; a second power supply with a second voltage output terminal; a first An input end of the switch circuit is connected to the first voltage output end; an input end of a second switch circuit is connected to the second voltage output end; a first timing control circuit has a first end receiving the first power supply A power good signal output by the device, a second terminal is connected to a first enabling terminal of the first switch circuit; a second timing control circuit has a third terminal receiving a power good signal output by the second power supply signal, a fourth end connected to a second enabling end of the second switch circuit; and, a plug having a first pin connected to an output end of the first switch circuit and an output of the second switch circuit at the same time terminal; wherein, the first voltage output terminal and the second voltage output terminal output the same voltage; wherein, the above-mentioned first timing control circuit outputs a first enable signal according to the above-mentioned power good signal output by the above-mentioned first power supply to enable the above-mentioned The first switch circuit, the first switch circuit receives the voltage output by the first voltage output terminal and outputs the voltage to the first pin; wherein, the second timing control circuit is based on the output of the second power supply The power good signal outputs a second enable signal to enable the second switch circuit, and the second switch circuit receives the voltage output from the second voltage output terminal and outputs the voltage to the first pin.
本发明还提出一种具有并联式电源供应器系统的计算机,包含:一第一电源供应器,具有一第一电压输出端;一第二电源供应器,具有一第二电压输出端;其中,第一电压输出端与第二电压输出端输出相同的一电压;一第一开关电路的一输入端连接至第一电压输出端;一第二开关电路的一输入端连接至第二电压输出端;一第三开关电路的一输入端接收第一电源供应器所输出的一电源完好信号;一第四开关电路的一输入端接收第二电源供应器所输出的一电源完好信号;一第一时序控制电路,具有一第一端接收该第一电源供应器输出的该电源完好信号,一第二端连接至第一开关电路的一致能端以及第三开关电路的一致能端;一第二时序控制电路,具有一第三端接收第二电源供应器所输出的该电源完好信号,一第四端连接至该第二开关电路的一致能端以及该第四开关电路的一致能端;一插头,具有一第一引脚同时连接至第一开关电路的一输出端以及第二开关电路的一输出端;一逻辑门,具有两个输入端连接至第三开关电路的一输出端以及第四开关电路的一输出端,并具有一输出端连接至插头的一第二引脚;以及,一主机板,具有一插座用以与插头结合,可经由第一引脚接收电压以及经由第二引脚接收一电源供应器电源完好信号;其中,上述第一时序控制电路根据上述第一电源供应器输出的上述电源完好信号输出第一致能信号致能上述第一开关电路及上述第三开关电路,上述第一开关电路接收上述第一电压输出端输出的电压并将上述电压输出至上述第一引脚,上述第三开关电路将上述第一电源供应器所输出的电源完好信号输出至上述逻辑门的上述两个输入端中的一个;其中,上述第二时序控制电路根据上述第二电源供应器输出的上述电源完好信号输出第二致能信号致能上述第二开关电路及上述第四开关电路,上述第二开关电路接收上述第二电压输出端输出的电压并将上述电压输出至上述第一引脚,上述第四开关电路将上述第二电源供应器所输出的电源完好信号输出至上述逻辑门的上述两个输入端中的另一个;其中,上述逻辑门输出上述电源完好信号至上述第二引脚。The present invention also proposes a computer with a parallel power supply system, including: a first power supply with a first voltage output terminal; a second power supply with a second voltage output terminal; wherein, The first voltage output end and the second voltage output end output the same voltage; an input end of a first switch circuit is connected to the first voltage output end; an input end of a second switch circuit is connected to the second voltage output end ; An input end of a third switch circuit receives a power good signal output by the first power supply; an input end of a fourth switch circuit receives a power good signal output by the second power supply; The timing control circuit has a first end for receiving the power good signal output by the first power supply, a second end connected to an enable end of the first switch circuit and an enable end of the third switch circuit; a second The timing control circuit has a third end for receiving the power good signal output by the second power supply, a fourth end connected to an enable end of the second switch circuit and an enable end of the fourth switch circuit; A plug with a first pin connected to an output end of the first switch circuit and an output end of the second switch circuit at the same time; a logic gate with two input ends connected to an output end of the third switch circuit and an output end of the second switch circuit An output end of the four-switch circuit, and has an output end connected to a second pin of the plug; The pin receives a power good signal of a power supply; wherein, the first timing control circuit outputs a first enable signal to enable the first switch circuit and the third switch according to the power good signal output by the first power supply circuit, the above-mentioned first switch circuit receives the voltage output from the above-mentioned first voltage output terminal and outputs the above-mentioned voltage to the above-mentioned first pin, and the above-mentioned third switch circuit outputs the power good signal output by the above-mentioned first power supply to the above-mentioned One of the two input terminals of the logic gate; wherein, the second timing control circuit outputs a second enabling signal to enable the second switching circuit and the fourth switching circuit according to the power good signal output by the second power supply. A switch circuit, the second switch circuit receives the voltage output from the second voltage output terminal and outputs the voltage to the first pin, and the fourth switch circuit outputs the power good signal output by the second power supply to The other of the two input terminals of the logic gate; wherein, the logic gate outputs the power good signal to the second pin.
通过本发明并联双组电源供应器系统内的具时序控制功能的电源转接板,只要两组电源供应器中的其中一组能正常启动并建立主机板所需电压,该组电源供应器即可对主机板供电。Through the power adapter board with timing control function in the parallel dual-group power supply system of the present invention, as long as one of the two groups of power supplies can start normally and establish the voltage required by the motherboard, the group of power supplies will be Can supply power to the motherboard.
附图说明Description of drawings
图1所示为已知电源供应器系统对计算机主机板供电示意图。FIG. 1 is a schematic diagram of a known power supply system supplying power to a computer motherboard.
图2所示为本发明的并联双组电源供应器系统应用于主机板的示意图。FIG. 2 is a schematic diagram of the application of the parallel dual power supply system of the present invention to a motherboard.
图3所示为本发明的并联双组电源供应器系统内的电源转接板方框示意图。FIG. 3 is a schematic block diagram of a power adapter board in the parallel dual power supply system of the present invention.
图4所示为本发明开关电路示意图。Fig. 4 is a schematic diagram of the switching circuit of the present invention.
图5所示为本发明开关电路的实际电路图。Fig. 5 is an actual circuit diagram of the switching circuit of the present invention.
图6所示为本发明时序控制电路示意图。FIG. 6 is a schematic diagram of the timing control circuit of the present invention.
图7所示为本发明的具时序控制功能的电源供应器工作时序示意图。FIG. 7 is a schematic diagram of the working sequence of the power supply with timing control function according to the present invention.
具体实施方式Detailed ways
请参照图2,其所示为本发明的并联双组电源供应器系统应用于主机板的示意图。此电源供应器系统主要包括:一电源供应器A、一电源供应器B及一电源转接板140(Power Translate Board),此电源供应器系统并与一主机板142连接。如图所示,电源供应器A具有其自身一组引脚(24引脚A、4引脚A、VGA引脚A、HD引脚A);电源供应器B也具有其自身一组引脚(24引脚B、4引脚B、VGA引脚B、HD引脚B)。Please refer to FIG. 2 , which is a schematic diagram of the application of the parallel dual power supply system of the present invention to a motherboard. The power supply system mainly includes: a power supply A, a power supply B and a power adapter board 140 (Power Translate Board), and the power supply system is connected with a main board 142 . As shown, power supply A has its own set of pins (24 pin A, 4 pin A, VGA pin A, HD pin A); power supply B also has its own set of pins (24 Pin B, 4 Pin B, VGA Pin B, HD Pin B).
再者,电源供应器A的一组引脚连接至一第一开关组(first switchset)158而电源供应器B的一组引脚连接至一第二开关组(second switchset)168,再者,第一开关组158与第二开关组168相互连接达成并联电源供应器A与电源供应器B的输出电压。再者并联后的24引脚、4引脚、VGA引脚与HD引脚分别连接至24引脚插头82、一4引脚插头84、一VGA插头86与一HD插头88。而主机板142上也有相对应连接的24引脚插座92、一4引脚插座94、一显卡插座96与一硬盘插座98。Furthermore, a set of pins of the power supply A is connected to a first switchset 158 and a set of pins of the power supply B is connected to a second switchset 168. Furthermore, The first switch group 158 and the second switch group 168 are connected to each other to achieve the output voltage of the power supply A and the power supply B in parallel. Furthermore, the 24-pin, 4-pin, VGA pin and HD pin connected in parallel are respectively connected to a 24-
首先,在主机板142尚未启动状态下,电源供应器A、B在待命状态(Stand-By),此时电源供应器A、B仅会提供主机板基本待命电源,如+5VSB。当主机板的开关压下后电源供应器A、B随即启动,此时电源供应器A、B将建立主机板142所需不同电平的电压(+3V、+5V、+12V)。电源供应器A所产生的不同电平电压将先由其自身的一组引脚输出。同理,电源供应器B所产生的不同电平电压将先由其自身的一引脚输出。Firstly, when the motherboard 142 is not started, the power supplies A and B are in the standby state (Stand-By). At this time, the power supplies A and B only provide the basic standby power of the motherboard, such as +5VSB. When the switch of the motherboard is pressed down, the power supplies A and B start up immediately. At this time, the power supplies A and B will establish voltages of different levels (+3V, +5V, +12V) required by the motherboard 142 . The voltages of different levels generated by the power supply A will first be output by its own set of pins. Similarly, voltages of different levels generated by the power supply B will first be output from one of its own pins.
根据本发明的实施例,当电源供应器A或者电源供应器B其中之一所产生的不同电平电压到达稳态时,第一开关组158或者第二开关组168即可动作并将不同电平电压经由电源转接板140传送至主机板142。再者,由于电源供应器A、B是采用并联方式,当电源供应器A、B其中只要有一组电压到达稳态后,主机板142即可接收电源转接板140的输出电压,进而完成电源供应器A或B对主机板142的供电。According to the embodiment of the present invention, when the voltages of different levels generated by one of the power supply A or the power supply B reach a steady state, the first switch group 158 or the second switch group 168 can act and switch the different voltage levels to a steady state. The flat voltage is transmitted to the motherboard 142 through the
请参照图3,其所示为本发明的电源转接板详细的方框图。由图可知,电源转接板140的24引脚C、4引脚C、VGA引脚C、HD引脚C可对应连接至电源供应器A的24引脚A、4引脚A、VGA引脚A、HD引脚A;以及电源转接板140的24引脚D、4引脚D、VGA引脚D、HD引脚D可对应连接至电源供应器B的24引脚B、4引脚B、VGA引脚B、HD引脚B。再者,第一开关组包括七个开关电路SW-A1、SW-A2、SW-A3、SW-A4、SW-A5、SW-A6、SW-A7,而第二开关组包括七个开关电路SW-B1、SW-B2、SW-B3、SW-B4、SW-B5、SW-B6、SW-B7。Please refer to FIG. 3 , which shows a detailed block diagram of the power adapter board of the present invention. It can be seen from the figure that the 24-pin C, 4-pin C, VGA pin C, and HD pin C of the
其中,24引脚C中的+3V输出端经由开关电路A1(SW-A1)连接至24引脚插头82,+5V输出端经由开关电路A2(SW-A2)连接至24引脚插头82,+12V输出端经由开关电路A3(SW-A3)连接至24引脚插头82;4引脚C中的+12V输出端经由开关电路A5(SW-A5)连接至4引脚插头84;VGA引脚C中的+12V输出端经由开关电路A6(SW-A6)连接至VGA引脚插头86;以及HD引脚C中的+12V输出端经由开关电路A7(SW-A7)连接至HD引脚插头88。Wherein, the +3V output terminal of the 24-pin C is connected to the 24-
同理,24引脚D中的+3V输出端经由开关电路B1(SW-B1)连接至24引脚插头82,+5V输出端经由开关电路B2(SW-B2)连接至24引脚插头82,+12V输出端经由开关电路B3(SW-B3)连接至24引脚插头82;4引脚D中的+12V输出端经由开关电路B5(SW-B5)连接至4引脚插头84;VGA引脚D中的+12V输出端经由开关电路B6(SW-B6)连接至VGA引脚插头86;以及HD引脚D中的+12V输出端经由开关电路B7(SW-B7)连接至HD引脚插头88。再者,而为了在待命状态时提供+5VSB至主机板,24引脚C中的+5VSB输出端经一第一二极管D1连接至24引脚插头82;而24引脚D中的+5VSB输出端经一第二二极管D2连接至24引脚插头82。Similarly, the +3V output terminal of the 24-pin D is connected to the 24-
再者,当使用者按下计算机的电源按钮时,主机板可产生启动信号PSON(power switch on signal),经由图2主机板的24引脚插座92传递至电源转接板140的24引脚插头82。电源转接板140再通过24引脚C与24引脚D将启动信号PSON分别传递至电源供应器A的24引脚A以及电源供应器B的24引脚B,使得电源供应器A以及电源供应器B可根据启动信号PSON来启动。Moreover, when the user presses the power button of the computer, the motherboard can generate a power switch on signal PSON (power switch on signal), which is transmitted to the 24-
当电源供应器A以及电源供应器B启动完成,代表电源供应器A以及电源供应器B所有的输出电压已经到达稳态。此时,电源供应器A以及电源供应器B会分别输出一电源完好信号PG(power good signal)。也就是说,电源供应器A到达稳态时会输出电源A完好信号PG-A,电源供应器B到达稳态时会输出电源B完好信号PG-B,用以通知主机板电源供应器A以及电源供应器B所有的输出电压已经到达稳态。When power supply A and power supply B start up, it means that all output voltages of power supply A and power supply B have reached a steady state. At this time, the power supply A and the power supply B respectively output a power good signal PG (power good signal). That is to say, when the power supply A reaches the steady state, it will output the power supply A good signal PG-A, and when the power supply B reaches the steady state, it will output the power supply B good signal PG-B, which is used to notify the mainboard power supply A and All output voltages of power supply B have reached steady state.
根据本发明的实施例,电源A完好信号PG-A与电源B完好信号PG-B会连接至一或门(OR gate)162的输入端,而或门162的输出端连接至24引脚插头82中的一个引脚。也就是说,当任一个电源供应器到达稳态时,或门162的输出端即可产生电源完好信号PG并传递至主机板。因此,主机板即可以根据电源完好信号PG来得知电源供应器系统(包括电源供应器A以及电源供应器B)的电压已经到达稳态。当然本发明也可以将或门162改成与门(ANDgate),因此必须所有的电源供应器皆到达稳态时,与门的输出端即可产生电源完好信号PG并传递至主机板。According to an embodiment of the present invention, the power supply A good signal PG-A and the power supply B good signal PG-B are connected to an input terminal of an OR gate (OR gate) 162, and the output terminal of the
根据本发明的实施例,于电源转接板140上还提供一时序控制电路(timing control circuit),使得电源转接板140上的开关电路可以根据时序控制电路的动作来运作。举例来说,电源转接板140上包括一第一时序控制电路810与一第二时序控制电路820。其中,第一时序控制电路810接收电源供应器A的电源完好信号PG-A,并且输出第一致能信En-A号至第一开关细SW-A1、SW-A2、SW-A3、SW-A4、SW-A5、SW-A6、SW-A7;同理,第二时序控制电路820接收电源供应器B的电源完好信号PG-B,并且输出第二致能信号En-B至第二开关组SW-B1、SW-B2、SW-B3、SW-B4、SW-B5、SW-B6、SW-B7。According to an embodiment of the present invention, a timing control circuit is also provided on the
当使用者按下计算机的电源按钮时,主机板并产生启动信号PSON后电源供应器A与B开始建立电压时,所有的开关电路尚未收到第一致能信号En-A或者第二致能信号En-B,因此所有的开关电路无法动作。When the user presses the power button of the computer, the motherboard generates the start signal PSON, and after the power supply A and B start to build up the voltage, all the switch circuits have not received the first enable signal En-A or the second enable signal Signal En-B, so all switching circuits cannot operate.
直到电源供应器A的电源完好信号PG-A产生时,第一时序控制电路810输出第一致能信En-A号时,第一开关组中所有的开关电路才可被致能(enable)而动作。同理,必须等到电源供应器B的电源完好信号PG-B产生时,第二时序控制电路820输出第二致能信En-B号时,第二开关组中所有的开关电路才可被致能而动作。Until the power good signal PG-A of the power supply A is generated, the first
当所有的开关电路被致能之后,开关电路中的检测电路才可继续检测开关的输入端Si电压大于输出端So电压,并达成所有开关电路的连接;以及,主机板即接收电源转接板的输出电压。After all the switch circuits are enabled, the detection circuit in the switch circuit can continue to detect that the voltage of the input terminal Si of the switch is greater than the voltage of the output terminal So, and achieve the connection of all switch circuits; and, the motherboard is the receiving power adapter board output voltage.
再者,请参照图4,其所示为本发明开关电路示意图。根据本发明的实施例,所有的开关电路构造都相同。该开关电路包括:一开关200以及一检测电路210。其中,开关200的一输入端Si与一输出端So可经由检测电路210输出的控制信号C来达成输入端Si与输出端So连接与不连接。而检测电路有二检测端(D1、D2)分别连接至开关200的输入端Si与输出端So,而检测电路210还包括一致能端用以接收第一致能信号或者第二致能信号。于检测电路210接收到第一致能信号或者第二致能信号即可被致能而开始动作。因此,当第一检测端D1的电压大于第二检测端D2的电压时,则控制信号C控制开关达成连接;反之,当第一检测端D1的电压不大于第二检测端D2的电压时,则控制信号C控制开关达成不连接。再者,开关的输入端Si都连接至电源供应器A侧或电源供应器B侧(power supply side)的相对应引脚,而开关的输出端So都连接至插头侧(plug side)的相对应引脚。Furthermore, please refer to FIG. 4 , which is a schematic diagram of the switching circuit of the present invention. According to the embodiment of the present invention, all switch circuit configurations are the same. The switch circuit includes: a
请参照图5,其所示为本发明开关电路的实际电路图。其中开关200包括两个晶体管(MOSFET)背对背的连接组态,也即两个晶体管的基体(Body)相连,如此,通过晶体管内部本身所产生的二极管(Body Diode),可以双方面挡住由电源供应器A或B漏电给主机板或是由主机板端漏电给电源供应器A或B,确保当正常工作时,电源的流向是一致输出给主机板端,并不会因为当某组电源供应器关闭时,还有路径让多余电流入电源供应器。再者,为了保证检测电路210可顺利控制开关,该控制信号为+24V。而为了要达到+24V,检测电路210中还包括一升压电路(voltage booster)可将+5V待机电源(+5VSB)提升至+24V(+24VSB),使得检测电路210可选择性地将+24V输出至开关200。再者,由于升压电路已经应用于已知许多的控制电路,因此,本发明不再详加描述。再者,时序控制电路输出的第一致能信号En-A或者第二致能信号En-B可以致能开关电路中的检测电路,或者检测电路中的电压提升器。Please refer to FIG. 5 , which shows the actual circuit diagram of the switching circuit of the present invention. The
为了具体说明电源转接板内开关的工作原理,将以电源供应器所提供的+5V电压,经由开关电路的控制,最终传送至主机板端来做说明。于开关电路被致能而开始动作时,由图5可知电源供应器侧可提供的+5V电压至开关200的输入端Si,而开关200的输出端So连接至24引脚插头82侧。In order to specifically explain the working principle of the switch in the power adapter board, the +5V voltage provided by the power supply is controlled by the switch circuit and finally transmitted to the motherboard for illustration. When the switch circuit is enabled and starts to operate, it can be seen from FIG. 5 that the +5V voltage that the power supply side can provide is to the input terminal Si of the
由于检测电路的二检测端D1、D2分别连接至开关200的输入端Si与输出端So。当第一检测端D1的电压大于第二检测端D2的电压时,则控制信号C为+24V并控制开关200达成连接使得+5V电压可由电源供应器侧输出至24引脚插座82侧;反之,当第一检测端D1的电压不大于第二检测端D2的电压时,则控制信号C不为+24V并控制开关200达成不连接使得+5V电压无法由电源供应器侧输出至24引脚插头82侧。Since the two detection terminals D1 and D2 of the detection circuit are respectively connected to the input terminal Si and the output terminal So of the
请参照图6,其所示为本发明第一时序控制电路示意图。第一时序控制电路主要包括:一BJT开关970;其中BJT开关970的基极(base)经由一电阻R1连接至电源供应器A所输出的电源A完好信号PG-A;BJT开关970的集极(collector)连接至电源供应器A所输出的+5VSB;BJT开关970的射极(emitter)经由一电阻R2接地,且射极可输出第一致能信号En-A连接所有开关电路的致能端(En),例如开关电路(SW-A4)的致能端。Please refer to FIG. 6 , which is a schematic diagram of the first timing control circuit of the present invention. The first timing control circuit mainly includes: a BJT switch 970; wherein the base (base) of the BJT switch 970 is connected to the power supply A good signal PG-A output by the power supply A through a resistor R1; the collector of the BJT switch 970 (collector) is connected to the +5VSB output by the power supply A; the emitter of the BJT switch 970 is grounded through a resistor R2, and the emitter can output the first enabling signal En-A to connect the enabling of all switching circuits terminal (En), such as the enable terminal of the switch circuit (SW-A4).
以图6为例,当电源供应器A所输出的电源A完好信号PG-A为高电平时,BJT开关970开启(turn on),第一致能信号En-A输出高电平,因此,开关电路(SW-A4)可正常动作并使得开关电路(SW-A4)输出端输出完好信号PG-A。同理,所有的开关电路皆有相同的动作原理。再者,本发明并不限定时序控制电路的电路结构,在此领域的技术人员也可以利用一缓冲器(buffer circuit)来取代图6的时序控制电路。Taking FIG. 6 as an example, when the power supply A good signal PG-A output by the power supply A is at a high level, the BJT switch 970 is turned on (turn on), and the first enabling signal En-A outputs a high level. Therefore, The switch circuit (SW-A4) can operate normally and make the output terminal of the switch circuit (SW-A4) output the intact signal PG-A. Similarly, all switching circuits have the same operating principle. Furthermore, the present invention does not limit the circuit structure of the timing control circuit, and those skilled in the art can also use a buffer circuit to replace the timing control circuit of FIG. 6 .
也就是说,当使用者按下计算机的电源按钮时,主机板产生启动信号PSON使得电源供应器A以及电源供应器B启动。于电源供应器A以及电源供应器B的启动过程,所有的电压输出端(+3V、+5V、+12V)的电压开始上升。再者,而于电压上升的过程,所有开关电路都尚未接收到第一致能信号或者第二致能信号,因此,所有的开关电路皆无法动作。当电源供应器A所有的电压输出端(+3V、+5V、+12V)已经到达稳态并输出电源A完好信号PG-A时,第一开关电路组SW-A1、SW-A2、SW-A3、SW-A4、SW-A5、SW-A6、SW-A7被致能而动作;同理,当电源供应器B所有的电压输出端(+3V、+5V、+12V)已经到达稳态并输出电源B完好信号PG-B时,第二开关组SW-B1、SW-B2、SW-B3、SW-B4、SW-B5、SW-B6、SW-B7被致能而动作。That is to say, when the user presses the power button of the computer, the motherboard generates the activation signal PSON to activate the power supply A and the power supply B. During the start-up process of the power supply A and the power supply B, the voltages of all voltage output terminals (+3V, +5V, +12V) start to rise. Furthermore, during the voltage rising process, all the switch circuits have not received the first enable signal or the second enable signal, therefore, all the switch circuits cannot operate. When all voltage output terminals (+3V, +5V, +12V) of the power supply A have reached a steady state and output the power supply A good signal PG-A, the first switch circuit group SW-A1, SW-A2, SW- A3, SW-A4, SW-A5, SW-A6, and SW-A7 are enabled to operate; similarly, when all voltage output terminals (+3V, +5V, +12V) of power supply B have reached a steady state And when the power supply B good signal PG-B is output, the second switch group SW-B1, SW-B2, SW-B3, SW-B4, SW-B5, SW-B6, SW-B7 are enabled and act.
再者,假设电源供应器系统中电源供应器A的+5V输出端故障而无法正常输出+5V,例如仅能输出1.5V。很明显地,电源供应器A侧的电压(1.5V)小于24引脚插头82侧(5V),此时,开关电路SW-A1达成不连接并使得电源供应器A侧无法供给电压至主机板。而此时仅有电源供应器B的+5V输出端可经由开关电路SW-B1输出电压至主机板。同理,其它的电压端也是利用相同的原理来运作,因此不再详述。Furthermore, assume that the +5V output terminal of the power supply A in the power supply system fails to output +5V normally, for example, it can only output 1.5V. Obviously, the voltage on side A of the power supply (1.5V) is lower than that on the 82 side of the 24-pin plug (5V). At this time, the switch circuit SW-A1 is disconnected and makes the side A of the power supply unable to supply voltage to the motherboard. . At this time, only the +5V output terminal of the power supply B can output the voltage to the motherboard through the switch circuit SW-B1. Similarly, other voltage terminals also use the same principle to operate, so no more details are given here.
请参照图7,其所示为本发明的具时序控制功能的电源供应器工作时序示意图(以电源供应器A)。使用者尚未按下计算机的电源按钮时,电源供应器维持在待命状态,如步骤952。此时,电源供应器提供主机板+5VSB,而检测电路中的升压电路将+5VSB升至+24V,如步骤954,此时,开关电路尚未致能而无法动作。Please refer to FIG. 7 , which is a schematic diagram of the working sequence of the power supply with timing control function of the present invention (power supply A). When the user has not pressed the power button of the computer, the power supply remains in the standby state, as in step 952 . At this time, the power supply provides +5VSB to the main board, and the boost circuit in the detection circuit raises +5VSB to +24V, as in step 954. At this time, the switch circuit is not yet enabled and cannot operate.
当使用者尚未按下计算机的电源按钮时,主机板并未产生启动信号PSON,如步骤956,因此,回到步骤954。反之,当使用者按下计算机的电源按钮时,主机板产生启动信号PSON,如步骤956。此时,电源供应器开始建立电压,亦即电源供应器所有的电压输出端(+3V、+5V、+12V)的电压开始上升,如步骤958。When the user has not pressed the power button of the computer, the motherboard does not generate the start signal PSON, as in step 956 , and therefore, returns to step 954 . On the contrary, when the user presses the power button of the computer, the motherboard generates the start signal PSON, as in step 956 . At this point, the power supply starts to build up voltage, that is, the voltages of all voltage output terminals (+3V, +5V, +12V) of the power supply start to rise, as in step 958 .
接着,当电源供应器已经稳定地输出电压(+3V、+5V、+12V)后,即可输出电源完好信号PG-A,如步骤960。接着,根据电源完好信号PG-A,第一时序控制电路810输出第一致能信En-A号来使得开关电路正常动作而达成开关电路的连接,如步骤962。最后,主机板可接收到电源完好信号PG,并接收电源转接板输出电压,如步骤964。Next, when the power supply has output voltages (+3V, +5V, +12V) stably, it can output the power good signal PG-A, as in step 960 . Next, according to the power good signal PG-A, the first
由以上实施例可知,通过本发明并联双组电源供应器系统内的具时序控制功能的电源转接板,只要两组电源供应器中的其中一组能正常启动并建立主机板所需电压,该组电源供应器即可对主机板供电;此外,通过开关中晶体管(PQ1、PQ2)的背对背连接组态,也能保证当电源供应器对主机板供电时,电源的流向是一致输出给主机板端,而不会产生漏电流;此外,通过开关中检测电路对开关的连接或不连接的控制,即使其中一电源供应器突然损坏,仍可以输出正常的电压至主机板;此外,通过时序控制电路,将可保证主机板所接收的电压是达成稳态的+3V、+5V、+12V。As can be seen from the above embodiments, through the power adapter board with timing control function in the parallel dual-group power supply system of the present invention, as long as one of the two groups of power supplies can start normally and establish the voltage required by the motherboard, This group of power supplies can supply power to the motherboard; in addition, through the back-to-back connection configuration of the transistors (PQ1, PQ2) in the switch, it can also ensure that when the power supply supplies power to the motherboard, the power flow is consistent and output to the host board terminal without leakage current; in addition, through the detection circuit in the switch to control the connection or non-connection of the switch, even if one of the power supplies is suddenly damaged, it can still output normal voltage to the main board; in addition, through the sequence The control circuit will ensure that the voltage received by the motherboard is +3V, +5V, +12V in a steady state.
综上所述,虽然本发明已以较佳实施例揭示如上,然而其并非用以限定本发明,任何熟悉此技术的本领域普通技术人员,在不脱离本发明的精神和范围内,应当可作各种变动与润饰,因此本发明的保护范围应当视权利要求书所限定的保护范围为准。In summary, although the present invention has been disclosed as above with preferred embodiments, it is not intended to limit the present invention, any person familiar with this technology, without departing from the spirit and scope of the present invention, should be able to Various changes and modifications are made, so the scope of protection of the present invention should be based on the scope of protection defined in the claims.
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CN1295292A (en) * | 1999-11-05 | 2001-05-16 | 国际商业机器公司 | Method and system for multi-language wide world web service device thereof |
CN1314634A (en) * | 2000-03-17 | 2001-09-26 | 索尼株式会社 | File convertion method, file convertor and file display system |
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