[go: up one dir, main page]

CN101251818A - Mainboard using time statistic device and statistic method thereof - Google Patents

Mainboard using time statistic device and statistic method thereof Download PDF

Info

Publication number
CN101251818A
CN101251818A CNA2008100917570A CN200810091757A CN101251818A CN 101251818 A CN101251818 A CN 101251818A CN A2008100917570 A CNA2008100917570 A CN A2008100917570A CN 200810091757 A CN200810091757 A CN 200810091757A CN 101251818 A CN101251818 A CN 101251818A
Authority
CN
China
Prior art keywords
motherboard
power
microcontroller
state
value
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CNA2008100917570A
Other languages
Chinese (zh)
Inventor
李侑澄
林志贤
吴潮崇
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Asustek Computer Inc
Original Assignee
Asustek Computer Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Asustek Computer Inc filed Critical Asustek Computer Inc
Priority to CNA2008100917570A priority Critical patent/CN101251818A/en
Publication of CN101251818A publication Critical patent/CN101251818A/en
Pending legal-status Critical Current

Links

Images

Landscapes

  • Debugging And Monitoring (AREA)

Abstract

The invention provides a mainboard using a time statistic device and a statistic method thereof, wherein the mainboard using the time statistic device comprises: a central processing unit, a chipset and a microcontroller. The chip group is connected with the central processing unit; the microcontroller is provided with a nonvolatile memory unit and a counter for storing a first numerical value, when the microcontroller detects that the mainboard is converted from a power-off state to a power-on state, the timer starts to time until the microcontroller detects that the mainboard is converted from the power-on state to the power-off state, the timer stops timing and registers a timing record as a second numerical value, the microcontroller adds the first numerical value and the second numerical value into an updated numerical value, and the updated numerical value is restored to the nonvolatile memory unit to replace the first numerical value.

Description

使用时间统计装置的主机板及其统计方法 Motherboard Using Time Statistical Device and Its Statistical Method

技术领域 technical field

本发明涉及一种主机板及其控制方法,且特别涉及一种使用时间统计装置的主机板及其统计方法。The invention relates to a mainboard and a control method thereof, and in particular to a mainboard using a time statistics device and a statistical method thereof.

背景技术 Background technique

一般来说,主机板制造商在售出主机板之后并无法掌握使用者的使用状况。也就是说,假设使用者的主机板发生故障,主机板的维修部门无法由维修的主机板上获得任何的使用信息。因此,维修部门必须花费更多的时间来维修主机板。Generally speaking, motherboard manufacturers cannot grasp the usage status of users after selling motherboards. That is to say, assuming that the user's motherboard fails, the maintenance department of the motherboard cannot obtain any usage information from the repaired motherboard. Therefore, the repair department has to spend more time to repair the motherboard.

另外,一般使用者都是在电子市场上购买主机板或者计算机主机。如果经销商将使用过的二手主机板当成新品贩卖给使用者,或者经销商将二手主机板组装成全新的计算机主机贩卖给使用者,使用者无法得知该主机板或者该计算机主机是否为新品。In addition, general users purchase motherboards or computer hosts in electronic markets. If the dealer sells the used second-hand motherboard to the user as a new product, or the dealer assembles the second-hand motherboard into a brand-new computer host and sells it to the user, the user cannot know whether the motherboard or the computer host is a new product .

上述的情况都是由于主机板无法提供本身的使用信息。The above situations are all due to the fact that the motherboard cannot provide its own usage information.

发明内容 Contents of the invention

因此,本发明提出一种使用时间统计装置的主机板,包括:一中央处理器、一芯片组以及一微控制器。芯片组连接中央处理器;微控制器具有存储一第一数值的一非易失性存储器单元与一计数器,当微控制器检测主机板由一关机状态转成一开机状态时,定时器开始计时,直到微控制器检测主机板由开机状态转成关机状态后,定时器停止计时并将计时记录登记为成一第二数值,且微控制器将第一数值与第二数值相加成为一更新数值,并回存更新数值至该非易失性存储器单元以取代该第一数值。Therefore, the present invention proposes a motherboard using a time statistics device, including: a central processing unit, a chipset and a microcontroller. The chipset is connected to the central processing unit; the microcontroller has a non-volatile memory unit and a counter for storing a first value, and when the microcontroller detects that the motherboard changes from a power-off state to a power-on state, the timer starts counting , until the microcontroller detects that the motherboard changes from the power-on state to the power-off state, the timer stops timing and registers the timing record as a second value, and the microcontroller adds the first value and the second value to become an updated value , and store the updated value back into the non-volatile memory unit to replace the first value.

因此,本发明还提出一种使用时间统计装置的主机板包括:中央处理器、一芯片组以及一微控制器。芯片组,连接该中央处理器;一微控制器具有存储一第一数值的一非易失性存储器单元与一计数器,当微控制器检测该主机板由一关机状态转成一开机状态时,定时器开始由第一数值开始计时,直到微控制器检测该主机板由开机状态转成关机状态后,定时器停止计时并将计时记录登记为一更新数值,并回存更新数值至非易失性存储器单元以取代第一数值。Therefore, the present invention also proposes a motherboard using a time statistics device including: a central processing unit, a chipset and a microcontroller. chipset, connected to the central processing unit; a microcontroller has a non-volatile memory unit and a counter for storing a first value, and when the microcontroller detects that the motherboard changes from a shutdown state to a power-on state, The timer starts counting from the first value until the microcontroller detects that the motherboard has turned from the power-on state to the power-off state, the timer stops counting and registers the timing record as an updated value, and stores the updated value back to non-volatile permanent memory cells to replace the first value.

因此,本发明还提出一种主机板的使用时间统计方法,包括下列步骤:当该主机板处于一开机状态时,开始计时;当该主机板处于一关机状态时,停止计时并根据计时记录登记成一开机使用时间;以及累计该开机使用时间与该主机板的一非易失性存储器单元的一第一数值以形成一更新数值,将该更新数值存储到该非易失性存储器单元。Therefore, the present invention also proposes a method for counting the usage time of the motherboard, which includes the following steps: when the motherboard is in a power-on state, start counting; when the motherboard is in a power-off state, stop counting and register according to the timing record forming a power-on usage time; and accumulating the power-on usage time and a first value of a non-volatile memory unit of the motherboard to form an updated value, and storing the updated value into the non-volatile memory unit.

由于,主机板本身可以提供一特定信息,不论是使用者或是主机板制造商都可以根据此特定信息,让使用者更有保障而主机板制造商维修主机板更有效率。Because the motherboard itself can provide specific information, both the user and the motherboard manufacturer can use this specific information to make the user more secure and the motherboard manufacturer to repair the motherboard more efficiently.

为了更进一步了解本发明特征及技术内容,请参阅以下有关本发明的详细说明与附图,然而所附附图仅提供参考与说明,并非用来对本发明加以限制。In order to further understand the features and technical content of the present invention, please refer to the following detailed description and drawings related to the present invention, but the attached drawings are only for reference and illustration, and are not intended to limit the present invention.

附图说明 Description of drawings

图1所绘示为本发明主机板的使用时间统计装置的第一实施例。FIG. 1 shows the first embodiment of the device for counting the usage time of the motherboard of the present invention.

图2所绘示为本发明主机板的使用时间统计装置的第二实施例。FIG. 2 shows the second embodiment of the device for counting the usage time of the motherboard of the present invention.

其中,附图标记说明如下:Wherein, the reference signs are explained as follows:

10主机板        12中央处理器10 Motherboard 12 CPU

14北桥芯片      16南桥芯片14 North Bridge chips 16 South Bridge chips

18存储器        20微控制器18 memories 20 microcontrollers

22定时器        24、30非易失性存储器单元22 timers 24, 30 non-volatile memory units

32超级输入输出装置32 super input and output device

具体实施方式 Detailed ways

根据本发明的实施例,于主机板上增加一使用时间统计装置,当使用者按压计算机主机的电源键开机时,时间统计装置可立即进行计时。当使用者关机之后,时间统计装置即终止计时,并将本次的使用时间与先前累计的总使用时间相加,并存入一存储装置。因此,存储装置中的信息即可提供使用者参考,或者,主机板维修部门也可以应用此信息。According to the embodiment of the present invention, a usage time counting device is added on the main board, and when the user presses the power button of the main computer to turn on the computer, the time counting device can start counting immediately. After the user turns off the machine, the time counting device stops counting, adds the current usage time to the previous accumulated total usage time, and stores it in a storage device. Therefore, the information in the storage device can be used as a reference for the user, or the motherboard maintenance department can also use this information.

众所周知,计算机主机中的电源供应器会供应一待机电源至主机板,通常计算机主机中的超级输入输出装置(super I/O)、键盘、鼠标都会接收待机电源,因此,当使用者开机之后于计算机主机初始化(initialization)的过程,计算机主机才可顺利地检测到键盘、鼠标并且顺利地运作。而本发明的使用时间统计装置也是连接至待机电源,如此才可以有效地掌握使用者开机或者关机的时间。As we all know, the power supply in the computer mainframe can supply a standby power to the mainboard, and usually the super input and output device (super I/O), keyboard, and mouse in the computer mainframe will receive the standby power. Only during the initialization process of the host computer can the host computer detect the keyboard and mouse and operate smoothly. And the use time counting device of the present invention is also connected to the standby power supply, so that the time when the user starts or shuts down the machine can be effectively grasped.

请参照图1,其所绘示为本发明主机板的使用时间统计装置的第一实施例。于主机板10至少包括一中央处理器(CPU)12、北桥芯片(north bridge)14、南桥芯片(south bridge)16(北桥芯片与南桥芯片合称芯片组)、存储器(memory)18、与一微控制器20。其中,北桥芯片14连接至中央处理器12、存储器18、南桥芯片16;另外,微控制器20连接至南桥芯片16,且微控制器20中还包括一定时器22与一非易失性存储器单元24。而非易失性存储器单元24存储一第一数值,此第一数值就是先前所有计算机主机使用时间的总和。而非易失性存储器单元可为一闪存(flash memory),或者一电气可擦除可规划式只读存储器(electrically-erasable programmable read-only memory)。Please refer to FIG. 1 , which shows the first embodiment of the device for counting the usage time of the motherboard of the present invention. The motherboard 10 includes at least a central processing unit (CPU) 12, a north bridge chip (north bridge) 14, a south bridge chip (south bridge) 16 (the north bridge chip and the south bridge chip are collectively called a chipset), a memory (memory) 18, with a microcontroller 20 . Wherein, the north bridge chip 14 is connected to the CPU 12, the memory 18, and the south bridge chip 16; in addition, the microcontroller 20 is connected to the south bridge chip 16, and the microcontroller 20 also includes a timer 22 and a nonvolatile permanent memory unit 24. The non-volatile memory unit 24 stores a first value, and the first value is the sum of all previous computer mainframe usage times. The non-volatile memory unit can be a flash memory, or an electrically erasable programmable read-only memory.

根据本发明的第一实施例,此微控制器20至少连接至南桥芯片16的第一引脚,例如电源正常(power_good或称PWRGD)引脚或者使用PWROK引脚,也可连接至南桥芯片16的SLP信号(例如SLP3和SLP4),即当进入睡眠状态也可继续计时。当使用者按下计算机主机的电源键开机时,可监视连接至南桥芯片16上的电源正常引脚会动作或是超级输入输出装置32的第二引脚,例如超级输入输出装置26的ATX_PWROK引脚,因此,微控制器20中的定时器22即可开始计时。同理,当使用者关机时,微控制器20中的定时器22即停止计时。也就是说,当微控制器20中的定时器22停止计时之后,定时器22上的第二数值即为本此使用者操作计算机主机所使用的时间,也就是开机使用时间。According to the first embodiment of the present invention, the microcontroller 20 is at least connected to the first pin of the south bridge chip 16, such as the power good (power_good or called PWRGD) pin or the PWROK pin, and can also be connected to the south bridge The SLP signals (such as SLP3 and SLP4 ) of the chip 16 can also continue timing when entering the sleep state. When the user presses the power button of the main computer to turn on the computer, it can monitor whether the power normal pin connected to the south bridge chip 16 will act or the second pin of the super input and output device 32, such as the ATX_PWROK of the super input and output device 26 pin, therefore, the timer 22 in the microcontroller 20 can start timing. Similarly, when the user turns off the machine, the timer 22 in the microcontroller 20 stops timing. That is to say, after the timer 22 in the microcontroller 20 stops counting, the second value on the timer 22 is the time used by the user to operate the main computer, that is, the time when the computer is turned on.

由于微控制器20中的非易失性存储器单元24中会存储第一数值,此第一数值就是先前所有计算机主机使用时间的总和。也就是说,由于微控制器20是连接至待机电源,当计算机主机关机之后微控制器20仍可读取非易失性存储器单元24中的第一数值并且与第二数值相加之后成为更新的第一数值并且回存至非易失性存储器单元24。而使用者即可以根据非易失性存储器单元24中的第一数值来得知主机板10的总使用时间。Since the first value is stored in the non-volatile memory unit 24 of the microcontroller 20 , the first value is the sum of all previous computer mainframe usage times. That is to say, since the microcontroller 20 is connected to the standby power supply, the microcontroller 20 can still read the first value in the non-volatile memory unit 24 and add it to the second value to become an updated value after the host computer is turned off. and stored back into the non-volatile memory unit 24. And the user can know the total usage time of the motherboard 10 according to the first value in the non-volatile memory unit 24 .

当然,微控制器20也可以在开机时先行读取非易失性存储器单元30中的第一数值,并由第一数值开始累计。当计算机主机关机之后,微控制器20即可将停止计时的第一数值回存至非易失性存储器单元30。而使用者即可以根据非易失性存储器单元24中的第一数值来得知主机板10的总使用时间。Of course, the microcontroller 20 can also read the first value in the non-volatile memory unit 30 in advance when starting up, and start to accumulate from the first value. After the host computer is turned off, the microcontroller 20 can store back the first value of the stop timing to the non-volatile memory unit 30 . And the user can know the total usage time of the motherboard 10 according to the first value in the non-volatile memory unit 24 .

请参照图2,其所绘示为本发明主机板的使用时间统计装置的第二实施例。于主机板10至少包括一中央处理器(CPU)12、北桥芯片(north bridge)14、南桥芯片(south bridge)16、存储器(memory)18、一微控制器20、一非易失性存储器单元30、超级输入输出装置32。其中,北桥芯片14连接至中央处理器12、存储器18、南桥芯片16;另外,微控制器20中还包括一定时器22,并且微控制器20连接至南桥芯片16与超级输入输出装置32与非易失性存储器单元30。而非易失性存储器单元30存储一第一数值,此第一数值就是先前所有计算机主机使用时间的总和。Please refer to FIG. 2 , which shows a second embodiment of the device for counting the usage time of the mainboard of the present invention. The motherboard 10 includes at least a central processing unit (CPU) 12, a north bridge chip (north bridge) 14, a south bridge chip (south bridge) 16, a memory (memory) 18, a microcontroller 20, and a nonvolatile memory Unit 30 , super input and output device 32 . Wherein, the north bridge chip 14 is connected to the central processing unit 12, the memory 18, and the south bridge chip 16; in addition, a timer 22 is also included in the microcontroller 20, and the microcontroller 20 is connected to the south bridge chip 16 and the super input and output device 32 and 30 nonvolatile memory cells. The non-volatile memory unit 30 stores a first value, and the first value is the sum of all previous computer mainframe usage times.

根据本发明的第二实施例,此微控制器20连接至超级输入输出装置32的第二引脚,例如连接至PSON信号引脚或者ATX_PWROK引脚。当使用者按下计算机主机的电源键开机时,超级输入输出装置32的第二信号引脚会动作,因此,微控制器20中的定时器22即可开始计时。同理,当使用者关机时,微控制器20中的定时器22即停止计时。也就是说,当微控制器20中的定时器22停止计时之后,定时器22上的第二数值即为此使用者操作计算机主机所使用的时间,也就是开机使用时间。According to the second embodiment of the present invention, the microcontroller 20 is connected to a second pin of the Super Input Output Device 32 , such as a PSON signal pin or an ATX_PWROK pin. When the user presses the power button of the host computer to turn it on, the second signal pin of the super input and output device 32 will act, so the timer 22 in the microcontroller 20 can start timing. Similarly, when the user turns off the machine, the timer 22 in the microcontroller 20 stops timing. That is to say, after the timer 22 in the microcontroller 20 stops counting, the second value on the timer 22 is the time used by the user to operate the computer mainframe, that is, the time when the computer is turned on.

另外,非易失性存储器单元30中会存储一第一数值,此第一数值就是先前所有计算机主机使用时间的总和。也就是说,当计算机主机关机之后,微控制器20即可读取非易失性存储器单元30中的第一数值并且与第二数值相加之后成为更新的第一数值并且回存至非易失性存储器单元30。而使用者即可以根据非易失性存储器单元30中的第一数值来得知主机板10的总使用时间。In addition, a first value is stored in the non-volatile memory unit 30 , and the first value is the sum of all previous computer mainframe usage times. That is to say, after the host computer is turned off, the microcontroller 20 can read the first value in the non-volatile memory unit 30 and add it to the second value to become an updated first value and store it back into the non-volatile memory unit 30. A volatile memory unit 30 . And the user can know the total usage time of the motherboard 10 according to the first value in the non-volatile memory unit 30 .

当然,微控制器20也可以在开机时先行读取非易失性存储器单元30中的第一数值,并由第一数值开始累计。当计算机主机关机之后,微控制器20即可将停止计时的第一数值回存至非易失性存储器单元30。而使用者即可以根据非易失性存储器单元30中的第一数值来得知主机板10的总使用时间。Of course, the microcontroller 20 can also read the first value in the non-volatile memory unit 30 in advance when starting up, and start to accumulate from the first value. After the host computer is turned off, the microcontroller 20 can store back the first value of the stop timing to the non-volatile memory unit 30 . And the user can know the total usage time of the motherboard 10 according to the first value in the non-volatile memory unit 30 .

当主机板制造商于主机板出厂之前将第一数值归零。之后,只要主机板被使用则微控制器20就会连续地累计第一数值,因此,当使用者购得一主机板之后,即可以根据非易失性存储器单元30中的第一数值来得知此主机板的使用状况,并且判断此主机板是否为二手主机板。When the motherboard manufacturer resets the first value to zero before the motherboard leaves the factory. Afterwards, as long as the main board is used, the microcontroller 20 will continuously accumulate the first value. Therefore, when the user purchases a main board, the user can know according to the first value in the non-volatile memory unit 30 The usage status of this main board, and judge whether this main board is a second-hand main board.

另外,主机板厂商的维修部门还可以统计第一时间与损坏元件之间的关系。也就是说,通过统计主机板厂商可以得知主机板上的特定元件的使用寿命。因此,当消费者将故障的主机板送至维修部门时,维修工程师即可以根据第一时间可以推知主机板上损坏的元件,因此,维修部门的维修效率可以提高。In addition, the maintenance department of the motherboard manufacturer can also count the relationship between the first time and the damaged components. That is to say, the service life of specific components on the motherboard can be known through the statistics of the motherboard manufacturers. Therefore, when the consumer sends the faulty motherboard to the maintenance department, the maintenance engineer can infer the damaged components on the motherboard at the first time, so the maintenance efficiency of the maintenance department can be improved.

因此,本发明于主机板上增加一使用时间统计装置,并且可以提供此主机板的总使用时间统计装置,使得使用者可以得知此主机板的状况。并且利用主机板的总使用时间统计装置,使得主机板维修部门的微效率更高。Therefore, the present invention adds a usage time statistics device on the motherboard, and can provide the total usage time statistics device of the motherboard, so that the user can know the status of the motherboard. And the use of the total usage time statistics device of the motherboard makes the micro-efficiency of the motherboard maintenance department higher.

综上所述,虽然本发明已以优选实施例揭示如上,然而其并非用以限定本发明,任何熟悉此技术领域的技术人员,在不脱离本发明的精神和范围内,应当可作各种变动与润饰,因此本发明的保护范围应当视后附的权利要求书所限定的保护范围为准。In summary, although the present invention has been disclosed as above with preferred embodiments, it is not intended to limit the present invention. Any person familiar with this technical field should be able to make various modifications without departing from the spirit and scope of the present invention. Changes and modifications, so the scope of protection of the present invention should be based on the scope of protection defined by the appended claims.

Claims (19)

1. 一种使用时间统计装置的主机板,包括:1. A motherboard using a time statistics device, comprising: 一中央处理器;a central processing unit; 一芯片组,连接该中央处理器;以及a chipset connected to the central processing unit; and 一微控制器,具有存储一第一数值的一非易失性存储器单元与一计数器,当该微控制器检测该主机板由一关机状态转成一开机状态时,该定时器开始计时,直到该微控制器检测该主机板由该开机状态转成该关机状态后,该定时器停止计时并将计时记录登记成为一第二数值,且该微控制器将该第一数值与该第二数值相加成为一更新数值,并回存该更新数值至该非易失性存储器单元以取代该第一数值。A microcontroller has a non-volatile memory unit and a counter for storing a first value, and when the microcontroller detects that the mainboard changes from a power-off state to a power-on state, the timer starts counting until After the micro-controller detects that the mainboard changes from the power-on state to the power-off state, the timer stops timing and registers the timing record as a second value, and the micro-controller combines the first value with the second value adding to obtain an updated value, and storing the updated value back into the non-volatile memory unit to replace the first value. 2. 如权利要求1所述的使用时间统计装置的主机板,其中该非易失性存储器单元为一闪存或者一电气可擦除可规划式只读存储器。2. The motherboard of the usage time statistics device as claimed in claim 1, wherein the non-volatile memory unit is a flash memory or an EEPROM. 3. 如权利要求1所述的使用时间统计装置的主机板,其中该微控制器连接至该芯片组的一第一引脚,来检测该主机板是否处于该开机状态。3. The motherboard of the usage time statistics device as claimed in claim 1, wherein the microcontroller is connected to a first pin of the chipset to detect whether the motherboard is in the power-on state. 4. 如权利要求1所述的使用时间统计装置的主机板,还包括一超级输入输出装置,該微控制器连接至该超级输入输出装置的一第二引脚,来检测该主机板是否处于该开机状态。4. The motherboard of the use time statistics device as claimed in claim 1, further comprising a super input and output device, the microcontroller is connected to a second pin of the super input and output device to detect whether the motherboard is in The boot state. 5. 如权利要求4所述的使用时间统计装置的主机板,其中该微控制器与该超级输入输出装置连接至一待机电源。5. The motherboard of the use time statistics device as claimed in claim 4, wherein the microcontroller and the super input and output device are connected to a standby power supply. 6. 如权利要求1所述的使用时间统计装置的主机板,还包括一存储器,连接该芯片组。6. The motherboard of the use time statistics device as claimed in claim 1, further comprising a memory connected to the chipset. 7. 如权利要求6所述的使用时间统计装置的主机板,其中该芯片组包括一北桥芯片与一南桥芯片,该北桥芯片连接到该中央处理器,该南桥芯片连接到该微控制器。7. The motherboard of the use time statistics device as claimed in claim 6, wherein the chipset includes a north bridge chip and a south bridge chip, the north bridge chip is connected to the central processing unit, and the south bridge chip is connected to the microcontroller device. 8. 一种使用时间统计装置的主机板包括:8. A motherboard using a time statistics device comprising: 一中央处理器;a central processing unit; 一芯片组,连接该中央处理器;以及a chipset connected to the central processing unit; and 一微控制器,具有存储一第一数值的一非易失性存储器单元与一计数器,当该微控制器检测该主机板由一关机状态转成一开机状态时,该定时器开始由该第一数值开始计时,直到该微控制器检测该主机板由该开机状态转成该关机状态后,该定时器停止计时并将计时记录登记为一更新数值,并回存该更新数值至该非易失性存储器单元以取代该第一数值。A microcontroller has a non-volatile memory unit and a counter for storing a first value. When the microcontroller detects that the mainboard changes from a power-off state to a power-on state, the timer starts from the first A numerical value starts counting until the microcontroller detects that the mainboard changes from the power-on state to the power-off state, then the timer stops counting and registers the timing record as an updated value, and stores the updated value back to the non-volatile A volatile memory cell is used to replace the first value. 9. 如权利要求8所述的使用时间统计装置的主机板,其中该非易失性存储器单元为一闪存或者一电气可擦除可规划式只读存储器。9. The motherboard of the usage time statistics device as claimed in claim 8, wherein the non-volatile memory unit is a flash memory or an EEPROM. 10. 如权利要求8所述的使用时间统计装置的主机板,其中该微控制器连接至该芯片组的一第一引脚来检测该主机板是否处于该开机状态。10. The motherboard of the usage time statistics device as claimed in claim 8, wherein the microcontroller is connected to a first pin of the chipset to detect whether the motherboard is in the power-on state. 11. 如权利要求8所述的使用时间统计装置的主机板,还包括一超级输入输出装置,其中该微控制器连接至该超级输入输出装置的一第二引脚,来检测该主机板是否处于该开机状态。11. The mainboard of the use time statistics device as claimed in claim 8, further comprising a super input output device, wherein the microcontroller is connected to a second pin of the super input output device to detect whether the main board in this power-on state. 12. 如权利要求11所述的使用时间统计装置的主机板,其中该微控制器与该超级输入输出装置连接至一待机电源。12. The motherboard of the usage time statistics device as claimed in claim 11, wherein the microcontroller and the super input and output device are connected to a standby power supply. 13. 如权利要求8所述的使用时间统计装置的主机板,还包括一存储器,连接该芯片组。13. The motherboard of the use time statistics device as claimed in claim 8, further comprising a memory connected to the chipset. 14. 如权利要求13所述的使用时间统计装置的主机板,其中该芯片组包括一北桥芯片与一南桥芯片,该北桥芯片连接到该中央处理器,该南桥芯片连接到该微控制器。14. The motherboard of the use time statistics device as claimed in claim 13, wherein the chipset includes a north bridge chip and a south bridge chip, the north bridge chip is connected to the central processing unit, and the south bridge chip is connected to the microcontroller device. 15. 一种主机板的使用时间统计方法,包括下列步骤:15. A method for counting the use time of a motherboard, comprising the following steps: 当该主机板处于一开机状态时,开始计时;When the motherboard is in a power-on state, start counting; 当该主机板处于一关机状态时,停止计时并根据计时记录登记成一开机使用时间;以及When the motherboard is in a power-off state, stop timing and register as a power-on use time according to the timing record; and 累计该开机使用时间与该主机板的一非易失性存储器单元的一第一数值以形成一更新数值,将该更新数值存储到该非易失性存储器单元。Accumulate the boot time and a first value of a non-volatile memory unit of the motherboard to form an updated value, and store the updated value into the non-volatile memory unit. 16. 如权利要求15所述的主机板的使用时间统计方法,其中存储到该非易失性存储器单元,是将该更新数值取代该非易失性存储器单元的该第一数值。16. The method for counting the usage time of the mainboard as claimed in claim 15, wherein storing in the non-volatile memory unit is to replace the first value of the non-volatile memory unit with the updated value. 17. 如权利要求15所述的主机板的使用时间统计方法,其中该非易失性存储器单元为一闪存或者一电气可擦除可规划式只读存储器。17. The usage time statistics method of the motherboard as claimed in claim 15, wherein the non-volatile memory unit is a flash memory or an EEPROM. 18. 如权利要求15所述的主机板的使用时间统计装置,其中该开机状态是由该主机板上一南桥芯片所提供的一第一引脚来决定。18. The usage time statistics device of the motherboard as claimed in claim 15, wherein the power-on state is determined by a first pin provided by a south bridge chip on the motherboard. 19. 如权利要求15所述的主机板的使用时间统计装置,其中该开机状态是由该主机板上一超级输入输出装置所提供的一第二引脚来决定。19. The usage time counting device of the main board as claimed in claim 15, wherein the power-on state is determined by a second pin provided by a super input and output device on the main board.
CNA2008100917570A 2008-04-14 2008-04-14 Mainboard using time statistic device and statistic method thereof Pending CN101251818A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CNA2008100917570A CN101251818A (en) 2008-04-14 2008-04-14 Mainboard using time statistic device and statistic method thereof

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CNA2008100917570A CN101251818A (en) 2008-04-14 2008-04-14 Mainboard using time statistic device and statistic method thereof

Publications (1)

Publication Number Publication Date
CN101251818A true CN101251818A (en) 2008-08-27

Family

ID=39955215

Family Applications (1)

Application Number Title Priority Date Filing Date
CNA2008100917570A Pending CN101251818A (en) 2008-04-14 2008-04-14 Mainboard using time statistic device and statistic method thereof

Country Status (1)

Country Link
CN (1) CN101251818A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102193850A (en) * 2010-03-19 2011-09-21 英业达股份有限公司 A time updating system for multi-main board server
CN102521113A (en) * 2011-11-24 2012-06-27 广东欧珀移动通信有限公司 A new method for testing handheld devices
CN110618603A (en) * 2019-09-24 2019-12-27 中国人民解放军63698部队 Equipment starting timer

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102193850A (en) * 2010-03-19 2011-09-21 英业达股份有限公司 A time updating system for multi-main board server
CN102521113A (en) * 2011-11-24 2012-06-27 广东欧珀移动通信有限公司 A new method for testing handheld devices
CN110618603A (en) * 2019-09-24 2019-12-27 中国人民解放军63698部队 Equipment starting timer
CN110618603B (en) * 2019-09-24 2021-06-15 中国人民解放军63698部队 Equipment starting timer

Similar Documents

Publication Publication Date Title
CN103823769B (en) Computer system and data recovery method
US9916165B2 (en) Systems and methods to optimize boot for information handling system comprising persistent memory
TWI498902B (en) Method for data management and memory storage device and memory control circuit unit
TWI460580B (en) A power supply apparatus of computer system and a method for controlling power sequence thereof
WO2011063584A1 (en) Deep standby method and device for embedded system
US10997516B2 (en) Systems and methods for predicting persistent memory device degradation based on operational parameters
CN110488673A (en) A kind of data processing module and data processing method of low-power consumption mode
CN106648016B (en) Power supply circuit, power supply equipment and power supply method
US20150213424A1 (en) Service data record system and pos system with the same
CN112462920B (en) Method, device, server and storage medium for power control
US20150006967A1 (en) Using persistant memory regions within memory devices to collect serial presence detect and performance data
CN102611186A (en) Power supply method and power supply device
TW201643605A (en) Energy-efficient nonvolatile microprocessor
TW201331841A (en) Electronic apparatus and BIOS updating apparatus thereof
CN101251818A (en) Mainboard using time statistic device and statistic method thereof
US10387306B2 (en) Systems and methods for prognosticating likelihood of successful save operation in persistent memory
CN103546638B (en) A kind of flash memory cards fall card restoration methods and mobile terminal thereof
US10990156B2 (en) Method for calculating power-on hours of an electronic device and electronic device utilizing the same
CN101872233B (en) Automatic switch machine scheduling control method and system
CN104345850B (en) Intelligent automatic boot device
US20090259788A1 (en) Motherboard having time calculating device and time calculating method thereof
CN119472961A (en) Timing power on/off method and industrial computer based on ARM architecture core processor
TWI678622B (en) Development system and productization method for data storage device
TWI482090B (en) System capable of booting through a universal serial bus device and method thereof
TWI537735B (en) Electronic apparatus and bios updating apparatus thereof

Legal Events

Date Code Title Description
C06 Publication
PB01 Publication
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
C02 Deemed withdrawal of patent application after publication (patent law 2001)
WD01 Invention patent application deemed withdrawn after publication

Open date: 20080827