CN101013315A - General numerical control system based on full digital ring bus - Google Patents
General numerical control system based on full digital ring bus Download PDFInfo
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Abstract
The invention discloses an universal control system based on digital ring bus, including master equipment and slave equipment; the main equipment includes the PC (1) with digital control software and the bus controller unit (2); the slave equipment includes digital bus servo drive (3) and the PLC, and main equipment connecting with 1-24 slave equipments in serial which back to the main equipment thereby constituting a closed loop, and between the main equipment and the slave equipment transmitting data through the link connecting with physical layer and transmission media; among them, the bus controller (2) is slot structure, and connects with the motherboard based on X86 architecture through the bus interface on the motherboard, and communicates with the X86CPU on the motherboard. The invention relies on the method of industrial control motherboard plus bus controller slot, in order to improve the system expanding performance.
Description
Technical field
The present invention relates to a kind of digital bus-type numerical control system, more particularly, relate to the set-up mode of bus controller in the digital bus-type numerical control system of annular.
Background technology
The architecture of traditional numerically-controlled machine is by the form decision of the data of transmission.Can see on the market nothing more than following several: analog data (as Fig. 1), digit pulse formula (as Fig. 2), bus type (as Fig. 3).These 3 kinds of each have their own characteristics of structure.At present, analog quantity transmission data is in the majority on the home market, and common in the digital control system of low side now with this structure of pulse command transfer rate data, high-end is the market of analog quantity and number bus formula.
Transmit in two kinds of numerical control structures of data in pulsed and analog quantity, all there is a structure that is called CNC (numerical control) controller, the working method simplified summary of this structure is as follows: the CNC software of host computer passes the speed or the position signalling of coming, and is sent to the CNC controller by certain bus.The CNC controller with this signal change into the analog quantity that servo-driver can discern (normally ± 10V) or pulse command (by counting and regularly realize) servo-driver carry out related operation after receiving this order, power controlling partly makes servomotor turn round as requested; The real-world operation position of servo-driver feeds back to servo-driver by position detecting device simultaneously, and servo-driver is adjusted control accuracy according to the actual speed and the position of the calculated signals motor of feedback, finishes a Control Circulation; Meanwhile the data of position detecting device also feed back to the CNC controller, and by the CNC controller position detecting device feedback data are delivered to the numerical control software of host computer, and the computing of participant position ring reaches the purpose of position ring control.
Be not difficult to find out that by said structure the CNC controller structure centre of pulse command formula and nalog quantity type all will add a CNC controller data from host computer and numerical control software are transformed.Such words intermediate link more complicated, data conversion and transmission course are because the existence of analog to digital and other links causes loss of significance and transmission transformed error in the transmission course easily.Owing to the increase of intermediate link, the probability that system is disturbed also can increase simultaneously, and system's labile factor improves.Also have a bit, the existence of CNC controller link, itself can make cost up.
The appearance of digital servo device is an important milestone on the Numeric Control Technology development history.Adopt digital servo device, all command value and actual value are all finished processing in a microcontroller.This servomechanism installation not only can be realized the control of traditional electric current loop and speed ring, can also finish smart interpolation in the extremely short time, realizes position ring control.
The bus-type numerical control system architecture is the trend of the development of numerical control in the future, and each big digital control system manufacturer has all carried out a large amount of inputs at this reverse side, and has designed many bus systems for it.
Similar structures is as shown in Figure 3 all adopted in the bus type numerical control of the overwhelming majority.Common this structure is open, adopts other computing machine of technical grade, plugs the specifically developed bus controller integrated circuit board of the bus protocol that adopts for system then on computers; Connect the servo-driver that has bus interface by the bus controller integrated circuit board.The course of work is probably as follows: in the interpolation cycle of set time, the data that numerical control software will be controlled send to the bus controller integrated circuit board by the bus interface on the mainboard, and the bus controller integrated circuit board need be packed these data based corresponding bus protocols and be sent to bus network and get on; Number bus formula servo-driver receives these packets, and effective position interpolation data and speed and other data extracts are come out, and carries out the control algolithm computing, and then the control servomotor.Servo-driver is adjusted at speed and position according to the position detecting device feedback data of motor simultaneously, finishes the Control Circulation of oneself; The feedback signal of position detecting device feeds back to numerical control software by the bus run of Digital Servo Driver simultaneously, numerical control software extracts data, carry out the computing of position interpolation and other control algolithm according to the numerical control algorithm, enter next interpolation cycle, send the order of this interpolation cycle.
In the superincumbent number bus formula digital control system, adopt the plug-in card mode to connect between host computer and the bus controller, the connection of this mode has the convenient, flexible characteristics of mechanism.But industry spot, because in the many electric circumstance of site environment more complicated, especially motor, the potential danger that is connected with loose contact of golden finger type, this situation are relatively more dangerous for numerically-controlled machine.
Therefore some has the producer of mainboard exploitation strength getting half-way house aspect open and the reliability, develops the mainboard of oneself at industrial environment, and bus controller is sitting on the cpu motherboard.But because epoch and the restriction of hardware condition at that time, the mainboard of these are integrated bus controller is the interface of the many CPU of employing usually, and resource is relatively wasted comparatively speaking, the structure more complicated.In order to reduce the expense of overlapping development, this structure is retained so far always.
Digital control system as one independently the process digitial controller be applied to during industrial automation produces, its multitask sex expression must be finished management and control two main tasks at its management software.Wherein system management comprises input, and I/O handles, and communication shows, the establishment management of diagnosis and job sequence etc.The control section of system comprises: decoding, cutter compensation, velocity process, interpolation and position control etc.Therefore, modern digital control system in open type software configuration is huger usually, need high performance computer hardware as support, and the cpu system of the X86 structure of present high speed development can well satisfy this demand.In addition, the digital control system opening important behaviour is the versatility of its operating system.Up to the present this structural design supports the CPU of X86 structure for adopting windowsNT and two kinds of multiple task operating systems of Debian Linux.In this structure,, operating system has been carried out the real-time transformation according to the harsh requirement of digital control system to real-time.
Summary of the invention
The present invention is directed to the problems referred to above, proposed a kind of opening, structure full digital ring bus formula digital control system flexibly, rely on the mode of industrial control mainboard+bus controller plug-in card, be intended to improve the Scalable Performance of system.
To achieve these goals, the present invention at first framework one cover full digital ring bus formula digital control system, comprise main equipment and slave unit; Main equipment comprises host computer and the bus controller that numerical control software is housed; Described slave unit comprises number bus formula servo-driver and PLC.Thereby main equipment is connected in series 1-24 slave unit successively and connects back main equipment and constitutes a closed circuit, the link transmission data by being connected with transmission medium between main equipment and the slave unit with Physical layer, in normal operation, the data one-way transmission.And its characteristics of digital control system of the present invention are, above-mentioned bus controller adopts the card insert type structure, link to each other with mainboard by the bus interface on the mainboard based on the X86 architecture, and with mainboard on the X86CPU interactive communication.
Above-mentioned based on full digital ring bus formula general numerical control system in, the mainboard interface of bus controller is PCI, PC104PLUS or PCIE interface, under the optimal way, selects pci interface for use.
Selecting for use on the basis of pci interface, the present invention is based on full digital ring bus formula general numerical control system, it further improves and is that bus controller comprises Physical layer control module, lathe data storage area and the digital control system enable module of power management module, pci bus control module, bus protocol analysis module, data buffer area, connection physical layer interface.Wherein, the X86CPU on the mainboard delivers to data buffer area by the pci bus control module with data; Bus protocol analysis module accesses data buffer area obtains data and is translated into the instruction that meets bus protocol, relies on physical layer interface that data are mail to slave unit by the Physical layer control module again.From the feedback information of slave unit, deliver to data buffer area by described physical layer interface, Physical layer control module, bus protocol analysis module successively; Host computer obtains data by PC bus control module visit data buffer area.In addition, the lathe data storage area is used to store the current up-to-date configuration data of lathe, by PC bus control module and host computer interaction data.
Under the optimal way, above-mentioned pci bus control module, bus protocol analysis module, Physical layer control module realize by an on-chip integration system FPGA.In addition, bus controller also is provided with an interface that directly connects machine tool keyboard specially when data output, input interface are set.Above-mentioned interface preferably selects for use the ethernet physical layer interface to realize.
By technique scheme, the present invention is based on full digital ring bus formula general numerical control system, have following outstanding feature at hardware aspect:
1, owing to adopt X86 system general mainboard, has higher flexibility.
Reasons such as 2, cost is low, and general mainboard is big owing to shipment amount, and device is general are more than special-purpose mainboard low cost of manufacture.
3, random exented memory improves runnability
4, because the support of the raising of the CPU frequency of existing general mainboard and combination property and complicated multimedia instruction collection, therefore, this structure can the various large-scale CAM/CAD softwares of fine operation, and the scene is carried out simulation in early stage and processed and 3D emulation, and is powerful.
5, card insert type bus controller, versatility and open good.
6, based on the bus controller of FPGA structure, ethernet physical layer is as input, output interface, not only can support at present powerful as SERCOS III, bus standards such as ProfiBus.Net, more can be as required voluntarily development and Design be fit to oneself bus standard, have stronger scalability.
7, distribute reciprocity bus interface separately for machine tool keyboard, improve the response rank and the time of machine tool keyboard, make system operation fast and reliable more.
8, adopt the monolithic FPGA of high capacity design to realize main board bus bridging functionality, bus data protocol analysis and Physical layer is controlled, can satisfy the parsing of different agreement, not only support SERCOS III, the ProfiBus.Net agreement, can also be self-defined as real-time bus agreement based on ethernet physical layer, further expand the scope of application.
9, for finishing complex calculation and accurate position interpolation, can dispose digital bus type servo-driver in the native system, have powerful calculation process ability and built-in high speed position ring control algolithm, can analyze running orbit, estimating speed position operation curve.
Description of drawings
Fig. 1 is a kind of digital control system topological structure synoptic diagram that prior art selects for use analog data to realize;
Fig. 2 is a kind of digit pulse formula of prior art digital control system topological structure synoptic diagram;
Fig. 3 is a kind of bus-type numerical control system topological structure of prior art synoptic diagram;
Fig. 4 is the topological structure synoptic diagram of a kind of full digital ring bus formula digital control system involved in the present invention;
Fig. 5. be the synoptic diagram of an embodiment of the present invention;
Fig. 6 is the principle assumption diagram of bus controller among Fig. 5;
Fig. 7 is a composition synoptic diagram of realizing the data line of digital control system of the present invention;
Fig. 8 is the circulation sequential synoptic diagram of realizing in a kind of embodiment of digital control system of the present invention;
Fig. 9 be with the same embodiment of Fig. 8 in the data structure diagram realized;
Figure 10 be with the same embodiment of Fig. 9 in the write section divided data organization chart realized;
Figure 11 be with the same embodiment of Fig. 9 in realize read the partial data organization chart.
Embodiment
A kind of as shown in Figure 4 topological structure of full digital ring bus formula digital control system, this structure is described in the Chinese patent application " a kind of bus-type numerical control system and control method thereof " that the applicant submits on the same day.The present invention is on the basis of above-mentioned application, has done further qualification and perfect, is intended to improve the extendability of this type of full digital ring bus formula digital control system.Therefore above-mentioned application is incorporated into this paper by reference, will more help to understand main points of the present invention and characteristic.
For this reason, hereinafter earlier this type of digital control system is done to describe in detail.
In order to realize this type of digital control system, the agreement that can aspect two of Physical layer and data link layers, define a kind of host-host protocol or directly select current popular for use as, main contents comprise: the setting of the configuration of the composition of topological structure, data line, signal encoding form, telegram structure, work schedule, aperiodicity data transmission, interface initialization, cycle data and transmission, servomechanism installation operational mode and fault diagnosis and processing etc.At this, this paper provides a kind of feasible program, be intended to schematically expression protocol architecture required for the present invention, and protection scope of the present invention is not to be limited on this protocol architecture.In conjunction with concrete condition, the definition of agreement can change.
1, Physical layer
Physical layer is positioned at the lowermost layer of communication system, it is the basis of whole communication, for the data communication between the equipment provides transmission medium (cable, optical fiber etc.) and InterWorking Equipment (plug, socket etc.),, be responsible for data transmission and relevant management work for data transmission provides path.The physical layer protocol of system has mainly defined the composition of topological structure, data line and signal encoding form etc.
2, topological structure
System uses loop structure as the most basic topology, and loop is made up of master and slave equipment and transmission line, and each loop has only a main equipment, and all the other all are slave unit.The link transmission data that connects by ethernet physical layer between each equipment, data are uniflux on transmission line.
As shown in Figure 4, the type of attachment of main equipment (comprising bus controller) and slave unit (comprising digital bus type servo controller).A main equipment can be with a plurality of slave units, and the maximum slave unit that can connect as loop of design at present is 24, leaves and can expand leeway.
Attention: though interconnected between each slave unit by category 5 twisted pair, can not directly carry out data communication between each slave unit, slave unit can only receive the order of main equipment and data and make corresponding reaction and return data according to the corresponding command.Arrange successively from low to high according to the order of connection on the link address of each slave unit.
3, the composition of data line
With the ethernet physical layer is example, specific to the wall scroll data line, is made up of 3 parts altogether.The ethernet physical layer chip of forward transmitting terminal, receive the normal data that upper control chip sends over, become serial data to transmit this data conversion, as shown in Figure 7, forward data and reverse data send simultaneously, under the situation that slave unit does not break down, only use forward data to carry out data and transmit, when running into the fault that broken string or other slave units can not communicate by letter, reverse data plays the passback data, form ring closure, use for handling failure.
4, signal encoding form
Relevant with the physical layer transmission medium and the agreement that are adopted, support ethernet physical layer at present, 1394 Physical layers, USB Physical layer.The employing ethernet physical layer is an example: finish the conversion of 4B-5B code system in Physical layer, realize the Differential Manchester Encoding transmission on the category 5 twisted pair.
5, telegram basic structure
In system interface, all data all are to transmit with the form of datagram.Concrete condition is as described below.
5.1 the circulation sequential organization of host-host protocol
The circulation of an agreement is sent by 2 spaced data and forms as seen from Figure 8: the quick byte frame of the Frame of 962 bytes, 8 bytes.Wherein, the Frame function of 962 bytes comprises that main equipment issues the order of slave unit and the data that slave unit returns.The function of the quick byte frame of 8 bytes comprises that order and data synchronization that main equipment sends enable, i.e. the information of directive command execution.
Concrete frame structure is described below:
962 (962=2+40 * 24) byte data frames is with 16 system AA, and BB follows the order and the Frame of 24 slave units afterwards as start byte, 40 byte spaces of each devices allocation.
5.2 slave unit data structure
The slave unit data are divided into and join 40 byte spaces as shown in Figure 9, and wherein preceding 16 bytes are come the data that write of autonomous device, and back 24 bytes are the data that turn back to main equipment.Write data division data organizational structure as shown in figure 10, read the partial data institutional framework as shown in figure 11.
6, the initial configuration of interface initialization and slave unit
The base address of all slave units all will be changed to F8H after powering on.For fear of address conflict, all slave units connect with ring form, that is to say that disposing preceding host computer can only visit first slave unit.
The first step of configuration is the identification slave unit, and host computer is visited first slave unit, if host computer has read correct identification code.Host computer redistributes the base address for this slave unit then.This slave unit is doing so that next slave unit is configured according to this sign, then to finish follow-up slave unit initial configuration with sign successively after the configuration in the signal of next stage transmission.
7, the work schedule of digital control system agreement
Round-robin sequential organization as shown in Figure 8, the byte that the reception of long data frame begins is 16 system data AA and BB, be the 0th byte (slave unit is numbered since 0) of the 0th equipment then, with No. 2 slave unit (physical address is 02) is example, transmit in the process of data in this slave unit transmission, the data volume when front transfer is counted.When counting down to 2*40+2=82 (52HEX), begin to receive (duplicate, but transmit simultaneously) data, when counting down to 82+24=106 (6A HEX), stop to receive, beginning is transmitted while filling to the data stream padding data.When counting down to 106+24=138, self fill to transmit and finish, continue to transmit and transmit other device datas, finish up to data stream.
Main equipment sends the quick byte frame of one 8 byte then, and slave unit receives after the opening flag, begins counting; Receive in this byte frame the order data corresponding to own position, locking (enabling) long data frame passes the data of coming, and carries out corresponding operating.
Long data frame and fast frame operation all finish, and finish a circulation.
8, fault diagnosis and processing
The protocol definition of native system special data bit to the system power supply electric voltage exception, the scrambler broken string, link opens circuit, the communication data mistake, servomechanism installation is reported to the police, PLC reports to the police etc., carries out relevant detection and processing.
According to foregoing description, this class bus-type numerical control system involved in the present invention can be summarized as follows:
This system comprises host computer 1, full digital servo-driver 3, motor 4 and the programmable controller PLC that numerical control software is housed.Host computer and bus controller constitute main equipment; Slave unit comprises servo-driver and PLC.Servo-driver sends drive signal to motor, and motor is sent the signal of position detecting device feedback back to servo-driver by circuit simultaneously.The characteristics of digital control system of the present invention are, thereby main equipment is connected in series a plurality of slave units successively and finally connecting back main equipment constitutes a closed circuit, and the link transmission data by being connected with transmission medium with Physical layer between main equipment and the slave unit.In the transmission of Information process, main equipment only sends main information to direct-connected first order slave unit with it, and this main information comprises the information relevant with all slave units, as command information, data message and trigger the exectorial information of certain one-level slave unit.And main information will according to the order of serial connection slave unit only successively one-way transmission to each slave unit.Correspondingly, certain one-level slave unit receives, responds information associated in the main information and provides feedback information; The feedback information of each slave unit is transmitted back main equipment according to the order of serial connection slave unit is unidirectional successively by each slave unit of subordinate.Above-mentioned data communication is only carried out between main equipment and slave unit, in the transmission course slave unit receive only main equipment to self order and service data and handle, data to other slave units are only transmitted, and do not handle, and do not carry out independent exchanges data between the slave unit.
A kind of representative embodiment based on full digital ring bus formula digital control system above has been described, hereinafter will have done to describe in detail at main points of the present invention.
That summarizes says, improvement of the present invention is--the connected mode of bus controller and mainboard, that is and, bus controller 2 is card insert type structure (as shown in Figure 5), link to each other with mainboard by the bus interface on the mainboard, and communicate by letter with X86CPU on the mainboard based on the X86 architecture.
Because the host computer mainboard adopts general X86 architecture, therefore the bus controller of communicating by letter with slave computer must be designed to follow the card insert type structure of general mainboard interface standard.It is multiple to realize between card insert type structure and the mainboard that the mode of communicating by letter has, and this design is applicable to many popular main board bus interfaces at present, such as PCI, PC104PLUS, PCIE, preferably selects pci interface for use.These buses all have the speed height, and the characteristics that bandwidth is big can satisfy the needs that numerical control is controlled.
Bus controller can design agreement as mentioned as required, or the real-time serial field bus protocol of SERCOS III, ProfiBus.This bus controller can be to finish interpolation data between agreement and the numerical control software on the at present popular and general various mainboard plates, actual position feedback data, the digital control system state control data, digital control system feedback of status data, the digital control system configuration data, the PLC control data, the communication of system state feedback data.
And above-mentioned X86CPU, the major function of its CPU is to carry out computing and logical operation, its physical result comprises arithmetic logic unit, control module and storage unit composition.Comprise some registers in logical operation and control module, these registers are used for the temporary transient preservation of CPU in deal with data process data.Communicate by letter between the bridging chip on CPU and the mainboard, by the bridging chip access memory, the device on the external bus, and swap data are with it finished the function of every needs.In digital control system, the operation and the management of main complete operation system, the operation of numerical control software, control and management.In the numerical control software of realizing digital control system of the present invention, the cpu motherboard of X86 system has mainly been finished following control and management function: the demonstration of man-machine interface and management, embedded PLC software program management, configuration-system, parameter management, data base administration, NC program editing and explanation, telecommunication management; Motion control, process control, logic control, task scheduling, axle control.
As shown in Figure 6, bus controller generally speaking comprises following module:
1, the PC bus control module 62
Mainly according to the main board bus type that adopts, with the interpolation data that host computer sends over, the digital control system configuration data, data parsing such as PLC control data also is put into the data cache district according to established form, waits for that the numerical control bus protocol section reads; Read the system state actual position feedback data that last bus interpolation cycle returns from this data cache district simultaneously, the digital control system state control data, digital control system feedback of status data, the system state feedback data also feeds back to upper motion control software with these data by the main board bus interface.Under the optimal way, select pci interface for use, therefore the PC bus control module can be called pci bus control module 62.
2, numerical control bus protocol analysis module 63
Mainly will read the data of coming from the fast data buffer district and carry out format conversion, and be configured in the message of real-time numerical control bus and go, and send to the next slave unit; And, wait for that the host computer bus reads being stored in cache memory section according to established form from the slave unit feedback data.
3, cache memory section 61
This part mainly is made up of high-speed memory, and this part is mainly used to exchange high-speed interpolation and PLC control data, and the position data feedback, also has other status informations.
4, the Physical layer control module 64
Mainly finish the control of physical chip, parallel real-time bus protocol data is changed into high-speed real-time serial bus protocol data, and these data are sent to bus network get on; Receive the high-speed real-time serial data of bus network feedback simultaneously and they are changed into parallel data and give numerical control bus protocol analysis part.
5, physical layer interface 68
Main mutual conversion, transmission, the reception of being responsible for parallel data to serial data.Under the optimal way, this controller Physical layer is based on the 100M ethernet physical layer, and transmission medium is a category 5 twisted pair, and interface adopts ethernet physical layer interface RJ-45, and has designed strict Error Control.
6, the digital control system enable module 65
Its function mainly is the reliability and the security of strengthening system.Whether whether the state of mainly considering digital control system aspect reliability is normal, break down.Whether the operating personnel that the security aspect is primarily aimed at digital control system exist potential danger.Except that needs detect the situation of main equipment, slave unit power supply, to detect also that host computer is soft, the ruuning situation of hardware two aspects, and the situation that detects the slave unit various piece.Therefore, the load mode of information is: 1, receive the data from slave unit by physical layer interface, Physical layer control module, bus protocol analysis module successively; 2, by the data of described PC bus control module reception from host computer.When host computer and slave unit detect when all passing through, enable module 65 is directly sent the servo-drive system enable signal by interface.Simultaneously, this module can also be under detected state, and the heavy current installation to detecting sends the signal of cutting off the electricity supply.Thereby this module is convenient to reliability and security that the deviser of lathe better improves the numerically-controlled machine system.
7, the lathe data storage area 67
The current up-to-date configuration data of main storage lathe.
Represented also among the figure that necessary power management module 66 is no longer given unnecessary details for conventional module.
During work, the X86CPU on the mainboard delivers to data buffer area by the PC bus control module with data; Bus protocol analysis module 63 visit data buffer areas 61 obtain data and also are translated into the instruction that meets bus protocol, rely on physical layer interface 68 that data are mail to slave unit by Physical layer control module 64 again.
And the hardware implementation method of above-mentioned bus controller is various informative, as long as can observe the function of above-mentioned module.Can adopt following scheme: the mode of the protocol controller of the mode of the mode of the mode of the mode of main board bus bridge and DSP combination, main board bus bridge and ARM combination, main board bus bridge and high-speed microprocessor combination, main board bus bridge and FPGA combination, main board bus conversion chip and customization, employing FPGA monolithic are realized the mode of main board bus bridge and numerical control bus protocol conversion.
Based in real time, flexibly, at a high speed and the consideration of extensibility, because FPGA flexibility of programming, bus controller of the present invention is preferred high capacity on-chip integration system FPGA realization pci bus control module 62, bus protocol analysis module 63, Physical layer control module 64, programming by hardware description language, can be gone out bus protocol (self-defined) by design flexible, SERCOS III, the controller of ProfiBus.Net bus protocol, and need not to change hardware design.
In addition, machine tool keyboard is to control as a standard PLC equipment, follows the bus that digital control system is supported between the soft PLC supervisory routine of this PLC and cnc system software, realizes real-time Communication for Power by above-mentioned bus controller.Because machine tool keyboard requires than higher response speed, therefore on the bus controller that the present invention uses, done particular design on the one hand at this, for machine tool keyboard is reserved an independent bus interface, and be the highest response of this Interface design and the priority of processing, guarantee the real-time of the data interaction between machine tool keyboard and the host computer.Therefore as shown in Figure 6, physical layer interface 68 comprises interface, interface that data are returned and the physical layer interface that is used for directly being connected machine tool keyboard that is used for the data transmission at least.
The above; only be the preferable embodiment of the present invention; but protection scope of the present invention is not limited thereto; anyly be familiar with those skilled in the art in the technical scope that the present invention discloses; be equal to replacement or change according to technical scheme of the present invention and inventive concept thereof, all should be encompassed within protection scope of the present invention.
Claims (7)
1, a kind of based on full digital ring bus formula general numerical control system, comprise main equipment and slave unit; Described main equipment comprises host computer (1) and the bus controller (2) that numerical control software is housed; Described slave unit comprises number bus formula servo-driver (3) and PLC, it is characterized in that, thereby described main equipment is connected in series 1-24 slave unit successively and connects back main equipment and constitutes a closed circuit, the link transmission data by being connected with transmission medium with Physical layer between described main equipment and the slave unit; In normal operation, data one-way transmission;
Wherein, described host computer (1) adopts the universal architecture mainboard, and described bus controller (2) is the card insert type structure, links to each other with mainboard based on the X86 architecture by the bus interface on the mainboard, and communicates by letter with X86CPU on the described mainboard.
2, according to claim 1ly it is characterized in that based on full digital ring bus formula general numerical control system the mainboard interface that is used for described bus controller (2) is PCI, PC104PLUS or PCIE interface.
3, according to claim 1ly it is characterized in that based on full digital ring bus formula general numerical control system the mainboard interface of described bus controller (2) is a pci interface.
4, according to claim 3ly it is characterized in that based on full digital ring bus formula general numerical control system,
Described bus controller (2) comprises power management module (66), pci bus control module, bus protocol analysis module (63), data buffer area (61), connects Physical layer control module (64), lathe data storage area (67) of physical layer interface (68);
Wherein, the X86CPU on the described mainboard delivers to described data buffer area (61) by described pci bus control module with data; Described bus protocol analysis module (63) is visited described data buffer area (61), obtains data and is translated into the instruction that meets bus protocol, relies on physical layer interface (68) that data are mail to slave unit by described Physical layer control module (64) again;
From the feedback information of slave unit, deliver to described data buffer area (61) by described physical layer interface (68), Physical layer control module (64), bus protocol analysis module (63) successively; Host computer is visited described data buffer area (61) by PC bus control module (62) and is obtained data;
Described lathe data storage area (67) is used to store the current up-to-date configuration data of lathe, by described PC bus control module (62) and host computer interaction data.
5, according to claim 4 based on full digital ring bus formula general numerical control system, it is characterized in that described pci bus control module (62), bus protocol analysis module (63), Physical layer control module (64) realize by on-chip integration system FPGA.
6, according to claim 5ly it is characterized in that based on full digital ring bus formula general numerical control system described physical layer interface (68) is the ethernet physical layer interface.
7, according to claim 6 based on full digital ring bus formula general numerical control system, it is characterized in that described physical layer interface (68) comprises interface, interface that data are returned and the ethernet physical layer interface that is used for directly being connected machine tool keyboard that is used for the data transmission.
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| CNA2007100100584A CN101013315A (en) | 2007-01-15 | 2007-01-15 | General numerical control system based on full digital ring bus |
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