CN101000901A - Chip package structure and manufacturing method thereof - Google Patents

Abstract

The present invention is a chip packaging structure and a manufacturing method thereof. The chip packaging structure at least includes a carrier and a chip disposed on the carrier. The carrier at least includes a heat dissipation pad, a plurality of lead pins and at least two support bars, wherein the heat dissipation pad has a bearing surface. In addition, the chip includes a plurality of solder balls and is flip-chip bonded to the heat dissipation pad, the lead pins and the support bars of the carrier.

Description

Chip package structure and manufacturing method thereof

technical field

The present invention relates to a chip packaging structure and a manufacturing method thereof, and in particular to a quad flat no-lead (QFN) packaging structure and a manufacturing method thereof.

Background technique

With the increasing integration of integrated circuits and the demand for high-performance electronic products, packaging technology is driven to develop in the direction of increasing packaging density, reducing package size, and shortening transmission distance to meet the size reduction of integrated circuit components. and the trend of continuous growth of input/output (Input/Output; I/O) numbers.

There are many types of packaging for integrated circuits, and a very common packaging type is to provide a lead frame first, wherein the lead frame has a chip holder and a plurality of leads disposed on the periphery of the chip holder. Next, the chip is attached to the chip holder and the peripheral pins by using the solder balls provided on the chip. Subsequently, the chip, the chip seat, and a part of the lead are covered with a sealing material, and the space between the chip and the chip seat is filled, so as to complete the packaging of the chip. The packaged chip can be electrically connected with external components through solder balls and leads.

Please refer to FIG. 1 , which is a top view of a conventional lead frame. The lead frame 100 is mainly composed of a chip holder 106 , several guide pins 102 and a connection frame 108 , wherein the connection frame 108 is generally a frame structure and surrounds the periphery of the chip holder 106 and the guide pins 102 . In addition, one end of the leads 102 surrounds the die paddle 106 , and the other end of the leads 102 extends to engage with the connection frame 108 . In some package structures, the chip base 106 also has a heat dissipation function, and can be called a heat dissipation pad. In order to support the die holder 106 , the lead frame 100 further has four supporting bars (Supporting Bars) 104 extending inwardly from four corners of the connecting frame 108 of the lead frame 100 to connect with the die holder 106 to support the die holder 106 .

However, the existence of these support bars 104 occupies the space of the four corners of the lead frame 100, so that the guide pins 102 cannot be arranged at the four corners of the lead frame 100, which not only wastes the space of the lead frame 100, but also affects the wires. The architectural design of rack 100 poses limitations.

Contents of the invention

The purpose of the present invention is to provide a chip packaging structure, in which the support bars of the heat dissipation pad in the lead frame can be used as normal guide pins, so the space of the lead frame can be used more efficiently.

Another object of the present invention is to provide a method for manufacturing a chip package structure, which uses the guide pins in the lead frame as the support bars for the heat dissipation pad, thereby reducing the design constraints of the lead frame and facilitating the design of the lead frame .

According to the above objectives of the present invention, the present invention proposes a chip packaging structure, which at least includes a carrier and a chip disposed on the carrier. The aforementioned carrier at least includes: a heat dissipation pad with a bearing surface; several guiding feet; and at least two supporting bars. The chip at least includes several solder balls and is flip-chip bonded to the heat dissipation pad, guide pins and support bars of the carrier.

According to the purpose of the present invention, the present invention proposes a lead frame structure, which at least includes: a heat dissipation pad with a bearing surface suitable for receiving chips; a plurality of guide pins; and at least two support bars to support the above heat dissipation pad, And these support bars are suitable for electrical connection with the chip, and these support bars are located in the area outside the corner area of the lead frame.

According to another object of the present invention, the present invention provides a method for manufacturing a chip packaging structure, which at least includes the following steps. Firstly, a carrier is provided, which at least includes: a heat dissipation pad having a bearing surface; several guide pins and at least two support bars connected to the heat dissipation pad. Next, a chip is provided, the chip at least includes several solder balls disposed on a surface of the chip; the chip is bonded on the aforementioned carrier, wherein the chip is electrically connected to the heat dissipation pad, the guide pin and the support bar through these solder balls .

Compared with the prior art, because the support bar of the heat dissipation pad in the lead frame of the chip packaging structure is the same as the guide pin of the lead frame, it can also be used as a normal guide pin, so the existence of the support bar will not reduce the lead frame. The number of guide pins can achieve the purpose of using the space of the lead frame more effectively. In addition, the manufacturing method of the present chip packaging structure utilizes the guide pins in the lead frame as the supporting bars of the heat dissipation pad, so that it can avoid restricting the design of the lead frame and facilitate the design flexibility of the lead frame.

The present invention will be further described below in conjunction with the accompanying drawings and embodiments.

Description of drawings

FIG. 1 is a top view of a conventional lead frame.

Fig. 2 is a top view of a lead frame according to a preferred embodiment of the present invention

FIG. 3 is a cross-sectional view of a chip packaging structure according to a preferred embodiment of the present invention.

FIG. 4 is a cross-sectional view of a chip packaging structure according to another preferred embodiment of the present invention.

Detailed ways

Relevant detailed description and technical contents of the present invention are as follows now in conjunction with the accompanying drawings:

The invention discloses a chip package structure and a manufacturing method thereof. The chip package structure is a four-sided flat package structure without leads. In order to make the description of the present invention more detailed and complete, reference may be made to the following description together with the illustrations in FIGS. 2 to 4 .

Please refer to FIGS. 2 to 4 , wherein FIG. 2 is a top view of a lead frame according to a preferred embodiment of the present invention, and FIGS. 3 and 4 are two different chip packaging structures according to a preferred embodiment of the present invention. sectional view. The chip packaging structure of the present invention has a carrier, such as a lead frame 200 , whose main function is to carry a chip 210 , as shown in FIGS. 3 and 4 . In the chip packaging structure of the present invention, the lead frame 200 is mainly composed of a thermal pad 206 and a plurality of leads 202 , wherein the leads 202 are joined by a frame-shaped connection frame 208 on the outer edge of the lead frame 200 . In the present invention, the heat dissipation pad 206 is a chip carrier with heat dissipation function, and the heat dissipation pad 206 has a carrying surface 216 and a heat dissipation surface 218 , wherein the carrying surface 216 and the heat dissipation surface 218 are located on opposite sides of the heat dissipation pad 206 . Generally, the heat dissipation pad 206 is located in the central area of the lead frame 200 , and the guide pins 202 extend from the connecting frame 208 on the outer edge of the lead frame 200 toward the central area of the lead frame 200 and surround the periphery of the heat dissipation pad 206 . That is, one end of the guide pins 202 is engaged with the connection frame 208 , and the other end surrounds the periphery of the heat dissipation pad 206 , so the guide pins 202 are generally located at the periphery of the lead frame 200 , as shown in FIG. 2 . There are at least two supporting bars 204 among the guide pins 202 , one end of the supporting bars 204 is engaged with the connecting frame 208 , and the other end is extended toward the heat dissipation pad 206 and engaged with the heat dissipation pad 206 to support the heat dissipation pad 206 . Wherein, at least two support bars 204 are required to stably support the cooling pad 206 , but the number of support bars 204 is preferably four. It is worth noting that although in this embodiment, the lead frame 200 has four support bars 204, and these four support bars 204 extend at the four corners of the lead frame 200, but the support bars used in the present invention The number of 204 only needs to be able to stably support the cooling pad 206, and is not limited to the above, and the support bar 204 does not need to be arranged in the corner area of the lead frame 200, and the support bar 204 of the present invention can be installed from the guide pin 202 according to the design requirements. Choose arbitrarily in the appropriate position.

In a preferred embodiment of the present invention, the support bars 204 each have connection portions 220, and these connection portions 220 extend from the upper surface 224 of the support bar 204 and engage with the sides of the cooling pad 206, these connection portions 220 The upper surface of the upper surface is adjacent to the bearing surface 216, as shown in FIG. 3 . In another preferred embodiment of the present invention, the support bar 204 also has connection portions 222, and these connection portions 222 extend from the lower surface 226 of the support bar 204 and engage with the sides of the cooling pad 206, these connections The lower surface of portion 220 is adjacent to heat dissipation surface 218 as shown in FIG. 4 .

Please refer to FIG. 3 and FIG. 4 at the same time, a plurality of solder balls 212 are disposed at predetermined positions on a surface 214 of the chip 210 , wherein the solder balls 212 include signal solder balls, ground solder balls, or power solder balls of the control chip 212 . The chip 210 is arranged on the central area of the lead frame 200, and the chip 210 can be attached to the lead frame 200 in a flip-chip manner through the solder balls 212 on the chip 210, and most of the chips 210 are located on the bearing surface 216 of the heat dissipation pad 206 On the other hand, a small part of the chip 210 covers the end of all the leads 202 adjacent to the thermal pad 206 . Some of these solder balls 212 are attached to the bearing surface 216 of the heat dissipation pad 206 , while other solder balls 212 are respectively attached to the upper surfaces 224 of all the leads 202 including the support bars 204 . A feature of the present invention is that in the chip packaging structure, all the leads 202 including the support bars 204 are bonded to the solder balls 212 on the chip 210 respectively, so that all the leads 202 are electrically connected to the chip 210 .

In the present invention, the support bars 204 can be electrically connected to the signal solder balls of the solder balls 212 of the chip 210 that control the general functions of the chip 212, and can also be connected to the ground solder balls, power solder balls, or ground solder balls in these solder balls 212. The solder ball and the power solder ball are electrically connected. When the support bar 204 is electrically connected to the signal solder ball of the control chip 212 in the solder ball 212, after the subsequent flip-chip step, the connection portion 220 ( FIG. 3 ) or the connection portion 222 ( FIG. 4 ) of the support bar 204 needs to be cut off. , so as to cut off the electrical connection between the support bar 204 and the heat dissipation pad 206 . However, when the support bars 204 are electrically connected to the ground solder balls and/or power solder balls in the solder balls 212, there is no need to connect the connection portions 220 ( FIG. 3 ) or the connection portions of the support bars 204 after subsequent flip-chip steps. 222 (FIG. 4) cut off. The encapsulant 224, 228 covers the chip 210, part of the heat dissipation pad 206, and a part of each lead 202, and fills the space between the chip 210 and the heat dissipation pad 206 and the chip 210 and the lead 202, and exposes The heat dissipation surface 218 of the heat dissipation pad 206 and the lower surface 226 of each lead 202 are shown in FIGS. 3 and 4 . The encapsulant 224 exposes the heat dissipation surface 218 of the heat dissipation pad 206 to facilitate heat dissipation of the chip 210

In the chip packaging structure of the present invention, since all the guide pins 202 including the support bars 204 are electrically connected to the solder balls 212 on the chip 210 respectively, and the support bars 204 are connected to the signal solder balls in the solder balls 212, Any one of the ground solder balls and the power solder balls is electrically connected, so the support bar 204 is the same as the other pins 202 , and is also a normal wire pin with functions. In this way, the existence of the support bar 204 will not waste the space of the lead frame 200 , and will not affect the flexibility of the design of the lead frame 200 .

When making the chip package structure of the present invention, first provide the lead frame 200 as shown in FIG. , ground solder balls, and power solder balls. Next, a flip chip step is performed, whereby the chips 210 are attached to the central area of the lead frame 200 by using the solder balls 212 , wherein most of the chips 210 are located on the bearing surface 216 of the heat dissipation pad 206 of the lead frame 200 , A small part of the chip 210 covers one end of all the leads 202 near the thermal pad 206 . Some solder balls 212 are attached to the bearing surface 216 of the thermal pad 206 , while other solder balls 212 are respectively attached to the upper surface 224 of the lead pin 202 , as shown in FIGS. 3 and 4 .

The support bar 204 can be electrically connected to the signal solder ball, the ground solder ball, or the power solder ball of the control chip 212 among the solder balls 212 of the chip 210 . When the support bar 204 is electrically connected to the signal solder ball in the solder ball 212, and the connection portion 220 of the support bar 204 is extended from the upper surface 224 of the support bar 204 and bonded with the side of the heat dissipation pad 206, and the connection portion When the upper surface of 220 is adjacent to the bearing surface 216 (as shown in FIG. 3 ), before the subsequent sealing step, the connecting portion 220 of the support bar 204 must be fused by using, for example, laser to cut off the support bar 204 and the heat dissipation. electrical connection between the pads 206 . On the other hand, when the support bar 204 is electrically connected to the signal solder ball of the control chip 212 in the solder ball 212, and the connecting portion 220 of the support bar 204 is extended from the lower surface 226 of the support bar 204 and bonded to the heat dissipation pad 206 When the side of the connecting portion 220 is adjacent to the heat dissipation surface 218 of the heat dissipation pad 206 (as shown in FIG. 4 ), the connection of the support strip 204 can be connected to the support strip 204 by using, for example, laser after the subsequent sealing step. The portion 222 is fused to cut off the electrical connection between the support bar 204 and the heat dissipation pad 206 . However, when the support bar 204 is electrically connected to the ground solder ball and/or the power supply solder ball in the solder ball 212, it is not necessary to cut off the connection portion 220 ( FIG. 3 ) or the connection portion 222 ( FIG. 4 ) of the support bar 204 , and Proceed to the subsequent sealing steps.

Subsequently, the encapsulation step is carried out, and the encapsulant 224, 228 is provided to cover the chip 210, part of the heat dissipation pad 206, and a part of each lead 202, and fill the chip 210 and the heat dissipation pad 206 as well as the chip 210 and lead leads. 202 , and expose the heat dissipation surface 218 of the heat dissipation pad 206 and the lower surface 226 of each lead 202 , as shown in FIGS. 3 and 4 . Wherein, the encapsulant 224 exposes the heat dissipation surface 218 of the heat dissipation pad 206 to facilitate heat dissipation of the chip 210 . So far, the fabrication of the chip packaging structure of the present invention has been roughly completed

It can be seen from the above-mentioned preferred embodiments of the present invention that one advantage of the present invention is that the support bars of the heat dissipation pad in the lead frame of the chip packaging structure are the same as the guide pins of the lead frame, and can also be used as normal guide pins, so the support The existence of the strips does not reduce the number of guide pins of the lead frame, but can achieve the purpose of using the space of the lead frame more effectively.

It can be seen from the above-mentioned preferred embodiments of the present invention that another advantage of the present invention is that the manufacturing method of the chip package structure uses the guide pins in the lead frame as the support bars of the heat dissipation pad, so that it can avoid the design of the lead frame. constraints while contributing to leadframe design flexibility.

Claims (14)

1. A chip packaging structure, comprising at least a carrier and a chip; the carrier at least includes a heat dissipation pad with a bearing surface, several guide pins and at least two support bars; the chip is configured on the carrier, wherein The chip includes several solder balls and is flip-chip bonded on the thermal pad and the guide pins of the carrier; the feature is that: the chip solder balls are also flip-chip bonded to the support bars. 2. The chip packaging structure according to claim 1, further comprising a packaging compound covering the chip and part of the carrier, and exposing part of the guide pins, part of the support bars and part of the heat dissipation pad. 3. The chip packaging structure as claimed in claim 1, wherein the support bar is connected to support the heat dissipation pad. 4. The chip package structure according to claim 3, wherein the solder balls include several ground solder balls and several power supply solder balls, and the support bars are electrically connected to the ground solder balls and/or or these power solder balls. 5. The chip package structure according to claim 3, wherein the heat dissipation pad has a heat dissipation surface, the heat dissipation surface is opposite to the bearing surface, and each of the support bars has a connecting portion and a side of the heat dissipation pad The upper surface of the connection part is adjacent to the bearing surface or the lower surface of the connection part is adjacent to the heat dissipation surface. 6. The chip package structure as claimed in claim 1, wherein the support bars are separated from the thermal pad. 7. The chip package structure according to claim 6, wherein the solder balls include a plurality of signal solder balls, and the support bars are electrically connected to the signal solder balls. 8. A lead frame structure, which at least includes a heat dissipation pad with a bearing surface suitable for receiving a chip, a plurality of guide pins, and at least two support bars supporting the heat dissipation pad; it is characterized in that: these support bars It is suitable for electrical connection with the chip, and the support bars are located outside the corner area of the lead frame. 9. A method for manufacturing a chip package structure, comprising the following steps: providing a carrier comprising at least one heat dissipation pad with a bearing surface, several guide pins, and at least two support bars connected to the aforementioned heat dissipation pad; providing A step of a chip, the chip at least including a plurality of solder balls disposed on a surface of the chip; and a step of bonding the chip on the lead frame structure, wherein the chip is connected via the solder balls and the thermal pad, the The lead pins are electrically connected; the feature is that in the step of bonding the chip on the lead frame structure, the chip is electrically connected with the support bar through solder balls. 10. The manufacturing method of the chip package structure according to claim 9, wherein the bonding method is through a reflow step, so that the solder balls are bonded to the thermal pad, the guide pins and the support bars superior. 11. The manufacturing method of a chip package structure according to claim 9, characterized in that: after the step of bonding the chip on the carrier, further comprising a molding step, encapsulating the chip, some of the leads, Part of the support strips and part of the heat dissipation pad exposes part of the guide pins, part of the support strips and part of the heat dissipation pad. 12 . The method for manufacturing a chip package structure according to claim 11 , further comprising a step of separating the support bars from the heat dissipation pad after the molding step. 13 . 13. The manufacturing method of the chip packaging structure according to claim 11, characterized in that: after the step of bonding the chip on the carrier and before the step of sealing the mold, further comprising a step of separating the support bars from the heat sink Pad steps. 14. The method for manufacturing a chip package structure as claimed in claim 13, wherein the step of separating the support bars from the thermal pad comprises cutting or etching.

Images