CN100476794C - A four-way server motherboard - Google Patents

Abstract

A four-way server motherboard provided by the present invention includes four processors, storage modules, peripheral input/output components, an extended external device interconnection bridge chip, a south bridge chip, and an external device connected by an extended external device interconnection bus. Devices interconnect devices. By adopting the NUMA structure, the system bottleneck caused by the shared system bus and storage bus of the multi-processor system is solved. The configuration method of the expansion slot of the storage module on each processor allows the user to expand reasonably, which improves the availability of the server; the user can according to the need Choose the working mode and frequency of the PCIX bus by yourself, which improves the scalability of the server; the monitoring port provides an effective monitoring system solution, which together with the identification and indication circuit strengthens the manageability and reliability of the server, especially enhances the Manageability in clustered applications.

Description

A four-way server motherboard

technical field

The invention relates to the technical field of computer servers, in particular to a four-way server motherboard.

Background technique

The server is a special special-purpose computer that provides various services for the client in the network environment. In the network, the server undertakes key tasks such as data storage, transmission and processing. Servers can be divided into two types: Reduced Instruction Set Computer (RISC) and Complex Instruction Set Computer (CISC). Servers with X86 instruction set belong to CISC. In the server market with less than eight channels, servers with X86 instruction set have strong competitiveness. Usually, the "four characteristics" can be used to measure the quality of a server, that is, scalability, availability, manageability, and availability. Scalability refers to the ability of the server hardware to be flexibly configured according to needs; availability refers to the fault tolerance and reliability of the server; manageability refers to whether the server is easy to manage and maintain; from the perspective of hardware, availability is Refers to whether the processing capacity of the server meets the workload. The motherboard is the core component of the server, and as the platform of the entire system, it determines the characteristics of the server.

Availability is an index relative to application requirements, and different applications require different server processing capabilities. Currently, 1-2-way X86 servers are suitable for enterprise firewalls, cache and load balancing servers, and Web servers. 2-4 way servers are suitable for Web servers and application servers with heavy workload. 4-8 way servers are suitable for background database and storage servers. There is not a complete linear relationship between the performance of the server and the number of processors, that is, a four-socket server cannot achieve four times the computing performance of a one-socket server. The improvement of multi-way server performance is mainly affected by two aspects of program parallelism and system architecture. For example, in the most common bus-based SMP structure of the X86 system, it consists of multiple processors, storage controllers, storage modules, bridges, and I/O components. These processors are connected to the storage controller by a set of buses. The bus is shared in a time-division multiplexing manner, and the required instructions and data are obtained from the memory module. The defect of this structure is that when the number of processors increases, it will form a bottleneck of system performance growth. For a four-socket server, the impact of this bottleneck is already quite significant.

Being a server also requires high availability. Because the server is facing users of the entire network, as long as there may be users in the network, the server should be able to provide services. There are two aspects to improving availability. One is to correct errors and avoid damage through redundant design, such as ECC memory, redundant power supply, etc.; the other is to avoid failures as much as possible, such as using components with low failure rates and improving the working environment of servers wait. The monitoring system of the server can monitor the working environment of the server, so as to avoid failures caused by factors in the working environment. At the same time, the monitoring system can also improve the manageability of the server, especially in cluster applications, the monitoring system can make the management of the server from messy and cumbersome to centralized and efficient.

Currently, the motherboards on the market cannot directly support the application of the monitoring system from the hardware, and the use of the monitoring system usually requires changing the wiring in the server and providing corresponding software support. This bloats the system and sometimes consumes processor resources. Especially in the server cluster application, there is a very prominent requirement on the manageability of the server, but the design of the general server is not optimized for this application.

Contents of the invention

Technical problem to be solved by the present invention Aiming at the bottleneck of system performance growth and poor manageability of the four-way server system in the prior art, a four-way server motherboard is provided to improve the scalability, availability and manageability of the four-way server and availability.

In order to solve the above-mentioned technical problems, the present invention provides a four-way server motherboard, including four processors, storage modules, peripheral input/output components, extended external device interconnection bridge chip, south bridge chip, The external device interconnection device connected by the bus, in which the storage module is connected with the processor, and the peripheral input/output components are connected with the south bridge chip; between the processors, between the processor, the extended external device interconnection bridge chip and the south bridge chip The information is transmitted through the hypertransport bus, the storage module is a double-rate dual in-line memory module and the four processors are equipped with a double-rate dual-in-line memory module; one of the four processors has a boot The boot processor is equipped with four double-rate dual-in-line memory modules, and the other processor is equipped with two double-rate dual-in-line memory modules.

In the above scheme, the hypertransport-expanded external device interconnection bridge chip expands two sets of extended external device interconnection buses, and the south bridge chip expands an external device interconnection bus, a small number of pin buses, and an internal integrated circuit bus , universal serial bus and integrated drive electronics interface; the super input/output chip is connected with the south bridge chip through a small number of pin buses.

In the above scheme, the processor is an AMD Opteron processor.

In the above solution, the peripheral input/output unit is connected to the boot processor through the hypertransport bus, and the extended external device interconnection bridge AMD8131 is directly connected to the boot processor, and two sets of extended The external device interconnection bus, the bus frequency and working mode of each extended external device interconnection bus can be adjusted independently.

In the above solution, the four-way server main board further includes a monitoring port, and the monitoring port leads out signals such as the internal integrated circuit bus.

In the above solution, the monitoring port uses a 22-pin slot to be placed behind the external device interconnection bus slot and in a straight line with it, allowing the inserted monitoring card to use the signal of the external device interconnection bus.

In the above scheme, the monitoring port includes the following signals: clock and data signals of the keyboard, clock and data signals of the mouse, VGA video signal group, I ² C bus signal connected to the environment measurement module, power-on and reset signals.

In the above solution, the four-way server mainboard also includes an identification indicating circuit for identifying a certain server in the cluster, and the identification circuit is composed of the on-board circuit part and the off-board circuit part of the four-way server mainboard , the two parts of the circuit are connected through a 2-pin socket.

In the above solution, the on-board circuit part of the four-way server mainboard is located on the four-way server mainboard, and is composed of a resistor, a 2-pin socket, and a light-emitting diode connected in series. One end of the resistor is connected to a 5V standby power supply, and the light-emitting diode is connected in series. The anode is connected to the 2-pin socket, the cathode is connected to the power ground, and the light-emitting diode is located at the edge of the four-way server main board close to the rear panel of the chassis.

In the above scheme, the off-board circuit part is not on the main board, and consists of manual self-locking buttons, light-emitting diodes and 2-pin plugs. After the manual self-locking buttons and light-emitting diodes are connected in series, both ends are connected to the 2-pin plugs through wires, and manual self-locking button and

The LEDs are located on the front panel of the chassis.

As can be seen from the above, the present invention solves the system bottleneck caused by the shared system bus and storage bus of the multiprocessor system by adopting the NUMA structure, and the configuration method of the storage module expansion slot on each processor allows the user to expand reasonably, which improves the performance of the server. Usability; users can choose the working mode and frequency of the PCIX bus according to their needs, which improves the scalability of the server; the monitoring port provides an effective monitoring system solution, which together with the identification and indication circuit strengthens the manageability and performance of the server. Reliability, especially enhanced manageability in cluster applications.

Description of drawings

Fig. 1 is a four-way server motherboard structural diagram of the present invention;

Fig. 2 is a logic structure diagram of a mainboard of a four-way server according to an embodiment of the present invention;

Fig. 3 is the operating frequency and the mode adjustment circuit of the PCIX bus of the four-way server motherboard of the embodiment of the present invention;

Fig. 4 is the structural diagram of the monitoring slot of the four-way server motherboard of the embodiment of the present invention;

FIG. 5 is a circuit diagram of an identification indicator of a mainboard of a four-way server according to an embodiment of the present invention.

Detailed ways

The technical scheme of the present invention will be described in detail below in conjunction with the accompanying drawings.

Fig. 1 four-way server mainboard structure diagram of the present invention, as shown in the figure, four-way server mainboard comprises four processors 10, the storage module 20 that is connected with processor respectively, the peripheral equipment interconnection (PCIX) bridge chip 30 of expansion , south bridge chip 40, connect the PCIX/PCI equipment 50 of PCIX bridge chip 30 by PCIX bus and other I/O parts 60 that are connected with south bridge chip, wherein between processor, processor, PCIX bridge chip and south bridge chip Information is passed between them via the HyperTransport (HT) bus.

Fig. 2 shows a structural diagram of a mainboard of a four-way server in a specific embodiment of the present invention.

As shown in Figure 2, the motherboard includes four Opteron processors 1, double-rate dual in-line memory modules (DDR DIMMs) 2 respectively connected to the processors, hypertransport-extended peripheral interconnection (HT- PCIX) bridge chip 3, south bridge chip 4 and peripheral I/O components. Four Opteron processors 1, HT-PCIX bridge chips 3 and south bridge chips 4 are connected through a hypertransport (HT) bus. HT-PCIX bridge chip 3 expands two sets of PCIX buses, and south bridge chip 4 expands PCI bus, few pins (LPC) bus, inter-integrated circuit (I2C) bus, universal serial bus (USB bus) and integrated drive electronics Device (IDE) interface5. BIOS memory 6, superI/O is connected with the south bridge chip through the LPC bus. The monitoring port 7 leads out signals such as the I2C bus.

The four processors 1 are connected through the HT bus. The HT bus is 16 bits wide, operates at 800MHz, and has a bandwidth of 6.4GB/s. Each processor has directly connected memory modules and supports dual-channel operation. Since the bootstrap processor (BSP, Bootstrap Processor) is closest to the I/O channel, the large storage space is conducive to the improvement of performance, so it is connected with four double data rate (DDR) dual in-line memory modules (DIMM) expansion slots, and the remaining processors each have two DDR DIMMs. At present, the working frequency of each memory bus can reach 200MHz, and the bandwidth is 6.4GB/s when there are two channels. The memory bus bandwidth of this NUMA structure can be nearly four times that of the bus-based SMP, and the improvement of the system bus bandwidth is even greater, thereby avoiding the system performance that occurs when multiple processors share the system bus and memory bus bandwidth in the bus-based SMP bottleneck.

The expansion of the I/O channel is realized by connecting the bridge chip through the HT bus of the BSP. What directly links to each other with BSP physically is PCIX bridge, what used in the present invention is AMD8131. The HT bus between them is 16 bits wide, works at 800MHz, and has a bandwidth of 6.4GB/s. AMD8131 expands two PCIX buses, and the operating frequency and mode of the two PCIX buses can be set to suit different PCIX devices. One of the PCIX buses has two PCIX expansion slots, which can be inserted with a 133MHz PCIX card or two 100MHz or less PCIX or PCI cards. The other PCIX bus has a dual Gigabit Ethernet controller and an Ultra320SCIC controller, as well as two PCIX expansion slots, one of which can be inserted into a zero-channel cheap disk redundant array (ZCR) daughter card, and The Small Computer System Interface (SCIC) controller on the motherboard constitutes the Small Computer System Interface Redundant Array of Inexpensive Disks (SCIC RAID) control system.

The HT bus of AMD8131 is extended downwards and connected with the south bridge chip AMD8111. The HT bus between them is 8 bits wide, works at 200MHz, and has a bandwidth of 800MB/s. The south bridge is mainly responsible for the expansion and system management of low-speed I/O. A USB1.1 controller, an IDE controller and a 100M Ethernet controller are integrated in the south bridge, and the USB1.1 controller and the IDE controller are used in the invention to connect corresponding devices.

On one 32-bit PCI bus extended from the south bridge, a USB 2.0 controller, a Serial Advanced Technology Attachment (SATA) controller, a VGA display module and a PCI expansion slot are connected.

The LPC bus extended from the south bridge is connected with BIOS memory and c I/O, the BIOS memory is used to store BIOS, and the Super I/O is used to connect keyboard, mouse, serial port, parallel port and floppy drive.

The operating frequency and mode adjustment circuit of the PCIX bus is shown in Figure 3. The operating frequency and mode of the PCIX bus are modified by setting the voltage of the relevant pin of AMD8131. The two PCIX buses have independent configuration pins. Only one channel is shown in the figure, and the other channel is the same. The corresponding selection items are shown in the table below, where X means it has nothing to do with the state of this pin, 0 means high level, and 1 means low level. In the present invention, a group of switch circuits are used to set the voltages of these pins, and all the combinations in the application form can be obtained by setting these switches. For example, to set the PCIX bus to 133MHz, disconnect k1, k2, and k3, set GNT4#, GNT3# to low level, and PCIXCAP to high level.

GNT4# GNT3# PCIXCAP M66EN Operating mode working frequency x x ground 0 PCI 33.33MHz x x ground 1 PCI 66.67MHz x x intermediate voltage x PCI-X 66.67MHz 0 1 pull up x PCI-X 100.00MHz 0 0 pull up x PCI-X 133.33MHz

The monitoring port 7 uses a 22-pin slot of the same series as the PCI slot 20, which is placed behind the PCI slot 20 as an expansion part of the PCI, see accompanying drawing 4. The monitoring card can obtain power and other signals from the PCI interface. When the monitoring card is not used, the PCI slot can normally be inserted into the PCI card.

The signal is defined as follows:

A1 land B1 land A2 mouse data B2 red A3 mouse clock B3 land A4 land B4 green A5 keyboard data B5 land A6 keyboard clock B6 blue A7 land B7 power ground

A8 standby 5V power supply B8 line synchronization A9I²C bus clock B9 field synchronization A10I²C bus data B10 land A11 boot signal B11 reset signal

The logo indication circuit provided by the motherboard is shown in Figure 5, and light-emitting diodes are used as indicator lights. The devices in the dotted box are installed on the front panel of the chassis, K is the self-locking switch, and L1 is the light-emitting diode. The LED L2 on the motherboard is placed on the edge of the motherboard near the rear panel of the case and can be observed from the rear of the case. J is a two-pin socket, and K and L1 can be directly plugged into the main board. At this time, the indicator lights on the front and rear of the chassis can be switched on and off in manual mode; these two parts of the circuit can also be connected to the monitoring card through a 2-pin plug, and monitored by the monitoring system. Manually or automatically control the switch of the indicator light. For example, in a cluster, when the processor of a certain server is overheated, the monitoring system will alarm and light up the L1 and L2 of the server for easy search.

The present invention adopts non-uniform memory access (NUMA) structure, and in NUMA structure, the bar number of system bus and memory bus can increase along with the number of processor, therefore can avoid the symmetric multiprocessor (SMP) structure based on bus Bottlenecks caused by processors needing to share the same system bus and memory bus. The Opteron processor chip released by AMD has a storage controller and a high-speed inter-processor interconnection bus, which is suitable for forming a server with a NUMA structure. This processor is used to frame the system in the present invention.

The high-speed I/O expansion of the current server is mainly realized through the extended peripheral device interconnection bus/peripheral device interconnection (PCIX/PCI) expansion card, and the PCIX/PCI bus itself has multiple operating frequencies. In order to support as many expansion cards as possible, a set of PCIX/PCI bus frequency setting circuit is designed in the present invention, which can modify the working frequency of PCIX/PCI bus to meet the requirements of expansion cards.

In order to simplify the design of the monitoring system, a special interface is provided in the present invention. Utilizing this interface can realize a concise and effective monitoring system solution without consuming processor resources. In addition, the KVM system (keyboard, display, and mouse switching system) should be used in cluster applications to allow multiple servers to share a set of keyboards, mice, and displays. The existing keyboard, display, and mouse (KVM) systems require external circuits and multiple An external connection, the interface provided in the present invention also provides the signal required by the KVM system, the KVM circuit and the monitoring circuit can be made on a card and inserted in the chassis, and only one connecting cable is needed outside.

The monitoring port provides signals that support the following functions:

1. Support hardware monitoring system, which is used to read the voltage, temperature, fan speed and other values on the motherboard, and can alarm when the monitoring value exceeds the normal range. The main board contains sensors and detection devices, and the measured value can be obtained through the I ² C bus interface of the detection module on the main board. The derived signals are the clock signal and data signal of the I ² C bus.

2. Support KVM system, that is, keyboard, mouse and display switching system. The system can operate up to 1024 computers with a set of keyboards, mice, and monitors. For details, see the invention "KVM switch using bus structure". The signals derived are mouse clock, mouse data, keyboard clock, keyboard data, display output red, green, blue, line sync, field sync.

3. Support remote boot and reset of the server.

In order to find a certain server conveniently in the cluster application, the present invention also provides a set of server identification indicating circuit, which can identify the server by local manual or remote control.

The invention solves the system bottleneck caused by the multi-processor system sharing the system bus and the storage bus, and the configuration method of the storage module expansion slot on each processor allows the user to expand reasonably, which improves the usability of the server; the user can choose according to the needs The working mode and frequency of the PCIX bus improve the scalability of the server; the monitoring port provides hardware support for the monitoring system, and together with the identification and indication circuit, it enhances the manageability and reliability of the server, especially in cluster applications. manageability.

Finally, it should be noted that the above embodiments are only used to illustrate and not limit the technical solutions of the present invention, although the present invention has been described in detail with reference to the above embodiments, those of ordinary skill in the art should understand that: the present invention can still be modified Or an equivalent replacement, any modification or partial replacement without departing from the spirit and scope of the present invention shall fall within the scope of the claims of the present invention.

Claims (10)

1, a kind of four road server master boards, comprise four processors, memory module, peripheral I/O parts, it is characterized in that, also comprise the peripheral component interconnect equipment that the peripheral component interconnect bridge chip, South Bridge chip of expansion, the peripheral component interconnect bus by expansion connect, wherein memory module is connected with processor, and peripheral I/O parts are connected with South Bridge chip; Between the processor, transmit information by super transfer bus between the peripheral component interconnect bridge chip of processor, expansion and the South Bridge chip; Described memory module is that double digit rate dual inline memory module and four processors all are furnished with double digit rate dual inline memory module; In described four processors a bootstrap processor is arranged, described bootstrap processor is furnished with four double digit rate dual inline memory modules, and other processors are furnished with two double digit rate dual inline memory modules.

2, four road server master boards as claimed in claim 1, it is characterized in that, the peripheral component interconnect bridge chip of described expansion expands the peripheral component interconnect bus of two groups of expansions, and South Bridge chip expands peripheral component interconnect bus, a small amount of pin bus, internal integrate circuit bus, USB (universal serial bus) and integrated drive electronics interface; Super I/O chip connects with South Bridge chip by a small amount of pin bus.

3, four road server master boards as claimed in claim 1 or 2 is characterized in that, described processor is an AMD Opteron processor.

4, four road server master boards as claimed in claim 1, it is characterized in that, peripheral I/O parts are connected on the described bootstrap processor by described super transfer bus, that directly link to each other with described bootstrap processor is the peripheral component interconnect bridge AMD8131 of expansion, expand the peripheral component interconnect bus of two groups of expansions, the frequency and the pattern of the peripheral component interconnect bus of every group of expansion can independently be adjusted.

5, four road server master boards as claimed in claim 1 is characterized in that, described four road server master boards also comprise policing port, and described policing port is drawn the signal on the internal integrate circuit bus.

6, four road server master boards as claimed in claim 5, it is characterized in that, after described policing port uses the slot of one 22 pin to place the peripheral component interconnect slot, and in alignment with it, and the monitor card that permission is inserted uses the signal of peripheral component interconnect bus.

7, four road server master boards as claimed in claim 5, it is characterized in that, following signal is accepted or sent to described policing port: the clock of keyboard, data-signal, the clock of mouse, data-signal, the Video Graphics Array sets of signals, the internal integrated circuit bus signal of JA(junction ambient) measurement module, start, reset signal.

8, four road server master boards as claimed in claim 1, it is characterized in that, described four road server master boards also comprise a sign indicating circuit, be used at certain station server of group of planes sign, described marker circuit partly is made up of circuit part on the plate of described four road server master boards and plate external circuit, and two parts circuit links to each other by one 2 needle socket.

9, four road server master boards as claimed in claim 8, it is characterized in that, circuit part is positioned on described four road server master boards on the plate of described four road server master boards, form by resistance, 2 needle sockets, light emitting diode polyphone, the standby power of one termination 5V of resistance, the anode of light emitting diode is connected to 2 needle sockets, and negative electrode is connected to power supply ground, and light emitting diode is positioned at the position of described four road server master board edges near the cabinet rear panel.

10, four road server master boards as claimed in claim 8, it is characterized in that, plate external circuit part is not on mainboard, form by manual self-locking button, light emitting diode and 2 pin plugs, manually two ends, self-locking button and light emitting diode polyphone back are connected to 2 pin plugs by lead, and manually self-locking button and light emitting diode all are positioned on the front panel of cabinet.

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