[go: up one dir, main page]

CN100406979C - Electro-optical device, manufacturing method thereof, and electronic device - Google Patents

Electro-optical device, manufacturing method thereof, and electronic device Download PDF

Info

Publication number
CN100406979C
CN100406979C CN2006100082539A CN200610008253A CN100406979C CN 100406979 C CN100406979 C CN 100406979C CN 2006100082539 A CN2006100082539 A CN 2006100082539A CN 200610008253 A CN200610008253 A CN 200610008253A CN 100406979 C CN100406979 C CN 100406979C
Authority
CN
China
Prior art keywords
aforementioned
image signal
electro
counter electrode
line
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
CN2006100082539A
Other languages
Chinese (zh)
Other versions
CN1821841A (en
Inventor
村出正夫
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Seiko Epson Corp
Original Assignee
Seiko Epson Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Seiko Epson Corp filed Critical Seiko Epson Corp
Publication of CN1821841A publication Critical patent/CN1821841A/en
Application granted granted Critical
Publication of CN100406979C publication Critical patent/CN100406979C/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Images

Landscapes

  • Liquid Crystal (AREA)
  • Devices For Indicating Variable Information By Combining Individual Elements (AREA)

Abstract

本发明在液晶装置等电光装置中,能够极其有效地防止电荷残留于图像信号线、对向电极电位线的情况发生,电光装置,在基板上具备排列于像素区域的多个像素部,配置于位于像素区域的周边的周边区域而用来控制多个像素部的周边电路,以及用来向周边电路供给图像信号的图像信号线和用来供给接地电位的接地电位线。图像信号线经由比构成图像信号线和接地电位线的导电膜电阻高的膜所构成的放电电阻,电连接于接地电位线。

Figure 200610008253

In an electro-optical device such as a liquid crystal device, the present invention can extremely effectively prevent the charge from remaining on the image signal line and the counter electrode potential line. The peripheral area located in the periphery of the pixel area is used to control the peripheral circuit of the plurality of pixel parts, and the image signal line for supplying the image signal to the peripheral circuit and the ground potential line for supplying the ground potential. The video signal line is electrically connected to the ground potential line via a discharge resistor made of a film having a higher resistance than the conductive film constituting the video signal line and the ground potential line.

Figure 200610008253

Description

电光装置、其制造方法以及电子设备 Electro-optical device, manufacturing method thereof, and electronic device

技术领域 technical field

本发明涉及例如液晶装置等电光装置及其制造方法,以及具备该电光装置的,例如液晶投影机等电子设备的技术领域。The present invention relates to the technical fields of electro-optical devices such as liquid crystal devices, methods of manufacturing the same, and electronic equipment such as liquid crystal projectors equipped with the electro-optical devices.

背景技术 Background technique

在这种电光装置中,例如液晶等电光物质被夹持于一对基板间。在作为这些基板的一方的元件基板上,设置多个像素电极。此外,在作为这些基板的另一方的对向基板上设有与该多个像素电极对向的对向电极。进而,在元件基板上,设置用来驱动像素电极的数据线驱动电路、扫描线驱动电路等周边电路,从多个外部电路连接端子向周边电路引绕多条引绕布线。而且,像这样所构成的电光装置,在其完成时或交货时等,设置于能够供给电源和测试用的图像信号等的检查装置,进行其工作检查、工作调整。In such an electro-optical device, an electro-optic substance such as liquid crystal is sandwiched between a pair of substrates. On the element substrate which is one of these substrates, a plurality of pixel electrodes are provided. In addition, a counter electrode facing the plurality of pixel electrodes is provided on a counter substrate that is the other of these substrates. Furthermore, peripheral circuits such as a data line driver circuit and a scan line driver circuit for driving pixel electrodes are provided on the element substrate, and a plurality of routing wirings are routed from a plurality of external circuit connection terminals to the peripheral circuits. Then, the electro-optical device configured in this way is installed in an inspection device capable of supplying a power source, an image signal for testing, etc. when it is completed or delivered, and its operation inspection and operation adjustment are performed.

如果这种检查、调整结束,将电光装置从检查装置拆卸,则在电光装置的周边电路及布线上,残留基于各种信号的电荷。特别是,在图像信号线及对向电极电位线上,如果残存由图像信号、对向电极电位引起的电荷的话,则在像素电极及对向电极间,由于施加了直流电压,所以有时引起位于两电极间的液晶等烧接。或者,如果这种电荷残留,其后高精度地实施进一步实施的检查、调整变得困难。When the inspection and adjustment are completed and the electro-optical device is removed from the inspection device, charges based on various signals remain on peripheral circuits and wiring of the electro-optical device. In particular, if charges caused by the image signal and the potential of the counter electrode remain on the image signal line and the potential line of the counter electrode, a direct current voltage may be applied between the pixel electrode and the counter electrode, which may cause a voltage difference between the pixel electrode and the counter electrode. The liquid crystal between the two electrodes is burnt. Alternatively, if such charges remain, it becomes difficult to carry out further inspection and adjustment with high precision thereafter.

因此,在专利文献1中,提出了在电光装置的外部,经由电阻或短路用开关把连接于图像信号线的外部电路连接端子和连接于对向电极电位线的外部电路连接端子相互连接的技术。此外,在专利文献2中,提出了在电光装置的内部把所有引绕布线经由由构成像素开关用的薄膜晶体管(以下适当称为“TFT”)的半导体层所构成的内部电阻线连接于接地电位线等的技术。通过任一种技术,都能够去除如上所述的电光装置中的残留电荷。Therefore, Patent Document 1 proposes a technique in which an external circuit connection terminal connected to an image signal line and an external circuit connection terminal connected to a counter electrode potential line are connected to each other via a resistor or a short-circuit switch outside the electro-optical device. . In addition, in Patent Document 2, it is proposed to connect all routing lines inside the electro-optic device to the ground via an internal resistance line composed of a semiconductor layer constituting a thin-film transistor (hereinafter appropriately referred to as "TFT") for pixel switching. Potential lines, etc. technology. By either technique, residual charges in the electro-optic device as described above can be removed.

【专利文献1】专利第3173200号公报[Patent Document 1] Patent No. 3173200

【专利文献2】专利第3240829号公报[Patent Document 2] Patent No. 3240829

但是,如果用专利文献1中所公开的技术,则在端子间连接图像信号线所连接的端子,与接地电位线所连接的端子。因而,有必要在电光装置的外部,设置这种连接用的电阻或短路开关。进而,如果应用此一技术,在基板上形成连接用的电阻或短路开关,则在有限的基板上的区域上,确保用来形成这些的区域成为困难。特别是在小型的电光装置,或对基板来说图像显示区域为大型的电光装置的场合,确保这种区域非常困难。进而,假如在基板上区域中在小的区域上形成放电电阻的话,也就是说,如果形成微小尺寸的放电电阻,则因静电的存在,该微小尺寸的放电电阻被静电破坏的可能性变高。特别是,在经由层间绝缘膜把微小尺寸的放电电阻的上层侧或下层侧布线其他布线的场合,就经由层间绝缘层构成了电容器结构,在此一部分放电电阻被静电破坏的可能性变得极高。结果,在电光装置内像专利文献1中所公开的那样,形成电阻或短路开关招致基板、装置总体的大型化,或者,招致静电破坏引起的装置的不良化,因此实践上是极其不利的。However, according to the technique disclosed in Patent Document 1, the terminal connected to the video signal line and the terminal connected to the ground potential line are connected between the terminals. Therefore, it is necessary to provide such connection resistors or short-circuit switches outside the electro-optical device. Furthermore, if this technique is applied to form connection resistors and short-circuit switches on the substrate, it will be difficult to secure an area for forming these in a limited area on the substrate. Especially in the case of a small electro-optical device or an electro-optical device in which the image display area is large relative to the substrate, it is very difficult to secure such an area. Furthermore, if the discharge resistor is formed on a small area in the region on the substrate, that is, if the discharge resistor is formed in a minute size, the possibility that the discharge resistor of the minute size is destroyed by static electricity becomes high due to the presence of static electricity. . In particular, when other wires are wired on the upper or lower side of the discharge resistor with a small size through the interlayer insulating film, a capacitor structure is formed through the interlayer insulating layer, and the possibility of a part of the discharge resistor being destroyed by static electricity becomes smaller. extremely high. As a result, forming a resistor or a short-circuit switch in an electro-optic device as disclosed in Patent Document 1 leads to an increase in the size of the substrate and the device as a whole, or leads to deterioration of the device due to electrostatic breakdown, which is extremely disadvantageous in practice.

另一方面,如果用专利文献2中所公开的技术,则由于在用于薄膜晶体管的膜处形成放电电阻,所以设计自由度极端降低。由此,在基板上的有限的区域内,形成适当的高电阻的放电电阻,或者在很小的区域内形成适当的高电阻的放电电阻是困难或实践上不可能的。也就是说,由于用同一膜,所以在与对像素开关用的薄膜晶体管所要求的性能等的关系上,关于能够形成的电阻值、面积或位置的制约非常大。另外,通过此一技术,也与上述专利文献1的场合同样,假如形成微小尺寸的放电电阻的话,则被静电破坏的可能性变高。On the other hand, if the technique disclosed in Patent Document 2 is used, since the discharge resistance is formed at the film for the thin film transistor, the degree of freedom in design is extremely reduced. Therefore, it is difficult or practically impossible to form an appropriately high-resistance discharge resistor in a limited area on the substrate, or to form an appropriately high-resistance discharge resistor in a small area. That is, since the same film is used, there are very large restrictions on the resistance value, area, and position that can be formed in relation to the performance and the like required for the thin film transistor for pixel switching. Also, with this technique, as in the case of Patent Document 1, if a discharge resistor with a minute size is formed, the possibility of being destroyed by static electricity increases.

发明内容 Contents of the invention

本发明是鉴于上述问题而作成的,目的在于提供能够极其有效地防止电荷残留于图像信号线、对向电极电位线的电光装置及其制造方法,以及,具备这种电光装置的电子设备。The present invention has been made in view of the above problems, and an object of the present invention is to provide an electro-optical device capable of extremely effectively preventing charge remaining on image signal lines and counter electrode potential lines, a manufacturing method thereof, and an electronic device equipped with such an electro-optic device.

本发明的电光装置为了解决上述问题,在基板上具备:排列于像素区域的多个像素部,配置于位于前述像素区域的周边的周边区域而用来控制前述多个像素部的周边电路,以及用来向前述周边电路供给图像信号的图像信号线和用来供给接地电位的接地电位线,前述图像信号线经由由比构成前述图像信号线和前述接地电位线的导电膜高电阻的膜所构成的放电电阻,电连接于前述接地电位线。In order to solve the above-mentioned problems, the electro-optical device of the present invention includes, on a substrate, a plurality of pixel units arranged in a pixel region, a peripheral circuit disposed in a peripheral region located around the pixel region for controlling the plurality of pixel units, and An image signal line for supplying an image signal to the peripheral circuit and a ground potential line for supplying a ground potential, the image signal line passing through a film having a higher resistance than the conductive film constituting the image signal line and the ground potential line The discharge resistor is electrically connected to the aforementioned ground potential line.

根据本发明的电光装置,则在其工作时,从外部电路经由外部电路连接端子,用来使作为周边电路的一部分的例如数据线驱动电路工作的,时钟信号、电源信号、控制信号、图像信号等各种信号被供给到数据线驱动电路。与之并行,从外部电路经由外部电路连接端子,用来使作为周边电路的一部分的例如扫描线驱动电路工作的,时钟信号、电源信号、控制信号等各种信号被供给到扫描线驱动电路。此时,接地电位经由接地电位线供给到周边电路,图像信号经由图像信号线供给到周边电路。另一方面,经由对向电极电位线,进而经由上下导通端子和上下导通件,对向电极电位被供给到对向电极。借此例如,图像信号由数据线驱动电路经由数据线供给到配置于像素区域或像素阵列区域的各像素部,并且扫描信号由扫描线驱动电路经由扫描线供给到各像素部,在各像素部处驱动夹持于像素电极和对向电极间的例如液晶等电光物质,借此进行有源矩阵驱动。这里所谓“像素区域”指的是在基板上俯视排列有多个像素部的区域,也就是,通过多个像素部的驱动而显示图像用的区域,例如,本发明的实施方式所涉及的“图像显示区域”是其一例或典型例。再者,这种扫描线和数据线,例如,在基板上相互交叉且分别布线有多条。此外,这种像素部,例如,具有:像素电极;和栅连接于扫描线且根据由扫描线所供给的扫描信号向像素电极有选择地供给由数据线所供给的图像信号的像素开关用的TFT。According to the electro-optical device of the present invention, when it is in operation, clock signals, power signals, control signals, image signals, etc., are used to operate, for example, a data line drive circuit as a part of the peripheral circuit, from the external circuit via the external circuit connection terminal. and other signals are supplied to the data line drive circuit. In parallel with this, various signals such as a clock signal, a power signal, and a control signal are supplied to the scanning line driving circuit from the external circuit via the external circuit connection terminal for operating the scanning line driving circuit as a part of the peripheral circuit. At this time, the ground potential is supplied to the peripheral circuit via the ground potential line, and the image signal is supplied to the peripheral circuit via the image signal line. On the other hand, the counter electrode potential is supplied to the counter electrode via the counter electrode potential line, and further via the vertical conduction terminal and the vertical conduction member. In this way, for example, an image signal is supplied to each pixel portion arranged in a pixel area or a pixel array area from a data line driving circuit via a data line, and a scanning signal is supplied to each pixel portion via a scanning line from a scanning line driving circuit. The electro-optic material such as liquid crystal sandwiched between the pixel electrode and the counter electrode is driven, thereby performing active matrix driving. The so-called "pixel area" here refers to an area on a substrate in which a plurality of pixel units are arranged in plan view, that is, an area for displaying an image by driving a plurality of pixel units. "image display area" is an example or a typical example thereof. Furthermore, such scanning lines and data lines, for example, cross each other on the substrate and are respectively wired in multiples. In addition, such a pixel unit has, for example: a pixel electrode; TFT.

在本发明中特别是,图像信号线经由作为高电阻的放电电阻电连接于接地电位线。因而,即使在该电光装置的完成时或交货时等,设置于检查装置,进行其工作检查、工作调整后从中拆卸,残留于电光装置中的图像信号线的电荷,或残留于连接于图像信号线的周边电路内的各种电子元件等的电荷,也就在从检查或调整后到拆卸的很短的时间之内,经由放电电阻向接地电位线放电。这里,能够在什么程度的时间内放电,大致取决于放电电阻的电阻值。由此,放电电阻形成为具有0.1MΩ~5MΩ的电阻值,以便可以在实用上最佳的程度的时间内放电。In particular, in the present invention, the image signal line is electrically connected to the ground potential line via a high-resistance discharge resistor. Therefore, even when the electro-optical device is completed or delivered, it is installed in the inspection device, its operation is inspected, its operation is adjusted, and then removed therefrom, the charge remaining in the image signal line in the electro-optic device, or remaining in the image signal line connected to the image The charge of various electronic components in the peripheral circuit of the signal line is also discharged to the ground potential line through the discharge resistor within a short period of time from inspection or adjustment to disassembly. Here, how long the discharge can be performed largely depends on the resistance value of the discharge resistor. Accordingly, the discharge resistor is formed to have a resistance value of 0.1 MΩ to 5 MΩ so that discharge can be performed within a practically optimum time.

因而,在从检查装置拆卸之际等,可以有效地避免因残留电荷而在像素电极和对向电极间施加直流电压,致使引起夹持于两电极间的液晶等电光物质被烧接的事态。进而,因为没有残留电荷,可以高精度地实施以后再次实施的检查、调整。此时,没有必要像前述专利文献1那样,在电光装置的外部,设置连接用的电阻或短路开关。而且,由于不像前述专利文献2那样靠用于像素部的TFT的膜来形成放电电阻就可以了,所以也可以提高设计自由度。由此,也可以,在基板上有限的区域内,形成适当的高电阻的放电电阻,或者在很小的区域内形成适当的高电阻的放电电阻。也就是说,只要不用同一膜,例如像素开关用等,在与对像素部的TFT所要求的性能的关系上,消除关于能够形成的电阻值、面积或位置的制约即可。Therefore, it is possible to effectively avoid a situation in which electro-optical substances such as liquid crystal sandwiched between the two electrodes are burned by applying a DC voltage between the pixel electrode and the counter electrode due to residual charges when detaching from the inspection device. Furthermore, since there is no residual electric charge, subsequent inspection and adjustment can be performed with high precision. In this case, it is not necessary to provide connection resistors or short-circuit switches outside the electro-optical device as in Patent Document 1 described above. Furthermore, since it is not sufficient to form the discharge resistor with the film of the TFT used in the pixel portion as in the aforementioned Patent Document 2, the degree of freedom in design can also be improved. Accordingly, it is also possible to form an appropriate high-resistance discharge resistor in a limited area on the substrate, or form an appropriate high-resistance discharge resistor in a small area. That is, as long as the same film is not used, such as for pixel switching, etc., in relation to the performance required for the TFT of the pixel portion, the restrictions on the resistance value, area, or position that can be formed can be eliminated.

如果像以上这样用本发明,则可极其有效地防止图像信号线中电荷的残留。According to the present invention as described above, it is possible to prevent charge residue in the image signal lines extremely effectively.

在本发明的电光装置的一种形态中,前述像素部具有像素电极,具备与前述像素电极对向的对向电极,以及用来把对向电极电位供给到前述对向电极的对向电极电位线。In one aspect of the electro-optical device according to the present invention, the pixel portion has a pixel electrode, a counter electrode facing the pixel electrode, and a counter electrode potential for supplying the counter electrode potential to the counter electrode. Wire.

根据此一形态,则像素部具有像素电极。对向电极电位经由对向电极电位线供给到与像素电极对向的对向电极。通过把对向电极电位线经由根据本发明的放电电阻电连接于接地电位,可极其有效地防止对向电极电位线中电荷的残留。According to this aspect, the pixel portion has a pixel electrode. The counter electrode potential is supplied to the counter electrode facing the pixel electrode via the counter electrode potential line. By electrically connecting the counter electrode potential line to the ground potential via the discharge resistor according to the present invention, it is extremely effective to prevent charge remaining in the counter electrode potential line.

在本发明的电光装置的另一种形态中,前述对向电极电位线经由由比构成前述对向电极电位线和前述接地电位线的导电膜高电阻的膜所构成的放电电阻,电连接于前述接地电位线。In another aspect of the electro-optic device according to the present invention, the counter electrode potential line is electrically connected to the aforementioned counter electrode potential line via a discharge resistor made of a film having a higher resistance than the conductive film constituting the counter electrode potential line and the ground potential line. Ground potential wire.

根据此一形态,则由于对向电极电位线,经由由比构成对向电极电位线及接地电位线的导电膜高电阻的膜所构成的放电电阻,电连接于接地电位线,所以与把外部电路连接端子或与之连接的布线前端连接于接地电位线相比,关于能够形成放电电阻的面积、位置的自由度增大,借此关于能够实现的电阻值也自由度加宽。进而,在对向电极电位线的连接于放电电阻的部分与外部电路连接端子之间,也可以形成静电保护电路或输入保护电路等各种电路。According to this aspect, since the counter electrode potential line is electrically connected to the ground potential line through the discharge resistor composed of a film having a higher resistance than the conductive film constituting the counter electrode potential line and the ground potential line, it is connected to the external circuit. When the connection terminal or the leading end of the wiring connected thereto is connected to the ground potential line, the degree of freedom regarding the area and position where the discharge resistor can be formed is increased, thereby increasing the degree of freedom regarding the realizable resistance value. Furthermore, various circuits such as an electrostatic protection circuit and an input protection circuit may be formed between the portion of the counter electrode potential line connected to the discharge resistor and the external circuit connection terminal.

在本发明的电光装置的另一种形态中,在前述图像信号线和前述对向电极电位线当中的至少一方的布线中,该布线的一端电连接于配置于前述周边区域的外部电路连接端子,该布线的另一端经由前述放电电阻电连接于前述接地电位线。In another aspect of the electro-optic device of the present invention, in at least one wiring of the image signal line and the counter electrode potential line, one end of the wiring is electrically connected to an external circuit connection terminal arranged in the peripheral region. The other end of the wiring is electrically connected to the ground potential line via the discharge resistor.

根据此一形态,则图像信号线和对向电极电位线当中的至少一方的布线,在与外部电路连接端子电连接的一端相反的另一端侧,经由放电电阻电连接于接地电位线。因此,由于图像信号线和对向电极电位线的布线的中途未设有放电电阻,所以既可以确保其他布线、电路的设计的自由度,又可以有效地防止在图像信号线和对向电极电位线当中的至少一方上电荷的残留。According to this aspect, at least one of the image signal line and the counter electrode potential line is electrically connected to the ground potential line through the discharge resistor at the other end opposite to the end electrically connected to the external circuit connection terminal. Therefore, since there is no discharge resistor in the middle of the wiring of the image signal line and the counter electrode potential line, it is possible to ensure freedom in the design of other wiring and circuits, and it is possible to effectively prevent the potential of the image signal line and the counter electrode from being damaged. Residue of charge on at least one of the lines.

在本发明的电光装置的另一种形态中,在前述图像信号线和前述对向电极电位线当中的至少一方的布线中,前述至少一方的布线的一端电连接于配置于前述周边区域的外部电路连接端子,在前述至少一方的布线的中途设置静电保护电路和输入保护电路当中的至少一方的保护电路,前述至少一方的布线在前述至少一方的保护电路内,经由前述放电电阻电连接于前述接地电位线。In another aspect of the electro-optical device according to the present invention, among at least one wiring of the image signal line and the counter electrode potential line, one end of the at least one wiring is electrically connected to a wire arranged outside the peripheral region. The circuit connection terminal is provided with at least one protection circuit among the electrostatic protection circuit and the input protection circuit in the middle of the at least one wiring, and the at least one wiring is in the at least one protection circuit and is electrically connected to the aforementioned discharge resistor. Ground potential wire.

根据此一形态,则由于在图像信号线和对向电极电位线的至少一方的连接于放电电阻的部分与外部电路连接端子之间,存在着静电保护电路或输入保护电路等保护电路,所以即使形成微小尺寸的放电电阻,也使该微小尺寸的放电电阻因静电的存在而被静电破坏的可能性变得非常低。只要像这样形成放电电阻,就不招致基板、装置总体的大型化,而且,由于不招致静电破坏引起的装置的不良化,所以实践上是极其有利的。According to this aspect, there is a protection circuit such as an electrostatic protection circuit or an input protection circuit between at least one of the image signal line and the counter electrode potential line connected to the discharge resistor and the external circuit connection terminal. Forming a discharge resistor with a small size also makes the possibility of the discharge resistor with a small size being destroyed by static electricity very low due to the existence of static electricity. As long as the discharge resistor is formed in this way, it does not increase the size of the substrate or the device as a whole, and since it does not cause deterioration of the device due to electrostatic breakdown, it is practically very advantageous.

在本发明的电光装置的另一种形态中,在前述图像信号线和前述对向电极电位线当中的至少一方的布线中,前述至少一方的布线的一端电连接于配置于前述周边区域的外部电路连接端子,在前述至少一方的布线的中途设置静电保护电路和输入保护电路当中的至少一方的保护电路,前述至少一方的布线从前述外部电路连接端子看,在比前述至少一方的保护电路远的一侧,经由前述放电电阻电连接于前述接地电位线。In another aspect of the electro-optical device according to the present invention, among at least one wiring of the image signal line and the counter electrode potential line, one end of the at least one wiring is electrically connected to a wire arranged outside the peripheral region. In the circuit connection terminal, at least one of the electrostatic protection circuit and the input protection circuit is provided in the middle of the at least one wiring, and the at least one wiring is farther than the at least one protection circuit when viewed from the external circuit connection terminal. One side is electrically connected to the ground potential line via the discharge resistor.

根据此一形态,则由于在图像信号线和对向电极电位线的至少一方的连接于放电电阻的部分与外部电路连接端子之间,存在着静电保护电路或输入保护电路等保护电路,所以即使形成微小尺寸的放电电阻,也使该微小尺寸的放电电阻因静电的存在而被静电破坏的可能性变得非常低。只要像这样形成放电电阻,就不招致基板、装置总体的大型化,而且,由于不招致静电破坏引起的装置的不良化,所以实践上是极其有利的。According to this aspect, there is a protection circuit such as an electrostatic protection circuit or an input protection circuit between at least one of the image signal line and the counter electrode potential line connected to the discharge resistor and the external circuit connection terminal. Forming a discharge resistor with a small size also makes the possibility of the discharge resistor with a small size being destroyed by static electricity very low due to the existence of static electricity. As long as the discharge resistor is formed in this way, it does not increase the size of the substrate or the device as a whole, and since it does not cause deterioration of the device due to electrostatic breakdown, it is practically very advantageous.

在本发明的电光装置的另一种形态中,前述对向电极电位线和前述图像信号线经由前述放电电阻电连接于相互相同的前述接地电位线。In another aspect of the electro-optical device of the present invention, the counter electrode potential line and the image signal line are electrically connected to the same ground potential line via the discharge resistor.

根据此一形态,则由于对向电极电位线和图像信号线连接于同一接地电位线,所以经由放电电阻两布线间的电位差很容易达到几乎没有的状态。换句话说,可以经由放电电阻谋求直到两布线间的电位差成为几乎没有的状态的时间的缩短。According to this aspect, since the counter electrode potential line and the image signal line are connected to the same ground potential line, the potential difference between the two wirings via the discharge resistor can easily become almost non-existent. In other words, it is possible to shorten the time until the potential difference between the two wirings becomes almost non-existent via the discharge resistor.

在本发明的电光装置的另一种形态中,前述放电电阻由半导体膜构成,将与对构成成为前述像素部或前述周边电路的至少一部分的半导体元件的半导体膜所掺杂的杂质不同的杂质,对构成前述放电电阻的半导体膜进行掺杂。In another aspect of the electro-optical device according to the present invention, the discharge resistor is formed of a semiconductor film, and an impurity different from the impurity doped with the semiconductor film constituting at least a part of the semiconductor element constituting the pixel portion or the peripheral circuit is added. , doping the semiconductor film constituting the aforementioned discharge resistor.

根据此一形态,则不像前述专利文献2那样由像素部的TFT中用的膜来形成放电电阻,放电电阻由半导体膜构成,通过将与对像素部或周边电路的半导体膜所掺杂的杂质不同的杂质对构成放电电阻的半导体膜进行掺杂,换句话说,通过进行专用的杂质掺杂,具有与构成半导体元件的半导体膜不同的电阻值。例如,放电电阻具有0.1MΩ~5MΩ的电阻值,以便可以在实用上最佳的程度的时间内放电。特别是由于对半导体膜进行专用的杂质掺杂而形成放电电阻,所以关于杂质浓度或杂质种类,或放电电阻的面积或配置等,可以与构成像素部或周边电路的半导体元件无关地设定。由此,在有限的基板上区域上,确保用来形成放电电阻的区域变得非常容易。特别是即使是小型的电光装置,或对基板其图像显示区域为大型的电光装置的场合,确保这种区域也变得容易。这些的结果,可以以预期的面积且在预期的位置上形成具有预期的电阻值的放电电阻。According to this aspect, instead of forming the discharge resistor from the film used in the TFT of the pixel portion as in the aforementioned Patent Document 2, the discharge resistor is composed of a semiconductor film, and by doping the semiconductor film with the pixel portion or the peripheral circuit The semiconductor film constituting the discharge resistor is doped with impurities different from the impurities. In other words, the semiconductor film constituting the semiconductor element has a resistance value different from that of the semiconductor film constituting the semiconductor element by performing dedicated doping with impurities. For example, the discharge resistor has a resistance value of 0.1 MΩ to 5 MΩ so that the discharge can be performed within a practically optimum time. In particular, since the semiconductor film is doped with dedicated impurities to form the discharge resistor, the impurity concentration or impurity type, or the area or arrangement of the discharge resistor can be set regardless of the semiconductor elements constituting the pixel portion or peripheral circuits. This makes it very easy to secure an area for forming the discharge resistor in a limited area on the substrate. In particular, even in the case of a small electro-optical device or an electro-optical device in which the image display area on the substrate is large, it becomes easy to secure such an area. As a result of these, a discharge resistor having a desired resistance value can be formed in a desired area and at a desired position.

再者,也可以在将构成半导体元件的半导体膜与构成放电电阻的半导体膜在同一工序中成膜和构图后,在其它工序中进行杂质掺杂。或者,也可以在将这些半导体膜在不同工序中成膜和构图后,在其它工序中进行杂质掺杂。Furthermore, after forming and patterning the semiconductor film constituting the semiconductor element and the semiconductor film constituting the discharge resistor in the same process, impurity doping may be performed in another process. Alternatively, after these semiconductor films are formed and patterned in different steps, impurity doping may be performed in another step.

在本发明的电光装置的另一种形态中,在前述基板上引绕的布线包括经由层间绝缘膜通过前述放电电阻的上层侧或下层侧的布线部分。In another aspect of the electro-optical device of the present invention, the wiring routed on the substrate includes a wiring portion passing through an upper layer side or a lower layer side of the discharge resistor via an interlayer insulating film.

根据此一形态,则由于在基板上引绕的布线包括通过放电电阻的上层侧或下层侧的布线部分,所以没有必要为放电电阻专用而分配形成有放电电阻的基板上的平面区域,可以在其上层侧或下层侧配置与放电电阻不同的引绕的布线或周边电路部部分。特别是,如果像第2电光装置那样在预定位置上预先设置静电保护电路或输入保护电路,不论是否像这样经由层间绝缘膜成为构筑电容器结构,都可以通过该部分降低放电电阻被静电破坏的可能性。According to this aspect, since the wiring routed on the substrate includes the wiring portion on the upper layer side or the lower layer side passing through the discharge resistor, it is not necessary to allocate a plane area on the substrate on which the discharge resistor is formed for exclusive use of the discharge resistor. On the upper or lower layer side, a routing wiring different from the discharge resistor or a peripheral circuit part is arranged. In particular, if a static electricity protection circuit or an input protection circuit is provided in advance at a predetermined position like the second electro-optic device, regardless of whether the capacitor structure is formed via an interlayer insulating film like this, it is possible to reduce the discharge resistance from being destroyed by static electricity through this part. possibility.

在本发明的电光装置的另一种形态中,前述图像信号线由供给串并行展开的多个图像信号的多条图像信号线构成,该多条图像信号线分别经由多个前述放电电阻的各个电连接于前述接地电位线,前述多个放电电阻,电阻的长度和宽度在预定范围内一致,前述布线部分对所有前述多个放电电阻重叠。In another aspect of the electro-optical device of the present invention, the image signal line is composed of a plurality of image signal lines supplying a plurality of image signals developed in series and in parallel, and the plurality of image signal lines pass through each of the plurality of discharge resistors. Electrically connected to the ground potential line, the plurality of discharge resistors have the same length and width within a predetermined range, and the wiring portion overlaps all of the plurality of discharge resistors.

根据此一形态,则多个放电电阻,电阻的长度及宽度(也就是,电阻长度和电阻宽度)在预定范围内一致,最好是,电阻的长度和宽度一致为同一设计值。而且,布线部分对所有多个放电电阻重叠,最好是,对所有多个放电电阻相等地重叠。因而,根据电阻的长度和宽度一致到什么程度,或者根据相等地重叠到什么程度,从多条图像信号线所放电的电荷量相互接近,或者最好是相等。换句话说,放电后的图像信号线的电位相互接近,或者最好是相等,可以降低残留电荷的图像信号的每个系列的不均。由此,可以有效地避免在从检查装置拆卸之际等,产生残留电荷的不均,在像素电极和对向电极间施加不均的直流电压,致使夹持于两电极间的液晶等电光物质因不均而引起烧接的事态。因而,可以有效地防止图像信号的每系列的显示不均。According to this form, the length and width of the plurality of discharge resistors (that is, the length of the resistor and the width of the resistor) are consistent within a predetermined range. Preferably, the length and width of the resistors are consistent with the same design value. Furthermore, the wiring portion overlaps all of the plurality of discharge resistors, preferably equally overlaps all of the plurality of discharge resistors. Therefore, depending on how much the lengths and widths of the resistances coincide, or how much they overlap equally, the amounts of charges discharged from a plurality of image signal lines are close to each other, or preferably equal. In other words, the potentials of the image signal lines after discharge are close to each other, or preferably equal to each other, so that the unevenness of each series of image signals of residual charges can be reduced. Thereby, it is possible to effectively avoid unevenness of residual charge generated when detaching from the inspection device, etc., and uneven DC voltage is applied between the pixel electrode and the counter electrode, causing electro-optic substances such as liquid crystals sandwiched between the two electrodes to be damaged. The situation of burning due to unevenness. Therefore, it is possible to effectively prevent display unevenness for each series of image signals.

进而,因为没有残留电荷的不均,故可以高精度地实施以后再次实施的检查或调整。更具体地说通过本形态可以有效地避免在进行检查之际,因残留电荷的偏差,变得不能高精度地进行周边电路或像素部处的正常或非正常的判定这样的实践上的大问题。Furthermore, since there is no unevenness in residual charge, inspection or adjustment to be performed again later can be performed with high precision. More specifically, this aspect can effectively avoid the practical big problem that it becomes impossible to accurately determine the normality or abnormality of the peripheral circuit or the pixel part due to the variation of the residual charge during the inspection. .

在本发明的第1电光装置的另一种形态中,前述放电电阻由掺杂有杂质的半导体膜来构成,在前述放电电阻与前述图像信号线和前述对向电极电位线的至少一方的连接部上,局部地存在着由比前述放电电阻浓度高地掺杂有杂质的前述半导体膜来构成的部分。In another aspect of the first electro-optic device of the present invention, the discharge resistor is formed of a semiconductor film doped with impurities, and the discharge resistor is connected to at least one of the image signal line and the counter electrode potential line. On the upper portion, there is locally a portion composed of the semiconductor film doped with impurities at a concentration higher than that of the discharge resistor.

根据此一形态,则放电电阻由掺杂有杂质的半导体膜来构成。这里特别是,由于在放电电阻的连接部上,局部地存在着由比放电电阻浓度高地掺杂有杂质的半导体膜来构成的部分,所以可以有效地防止在连接部上存在着杂质未掺杂的极高电阻的半导体膜部分,无法取得图像信号线或对向电极电位线与放电电阻之间的导电性的情况。实际上由于在进行杂质掺杂的场合,因掩模的尺寸误差或图形误差等,可能发生这种极高电阻的半导体膜部分,所以像本形态这样通过特意高浓度地进行杂质掺杂而在连接部上构筑进行了低电阻化的部位,实践上大为有利。According to this aspect, the discharge resistor is formed of a semiconductor film doped with impurities. In particular, since there is locally a portion made of a semiconductor film doped with impurities at a concentration higher than that of the discharge resistor at the connection portion of the discharge resistor, it is possible to effectively prevent the presence of an impurity-undoped portion at the connection portion. The semiconductor film part with extremely high resistance cannot obtain the conductivity between the image signal line or the counter electrode potential line and the discharge resistor. In fact, when impurity doping is performed, such an extremely high-resistance semiconductor film portion may occur due to a dimensional error or pattern error of the mask. It is practically advantageous to construct a low-resistance portion on the connection portion.

本发明的电光装置的制造方法为了解决上述问题,是制造上述本发明的电光装置(其中,包括其各种形态)的电光装置的制造方法,其中包括:在前述基板上形成前述像素部、前述周边电路、前述外部电路连接端子、前述引绕的布线和前述放电电阻的第1形成工序,在对向基板上形成前述对向电极的第2形成工序,以及把前述基板和前述对向基板相互粘贴的粘贴工序,前述第1形成工序包括:对构成成为前述像素部或前述周边电路的至少一部分的半导体元件的第1半导体膜以第1浓度进行杂质掺杂的第1掺杂工序,和与该第1掺杂工序不同地对构成前述放电电阻的第2半导体膜以第2浓度进行杂质掺杂的第2掺杂工序。In order to solve the above problems, the method for manufacturing an electro-optical device of the present invention is a method for manufacturing an electro-optical device (including various forms thereof) of the present invention described above, which includes: forming the aforementioned pixel portion on the aforementioned substrate, the aforementioned The first forming step of the peripheral circuit, the aforementioned external circuit connection terminal, the aforementioned routing wiring, and the aforementioned discharge resistor, the second forming step of forming the aforementioned counter electrode on the counter substrate, and the interconnection of the aforementioned substrate and the aforementioned counter substrate In the pasting step of pasting, the first forming step includes: a first doping step of doping the first semiconductor film constituting at least a part of the semiconductor element constituting the pixel portion or the peripheral circuit with an impurity at a first concentration; and The first doping step is different from the second doping step of doping the second semiconductor film constituting the discharge resistor with an impurity at a second concentration.

根据本发明的电光装置的制造方法,则针对基板,通过包括例如成膜处理、构图处理、杂质掺杂处理、高温处理等各种处理的,第1形成工序,可以形成像素部、周边电路、外部电路连接端子、引绕的布线、放电电阻等。另一方面,针对对向基板,通过包括例如成膜处理、构图处理、杂质掺杂处理、高温处理等各种处理的,第2形成工序,可以形成对向电极等。然后,通过粘贴工序,基板和对向基板可以粘贴,以便最终地成为例如夹持有液晶等电光物质的形态。这里特别是,在形成基板的第1形成工序中,通过第1掺杂工序,可以对构成成为像素部或前述周边电路的至少一部分的半导体元件的第1半导体膜以第1浓度进行杂质掺杂。与此相前后,通过与第1掺杂工序不同的,也就是用来形成放电电阻的专用的第2掺杂工序,可以对构成放电电阻的第2半导体膜以第2浓度进行杂质掺杂。因而,由于不像前述专利文献2那样由像素部的TFT中用的膜来形成放电电阻,对半导体膜进行专用的杂质掺杂而形成放电电阻,所以关于杂质浓度或杂质种类,或放电电阻的面积或配置等,可以与构成像素部、周边电路的半导体元件无关地设定。由此,例如与上述根据本发明的电光装置的场合同样,具有与构成半导体元件的半导体膜不同的电阻值地形成放电电阻变得容易。According to the manufacturing method of the electro-optic device of the present invention, the substrate can be formed by the first forming step including various treatments such as film formation treatment, patterning treatment, impurity doping treatment, high temperature treatment, etc., to form the pixel portion, peripheral circuit, External circuit connection terminals, routing wiring, discharge resistors, etc. On the other hand, for the counter substrate, the counter electrode and the like can be formed through a second formation process including, for example, film formation treatment, patterning treatment, impurity doping treatment, high-temperature treatment, and other various treatments. Then, through the bonding process, the substrate and the counter substrate can be bonded so as to finally have a form in which, for example, an electro-optic material such as liquid crystal is sandwiched. In particular, in the first forming step of forming the substrate, the first semiconductor film constituting the semiconductor element constituting at least a part of the pixel portion or the aforementioned peripheral circuit can be doped with an impurity at a first concentration by the first doping step. . In contrast to this, the second semiconductor film constituting the discharge resistor can be doped with impurities at the second concentration by the second doping step dedicated to forming the discharge resistor, which is different from the first doping step. Therefore, since the discharge resistor is not formed from the film used in the TFT of the pixel portion as in the aforementioned Patent Document 2, the discharge resistor is formed by performing dedicated impurity doping on the semiconductor film, so the impurity concentration or impurity type, or the discharge resistor The area, arrangement, and the like can be set regardless of semiconductor elements constituting the pixel portion and peripheral circuits. This makes it easy to form a discharge resistor having a different resistance value from that of the semiconductor film constituting the semiconductor element, for example, as in the case of the above-mentioned electro-optical device according to the present invention.

如果像以上这样用本发明,则可以比较容易地制造能够有效地防止在图像信号线、对向电极电位线中电荷残留的电光装置。According to the present invention as described above, it is possible to relatively easily manufacture an electro-optical device capable of effectively preventing charge remaining in the image signal line and the counter electrode potential line.

在本发明的电光装置的制造方法的一种形态中,在前述第1形成工序中,前述第1和第2半导体膜在前述第1和第2掺杂工序之前在相互同一工序中成膜和构图。In one aspect of the method for manufacturing an electro-optical device according to the present invention, in the first forming step, the first and second semiconductor films are formed and formed in the same step before the first and second doping steps. composition.

根据此一形态,则由于第1和第2半导体膜在同一工序中成膜和构图,所以可以谋求制造过程的简化。但是,也可以在分别的工序中把这些半导体膜成膜和构图后,对构成放电电阻的半导体膜进行专用的杂质掺杂。According to this aspect, since the first and second semiconductor films are formed and patterned in the same step, the manufacturing process can be simplified. However, after forming and patterning these semiconductor films in separate steps, it is also possible to perform dedicated impurity doping on the semiconductor film constituting the discharge resistor.

在本发明的电光装置的制造方法的另一种形态中,在前述第1形成工序中,在实施前述第1掺杂工序之际,前述第2半导体膜由用来阻止以前述第1浓度进行的杂质掺杂的第1抗蚀剂所覆盖。In another aspect of the method for manufacturing an electro-optic device according to the present invention, in the first forming step, when the first doping step is performed, the second semiconductor film is used to prevent doping at the first concentration. The impurity-doped first resist is covered.

根据此一形态,则由于在实施第1掺杂工序之际,第2半导体膜由第1抗蚀剂所覆盖,所以可以对构成半导体元件的第1半导体膜,关于其杂质浓度或杂质种类,或放电电阻的面积或配置等无关地形成构成放电电阻的第2半导体膜。According to this aspect, since the second semiconductor film is covered with the first resist when the first doping step is performed, the impurity concentration or impurity type of the first semiconductor film constituting the semiconductor element can be The second semiconductor film constituting the discharge resistor is formed irrespective of the area or arrangement of the discharge resistor.

在本形态中,在前述第1形成工序中,也可以制造为:前述第2掺杂工序,在前述放电电阻与前述图像信号线和前述对向电极电位线的至少一方的连接部上,经由使比由前述第1抗蚀剂所覆盖的区域宽的区域露出的第2抗蚀剂以前述第2浓度进行杂质掺杂,以便该处局部地存在着由比前述放电电阻浓度高地掺杂有杂质的前述半导体层来构成的部分。In this aspect, in the first forming step, the second doping step may be such that, at the connection portion between the discharge resistor and at least one of the image signal line and the counter electrode potential line, via The second resist exposed to a region wider than the region covered by the first resist is doped with an impurity at the second concentration so that there is locally a region doped with an impurity higher than the concentration of the discharge resistor. part of the aforementioned semiconductor layer.

如果像这样制造,则可以在放电电阻的连接部上,局部地形成由比放电电阻浓度高地掺杂有杂质的半导体层来构成的部分。借此,可以有效地防止在连接部上存在着杂质未掺杂的极高电阻的半导体膜部分,防止不能取得图像信号线或对向电极电位线与放电电阻之间的导电性的情况。由于在进行杂质掺杂的场合,因掩模的尺寸误差或图形误差等,可能发生这种极高电阻的半导体膜部分,所以像这样通过用使图形相互微妙地偏移的第1和第2抗蚀剂而在连接部上构筑进行了低电阻化的部位,实践上大为有利。By manufacturing in this way, a portion made of a semiconductor layer doped with impurities at a concentration higher than that of the discharge resistor can be locally formed on the connection portion of the discharge resistor. Thereby, it is possible to effectively prevent an extremely high-resistance semiconductor film portion not doped with impurities from existing on the connecting portion, and prevent the conductivity between the image signal line or the counter electrode potential line and the discharge resistor from being impossible to obtain. In the case of impurity doping, such an extremely high-resistance semiconductor film portion may occur due to dimensional errors or pattern errors of the mask. It is practically advantageous to construct a lower resistance portion on the connection portion using a resist.

在本发明的电光装置的制造方法的另一种形态中,前述引绕的布线包括,在前述基板上,经由层间绝缘膜通过前述放电电阻的上层侧或下层侧的布线部分,前述图像信号线由供给串并行展开的多个图像信号的多条图像信号线构成,该多条图像信号线分别介由作为前述放电电阻的多个放电电阻当中对应的一个放电电阻电连接于前述接地电位线,前述多个放电电阻,电阻的长度和宽度在预定范围内一致,前述布线部分对所有前述多个放电电阻重叠,前述第2掺杂工序,在同一工序中对前述多个放电电阻掺杂。In another aspect of the manufacturing method of the electro-optic device of the present invention, the wiring to be routed includes, on the substrate, a wiring portion on the upper layer side or the lower layer side of the discharge resistor via an interlayer insulating film, and the image signal The line is composed of a plurality of image signal lines for supplying a plurality of image signals developed in series and in parallel, and the plurality of image signal lines are respectively electrically connected to the ground potential line through a corresponding one of the plurality of discharge resistors as the discharge resistors. , the plurality of discharge resistors, the length and width of the resistors are consistent within a predetermined range, the wiring portion overlaps all of the plurality of discharge resistors, and the second doping step is to dope the plurality of discharge resistors in the same process.

根据此一形态,则由于通过第2掺杂工序,在同一工序中对多个放电电阻掺杂,所以针对多个放电电阻,可以把电阻长度和电阻宽度一致为同一设计值,可以使对所有多个放电电阻把经由层间绝缘膜通过放电电阻的上层侧或下层侧的布线部分相等地重叠比较容易。可以降低残留电荷的图像信号的每系列的不均。由此,可以有效地避免在从检查装置拆卸之际等,产生残留电荷的不均,在像素电极和对向电极间施加不均的直流电压,致使夹持于两电极间的液晶等电光物质因不均而引起烧接的事态。因而,可以有效地防止图像信号的每系列的显示不均。According to this form, since a plurality of discharge resistors are doped in the same process through the second doping step, the resistance length and resistance width can be consistent with the same design value for a plurality of discharge resistors, so that all It is easy for a plurality of discharge resistors to overlap equally the wiring portions on the upper layer side or the lower layer side of the discharge resistors through the interlayer insulating film. The unevenness per series of image signals of residual charges can be reduced. Thereby, it is possible to effectively avoid unevenness of residual charge generated when detaching from the inspection device, etc., and uneven DC voltage is applied between the pixel electrode and the counter electrode, causing electro-optic substances such as liquid crystals sandwiched between the two electrodes to be damaged. The situation of burning due to unevenness. Therefore, it is possible to effectively prevent display unevenness for each series of image signals.

本发明的电子设备,由于具备上述本发明的电光装置,所以可以实现能够显示高品位的图像的,电视机、便携式电话机、电子手册、文字处理器、取景器型或监视器直观型的磁带录像机、工作站、可视电话、POS终端、触摸面板等,进而把电光装置用作曝光用头的打印机、复印机、传真机等图像形成装置等的各种电子设备。此外,作为本发明的电子设备,例如,也可以实现电子纸张的电泳装置、电子发射装置(场致发射显示器和传导电子发射显示器)等。The electronic equipment of the present invention is equipped with the electro-optical device of the present invention, so it can realize a magnetic tape of a television, a mobile phone, an electronic manual, a word processor, a viewfinder type, or a monitor intuitive type capable of displaying high-quality images. VCRs, workstations, videophones, POS terminals, touch panels, etc., and various electronic equipment such as image forming devices such as printers, copiers, and facsimiles that use electro-optical devices as exposure heads. In addition, as the electronic device of the present invention, for example, an electrophoretic device of electronic paper, an electron emission device (field emission display and conduction electron emission display), etc. can also be realized.

本发明的这种作用和其他优点根据以下说明的实施形态将会显而易见。These functions and other advantages of the present invention will be apparent from the embodiments described below.

附图说明 Description of drawings

图1是表示根据本发明的第1实施形态的液晶装置的总体构成的俯视图。FIG. 1 is a plan view showing the overall configuration of a liquid crystal device according to a first embodiment of the present invention.

图2是图1的H-H′的剖视图。Fig. 2 is a sectional view taken along line H-H' of Fig. 1 .

图3是表示根据本发明的第1实施形态的液晶装置的主要部分构成的俯视图。Fig. 3 is a plan view showing the configuration of main parts of the liquid crystal device according to the first embodiment of the present invention.

图4是任意像素开关用的TFT中的剖视图。Fig. 4 is a cross-sectional view of a TFT for arbitrary pixel switching.

图5是图3中的C1的局部放大俯视图。FIG. 5 is a partially enlarged plan view of C1 in FIG. 3 .

图6是图5中的A-A′剖视图。Fig. 6 is a sectional view taken along line A-A' in Fig. 5 .

图7是放电电阻和像素开关用的TFT的制造工序图(之一)。7 is a manufacturing process diagram (part 1) of a TFT for a discharge resistor and a pixel switch.

图8是放电电阻和像素开关用的TFT的制造工序图(之二)。Fig. 8 is a manufacturing process diagram (part 2) of a TFT for a discharge resistor and a pixel switch.

图9是根据第1实施形态的变形例中的与图5同样的图。Fig. 9 is a diagram similar to Fig. 5 in a modified example according to the first embodiment.

图10是第1变形例中的与图6同样的剖视图。Fig. 10 is a cross-sectional view similar to Fig. 6 in the first modified example.

图11是第2变形例中的与图6同样的剖视图。Fig. 11 is a cross-sectional view similar to Fig. 6 in a second modified example.

图12是表示第1实施形态中液晶装置的制造方法的流程图。Fig. 12 is a flowchart showing a method of manufacturing a liquid crystal device in the first embodiment.

图13是表示运用电光装置的电子设备之一例的投影机的构成的俯视图。13 is a plan view showing the configuration of a projector as an example of electronic equipment using an electro-optical device.

图14是表示运用电光装置的电子设备之一例的个人计算机的构成的透视图。14 is a perspective view showing the configuration of a personal computer as an example of electronic equipment using an electro-optic device.

图15是表示运用电光装置的电子设备之一例的便携式电话机的构成的透视图。Fig. 15 is a perspective view showing the structure of a cellular phone as an example of electronic equipment using an electro-optical device.

图16是表示根据第2实施形态的电光装置的静电保护电路和放电电阻的电构成的电路图。16 is a circuit diagram showing the electrical configuration of an electrostatic protection circuit and a discharge resistor of an electro-optical device according to a second embodiment.

图17是表示根据第2实施形态的电光装置的静电保护电路和放电电阻的具体的构成的俯视图。17 is a plan view showing a specific configuration of an electrostatic protection circuit and a discharge resistor of an electro-optical device according to a second embodiment.

标号的说明Explanation of labels

1a...第1半导体膜,4a...第2半导体膜,4d、4e...高浓度杂质掺杂部分,10...TFT阵列基板,11a...下侧遮光膜,20...对向基板,23...遮光膜,30...像素开关用的TFT,50...液晶层,61...第1抗蚀剂,62...第2抗蚀剂,90...引绕布线,91、91a~91f...图像信号线,93...接地电位线,99...对向电极电位线,101...数据线驱动电路,102...外部电路连接端子,104...扫描线驱动电路,106...上下导通端子,107...上下导通件,400、400a~400f、400L...放电电阻,410、410S...静电保护电路1a...first semiconductor film, 4a...second semiconductor film, 4d, 4e...high-concentration impurity doped part, 10...TFT array substrate, 11a...lower side light-shielding film, 20. ..counter substrate, 23...shading film, 30...TFT for pixel switching, 50...liquid crystal layer, 61...first resist, 62...second resist, 90...leading and winding wiring, 91, 91a-91f...image signal line, 93...ground potential line, 99...opposite electrode potential line, 101...data line drive circuit, 102.. .External circuit connection terminal, 104...scanning line drive circuit, 106...upper and lower conduction terminal, 107...upper and lower conduction member, 400, 400a~400f, 400L...discharge resistor, 410, 410S. ..Electrostatic protection circuit

具体实施方式 Detailed ways

下面,就本发明的第1实施形态参照图1至图11进行说明。以下的实施形态,把本发明的电光装置运用于驱动电路内置型的TFT有源矩阵驱动方式的液晶装置。Next, a first embodiment of the present invention will be described with reference to FIGS. 1 to 11 . In the following embodiments, the electro-optical device of the present invention is applied to a TFT active matrix drive type liquid crystal device with a built-in drive circuit.

首先,参照图1和图2,就根据本实施形态的电光装置的总体构成进行说明。这里图1是表示根据本实施形态的电光装置的构成的俯视图,图2是图1的H-H′线处的剖视图。First, the overall configuration of the electro-optical device according to this embodiment will be described with reference to FIGS. 1 and 2 . Here, FIG. 1 is a plan view showing the configuration of an electro-optical device according to this embodiment, and FIG. 2 is a cross-sectional view taken along line H-H' in FIG. 1 .

在图1和图2中,在根据本实施形态的电光装置中,FFT阵列基板10与对向基板20对向配置。在TFT阵列基板10与对向基板20之间封入液晶层50,TFT阵列基板10与对向基板20,由位于作为根据本发明的“像素区域”之一例的图像显示区域10a的周围的密封区域中所设置的密封件52相互地粘接。In FIGS. 1 and 2 , in the electro-optical device according to the present embodiment, the FFT array substrate 10 and the counter substrate 20 are disposed opposite to each other. The liquid crystal layer 50 is sealed between the TFT array substrate 10 and the opposite substrate 20, and the TFT array substrate 10 and the opposite substrate 20 are formed by a sealing region located around the image display region 10a as an example of the "pixel region" according to the present invention. The seals 52 provided in are bonded to each other.

在图1中,与配置有密封件52的密封区域的内侧并行,规定图像显示区域10a的框缘区域的遮光性的框缘遮光膜53设在对向基板20侧。周边区域当中,在配置有密封件52的密封区域的外侧的区域上,数据线驱动电路101和外部电路连接端子102沿着TFT阵列基板10的一边设置。在沿着该一边的比密封区域位于内侧处,采样电路301由框缘遮光膜53覆盖地设置。此外,扫描线驱动电路104在沿着与此一边相邻的两边的密封区域的外侧设置。进而,为了连接像这样设在图像显示区域10a的两侧的两条扫描线驱动电路104间,沿着TFT阵列基板10的剩余的一边,设有多条布线105。此外,在TFT阵列基板10上,在与对向基板20的四个角部对向的区域上,配置着由上下导通件107连接两基板间用的上下导通端子106。借此,在TFT阵列基板10与对向基板20之间可以取为电导通。In FIG. 1 , a light-shielding frame light-shielding film 53 defining a frame region of the image display region 10 a is provided on the counter substrate 20 side in parallel with the inner side of the sealing region where the seal member 52 is arranged. In the peripheral area, the data line driving circuit 101 and the external circuit connection terminal 102 are arranged along one side of the TFT array substrate 10 in an area outside the sealing area where the sealing member 52 is arranged. The sampling circuit 301 is provided so that the sampling circuit 301 is covered with the frame light-shielding film 53 at the inner side than the sealing area along this side. In addition, the scanning line driving circuit 104 is provided outside the sealing area along the two sides adjacent to this one side. Furthermore, a plurality of wirings 105 are provided along the remaining side of the TFT array substrate 10 in order to connect between the two scanning line driving circuits 104 provided on both sides of the image display area 10 a. In addition, on the TFT array substrate 10 , in a region facing the four corners of the counter substrate 20 , vertical conduction terminals 106 for connecting the two substrates by vertical conduction members 107 are arranged. Thereby, electrical conduction can be achieved between the TFT array substrate 10 and the counter substrate 20 .

在图2中,在TFT阵列基板10之上形成形成有作为像素开关元件的像素开关用的TFT(薄膜晶体管)和扫描线、数据线等布线的叠层结构。在图像显示区域10a中,在像素开关用TFT及扫描线、数据线等布线的上层上设有像素电极9a。另一方面,在对向基板20中的与TFT阵列基板10的对向面之上,形成遮光膜23。而且,在遮光膜23之上,与多个像素电极9a对向地形成由ITO等透明材料构成的对向电极21。In FIG. 2 , on the TFT array substrate 10 , a stacked structure of pixel switching TFTs (Thin Film Transistors) serving as pixel switching elements and wirings such as scanning lines and data lines are formed. In the image display region 10a, a pixel electrode 9a is provided on an upper layer of the TFT for pixel switching and wirings such as scanning lines and data lines. On the other hand, a light shielding film 23 is formed on a surface of the counter substrate 20 that faces the TFT array substrate 10 . Further, on the light-shielding film 23, a counter electrode 21 made of a transparent material such as ITO is formed to face the plurality of pixel electrodes 9a.

再者,虽然这里未画出,但是在TFT阵列基板10之上,除了数据线驱动电路101、扫描线驱动电路104之外,形成后述的放电电阻、静电保护电路等。除此之外,也可以形成用来检查制造中途或出厂时的该液晶装置的质量、缺陷等的检查电路、检查用图形等。Furthermore, although not shown here, on the TFT array substrate 10, in addition to the data line driving circuit 101 and the scanning line driving circuit 104, a discharge resistor and an electrostatic protection circuit described later are formed. In addition, inspection circuits, inspection patterns, and the like for inspecting the quality, defects, etc. of the liquid crystal device during manufacture or at the time of shipment can also be formed.

此外,在LCOS或DMD等在硅基板上形成元件的器件中,作为像素开关元件,可以替代TFT而形成晶体管。In addition, in devices in which elements are formed on a silicon substrate, such as LCOS and DMD, transistors may be formed as pixel switching elements instead of TFTs.

此外,在液晶为IPS模式的场合,对向电极21设在TFT阵列基板10上。In addition, when the liquid crystal is in the IPS mode, the counter electrode 21 is provided on the TFT array substrate 10 .

接下来,就此一液晶装置的主要的构成参照图3进行说明。这里,图3示出根据本实施形态的液晶装置的主要部分的构成。Next, the main configuration of this liquid crystal device will be described with reference to FIG. 3 . Here, FIG. 3 shows the configuration of main parts of the liquid crystal device according to this embodiment.

在图3中,液晶装置成为由例如石英基板、玻璃基板或硅基板等构成的TFT阵列基板10与对向基板20(参照图2)经由液晶层对向配置,控制施加于在图像显示区域10a中划分排列的像素电极9a的电压,针对每个像素调制施加于液晶层50(参照图2)的电场的构成。由此,可以控制两基板间的透射光量,对图像进行灰度等级显示。此一液晶装置采用TFT有源矩阵驱动方式,在TFT阵列基板10中的图像显示区域10a上形成矩阵状地配置的多个像素电极9a,相互交叉排列的多条扫描线2和数据线3,构筑对应于像素的像素部。再者,虽然这里未画出,但是在各像素电极9a与数据线3之间形成根据经由扫描线2分别供给的扫描信号而控制导通、非导通的TFT,及用来维持施加于像素电极9a的电压的存储电容。此外,在图像显示区域10a的周边区域上,形成数据线驱动电路101等驱动电路,外部电路连接端子102和静电保护电路410。进而,包括用来供给图像信号VID1~VID6的图像信号线91和用来供给作为接地电位的电源的第2电源VSSX、VSSY的接地电位线93的多条引绕布线90,从外部电路连接端子102向数据线驱动电路101等驱动电路引绕。这里引绕布线90是根据本发明的“引绕的布线”之一例。In FIG. 3, the liquid crystal device becomes a TFT array substrate 10 made of, for example, a quartz substrate, a glass substrate, or a silicon substrate, and an opposing substrate 20 (refer to FIG. 2 ) is disposed opposite to each other via a liquid crystal layer, and the control is applied to the image display area 10a. The voltage of the pixel electrodes 9a arranged in a divided manner modulates the configuration of the electric field applied to the liquid crystal layer 50 (see FIG. 2 ) for each pixel. In this way, the amount of transmitted light between the two substrates can be controlled, and the image can be displayed in grayscale. This liquid crystal device adopts the TFT active matrix driving method, and forms a plurality of pixel electrodes 9a arranged in a matrix on the image display area 10a in the TFT array substrate 10, and a plurality of scanning lines 2 and data lines 3 arranged crosswise, A pixel portion corresponding to a pixel is constructed. Furthermore, although not shown here, TFTs that control conduction and non-conduction according to the scanning signals supplied through the scanning lines 2 are formed between each pixel electrode 9a and the data line 3, and are used to maintain the voltage applied to the pixel. Storage capacitor for the voltage of electrode 9a. Further, drive circuits such as the data line drive circuit 101 , the external circuit connection terminal 102 and the static electricity protection circuit 410 are formed in the peripheral area of the image display area 10 a. Furthermore, a plurality of lead wires 90 including an image signal line 91 for supplying the image signals VID1 to VID6 and a ground potential line 93 for supplying the second power sources VSSX, VSSY as a power source of the ground potential are connected to terminals from an external circuit. 102 is routed to drive circuits such as the data line drive circuit 101 . Here, the routing wiring 90 is an example of the "routing wiring" according to the present invention.

在对向基板20(参照图2)之上,形成与像素电极9a对向的对向电极21。引绕布线90还包括用来把对向电极电位LCCOM供给对向电极21的对向电极电位线99。在TFT阵列基板10之上,还形成用来相互电连接对向电极电位线99和对向电极21的上下导通端子106,在TFT阵列基板10和对向基板20(参照图2)之间设有相互电连接上下导通端子106和对向电极21(参照图2)的上下导通件107。On the counter substrate 20 (see FIG. 2 ), a counter electrode 21 is formed to face the pixel electrode 9a. The routing wiring 90 further includes a counter electrode potential line 99 for supplying the counter electrode potential LCCOM to the counter electrode 21 . On the TFT array substrate 10, the upper and lower conduction terminals 106 for electrically connecting the opposite electrode potential line 99 and the opposite electrode 21 are also formed, between the TFT array substrate 10 and the opposite substrate 20 (refer to FIG. 2 ). Vertical conductors 107 are provided to electrically connect the vertical conductor terminals 106 and the counter electrode 21 (see FIG. 2 ) to each other.

图像信号线91和对向电极电位线99分别经由作为比构成图像信号线91、对向电极电位线99和接地电位线93的导电膜高电阻的放电电阻400,电连接于接地电位线93a。The image signal line 91 and the counter electrode potential line 99 are electrically connected to the ground potential line 93a via a discharge resistor 400 having a higher resistance than the conductive film constituting the image signal line 91, the counter electrode potential line 99, and the ground potential line 93, respectively.

接下来,对像这样所构成的本实施形态的液晶装置的工作,参照图3进行说明。Next, the operation of the liquid crystal device of the present embodiment configured in this way will be described with reference to FIG. 3 .

在本实施形态的液晶装置的工作时,从经由FPC(柔性线路板)等连接于外部电路连接端子102的外部电路经由外部电路连接端子102和引绕布线90,使数据线驱动电路101工作用的,时钟信号、第1电源信号VDDX、第2电源信号VSSX、控制信号和图像信号VID1~VID6等各种信号,被供给到数据线驱动电路101。与此并行,从外部电路经由外部电路连接端子102和引绕布线90,使扫描线驱动电路104工作用的,时钟信号、第1电源信号VDDY、第2电源信号VSSY、控制信号等各种信号,被供给到扫描线驱动电路104。此时,经由引绕布线90当中的接地电位线93a,作为接地电位的第2电源信号VSSX供给到数据线驱动电路101,经由接地电位线93b,作为接地电位的第2电源信号VSSY供给到扫描线驱动电路104。此外,经由引绕布线90当中的图像信号线91,图像信号VID1~VID6供给到采样电路301。另一方面,经由引绕布线90当中的对向电极电位线99,进而经由上下导通端子106和上下导通件107,对向电极电位LCCOM供给到对向电极21(参照图2)。借此,由数据线驱动电路101经由数据线3将图像信号VID1~VID6供给到像素部,并且由扫描线驱动电路104经由扫描线2将扫描信号供给到像素部,靠在各像素部中驱动夹持于像素电极9a和对向电极21间的液晶层50,进行有源矩阵驱动。再者,扫描线2和数据线3在TFT阵列基板10上相互交叉地且分别布线多条。此外,虽然这里省略了图示,但是在像素部中,形成:像素电极9a,与栅连接于扫描线2且把从数据线3所供给的图像信号VID1~VID6根据从扫描线2所供给的扫描信号有选择地向像素电极9a供给的像素开关用的TFT。In the operation of the liquid crystal device of this embodiment, the data line driving circuit 101 is operated from an external circuit connected to the external circuit connection terminal 102 via an FPC (flexible printed circuit) or the like via the external circuit connection terminal 102 and the lead wiring 90. Various signals such as a clock signal, a first power supply signal VDDX, a second power supply signal VSSX, control signals, and image signals VID1 to VID6 are supplied to the data line driving circuit 101 . In parallel with this, various signals such as a clock signal, a first power supply signal VDDY, a second power supply signal VSSY, and a control signal are used to operate the scanning line drive circuit 104 from the external circuit via the external circuit connection terminal 102 and the routing wiring 90 . , is supplied to the scanning line driving circuit 104 . At this time, the second power supply signal VSSX at the ground potential is supplied to the data line driving circuit 101 via the ground potential line 93a of the routing wiring 90, and the second power supply signal VSSY at the ground potential is supplied to the scanning circuit through the ground potential line 93b. Line driver circuit 104. Further, the image signals VID1 to VID6 are supplied to the sampling circuit 301 via the image signal line 91 among the routing wirings 90 . On the other hand, the counter electrode potential LCCOM is supplied to the counter electrode 21 (see FIG. 2 ) via the counter electrode potential line 99 in the routing wiring 90 and further via the vertical conducting terminal 106 and the vertical conducting member 107 . Thereby, the data line driving circuit 101 supplies the image signals VID1 to VID6 to the pixel parts via the data lines 3, and the scanning line driving circuit 104 supplies the scanning signals to the pixel parts via the scanning lines 2, and the pixel parts are driven close to each other. The liquid crystal layer 50 sandwiched between the pixel electrode 9a and the counter electrode 21 performs active matrix driving. Furthermore, a plurality of scan lines 2 and data lines 3 are interconnected on the TFT array substrate 10 , respectively. In addition, although illustration is omitted here, in the pixel portion, a pixel electrode 9 a is formed, which is connected to the scanning line 2 with a gate, and transmits the image signals VID1 to VID6 supplied from the data line 3 according to the signal supplied from the scanning line 2 . The scanning signal is selectively supplied to the TFT for pixel switching of the pixel electrode 9a.

在本实施形态中特别是,图像信号线91和对向电极电位线99分别经由作为高电阻的放电电阻400电连接于接地电位线93a。因而,即使在该液晶装置的完成时或交货时等,设置于检查装置,进行其工作检查、工作调整后从中拆卸,残留于液晶装置中的图像信号线91和对向电极电位线99的电荷,或残留于连接于图像信号线91或对向电极电位线99的数据线驱动电路101、扫描线驱动电路104等周边电路内的各种电子元件等的电荷,也可以在从检查或调整后到拆卸的很短的时间之内,经由放电电阻400向接地电位线93a放电。这里,在本实施形态中,通过将放电电阻形成为具有0.1MΩ~5MΩ的电阻值,可以在实用上最佳的程度的时间内放电。In particular, in this embodiment, the image signal line 91 and the counter electrode potential line 99 are electrically connected to the ground potential line 93 a via the high-resistance discharge resistor 400 . Therefore, even if the liquid crystal device is installed in the inspection device at the time of completion or delivery, and then removed from it after its operation inspection and operation adjustment, the image signal line 91 and the counter electrode potential line 99 remaining in the liquid crystal device Charges, or charges remaining in various electronic components in the peripheral circuits such as the data line drive circuit 101 and the scan line drive circuit 104 connected to the image signal line 91 or the counter electrode potential line 99, can also be used for inspection or adjustment. Afterwards, within a short time after disassembly, discharge is conducted to the ground potential line 93a via the discharge resistor 400 . Here, in this embodiment, by forming the discharge resistor to have a resistance value of 0.1 MΩ to 5 MΩ, it is possible to discharge within a practically optimum time.

因而,在从检查装置拆卸之际等,可以有效地避免因残留电荷而在像素电极9a和对向电极21间施加直流电压,致使引起夹持于两电极间的液晶层50(参照图2)被烧接的事态。进而,因为没有残留电荷,可以高精度地实施以后再次实施的检查或调整。此时,没有必要在液晶装置的外部,设置与接地电位线连接用的电阻或短路开关。而且,由于不靠用于像素部的TFT的膜来形成放电电阻,所以设计自由度高。由此,在TFT阵列基板10上的有限的区域内,可以形成适当的高电阻的放电电阻。Therefore, when detaching from the inspection device, etc., it is possible to effectively avoid applying a DC voltage between the pixel electrode 9a and the counter electrode 21 due to residual charges, causing the liquid crystal layer 50 sandwiched between the two electrodes (refer to FIG. 2 ). The situation of being burned. Furthermore, since there is no residual electric charge, inspection or adjustment to be performed again later can be performed with high precision. In this case, there is no need to provide a resistor or a short-circuit switch for connecting to the ground potential line outside the liquid crystal device. Furthermore, since the discharge resistor is not formed by the TFT film used in the pixel portion, the degree of freedom in design is high. As a result, an appropriate high-resistance discharge resistor can be formed in a limited area on the TFT array substrate 10 .

如果像以上这样用本实施形态,则可以极其有效地防止图像信号线91、对向电极电位线99中电荷的残留。According to the present embodiment as described above, it is possible to extremely effectively prevent charge remaining in the image signal line 91 and the counter electrode potential line 99 .

在图3中,在本实施形态中,特别是,图像信号线91及对向电极电位线99分别在位于连接于外部电路连接端子102的前端的相反侧的布线终端处,经由放电电阻400电连接于接地电位线93a。In FIG. 3 , in this embodiment, in particular, the image signal line 91 and the counter electrode potential line 99 are electrically connected via a discharge resistor 400 at the wiring terminals on the opposite side of the front end connected to the external circuit connection terminal 102, respectively. It is connected to the ground potential line 93a.

因而,与把外部电路连接端子102或与之连接的布线前端连接于接地电位线相比,关于能够形成放电电阻的面积或位置的自由度增大,借此关于能够实现的电阻值也自由度加宽。进而,在图像信号线91和对向电极电位线99连接于放电电阻400的部分与外部电路连接端子102之间,也可以形成静电保护电路410或输入保护电路等各种电路。Therefore, compared with connecting the external circuit connection terminal 102 or the wiring tip connected thereto to the ground potential line, the degree of freedom regarding the area or position where the discharge resistor can be formed is increased, whereby the degree of freedom regarding the achievable resistance value is also increased. widen. Furthermore, various circuits such as an electrostatic protection circuit 410 or an input protection circuit may be formed between the portion where the image signal line 91 and the counter electrode potential line 99 are connected to the discharge resistor 400 and the external circuit connection terminal 102 .

再者,也可以为图像信号线91和对向电极电位线99分别在布线中途,经由放电电阻400电连接于接地电位线93a。在像这样构成的场合,也可以得到与上述同样的效果。Furthermore, the image signal line 91 and the counter electrode potential line 99 may be electrically connected to the ground potential line 93 a via the discharge resistor 400 in the middle of the wiring. Also in the case of such a configuration, the same effect as above can be obtained.

另外,在本实施形态中,还在TFT阵列基板10上形成配置于引绕布线90的中途的静电保护电路410。这里作为静电保护电路410的具体的构成,可以采用例如经由连接有二极管的TFT,或者经由二极管,将引绕布线90连接于电源布线等形式等的,现有的各种形式的静电保护电路。图像信号线91和对向电极电位线99从外部电路连接端子102看分别在比静电保护电路410远的一侧,经由放电电阻400电连接于接地电位线。再者,也可以在静电保护电路410内经由放电电阻400电连接于接地电位线。In addition, in the present embodiment, an electrostatic protection circuit 410 disposed in the middle of the routing wiring 90 is also formed on the TFT array substrate 10 . Here, as a specific configuration of the static electricity protection circuit 410 , various conventional static electricity protection circuits can be adopted, such as connecting the routing wiring 90 to the power supply wiring via a diode-connected TFT, or via a diode. The image signal line 91 and the counter electrode potential line 99 are electrically connected to the ground potential line via the discharge resistor 400 on the side farther from the electrostatic protection circuit 410 as viewed from the external circuit connection terminal 102 . Furthermore, it may be electrically connected to the ground potential line via the discharge resistor 400 in the electrostatic protection circuit 410 .

根据本实施形态,则由于在图像信号线91和对向电极电位线99连接于放电电阻400的部分与外部电路连接端子102之间,存在着静电保护电路410,所以即使形成微小尺寸的放电电阻400,也可以使该微小尺寸的放电电阻400因静电的存在而被静电破坏的可能性非常低。只要像这样形成放电电阻400,就不招致基板、装置总体的大型化,而且,由于不招致静电破坏引起的装置的不良化,所以实践上是极其有利的。According to this embodiment, since the electrostatic protection circuit 410 exists between the portion where the image signal line 91 and the counter electrode potential line 99 are connected to the discharge resistor 400 and the external circuit connection terminal 102, even if a discharge resistor with a small size is formed, 400, it is also possible to make the tiny-sized discharge resistor 400 less likely to be damaged by static electricity due to the existence of static electricity. As long as the discharge resistor 400 is formed in this way, it does not increase the size of the substrate or the device as a whole, and since it does not cause deterioration of the device due to electrostatic damage, it is practically extremely advantageous.

进而,在本实施形态中,对向电极电位线99和图像信号线91经由放电电阻400电连接于相互同一的接地电位线93a。由此,经由放电电阻400很容易使两布线间的电位差成为几乎没有的状态。换句话说,可以经由放电电阻400谋求直到两布线间的电位差成为几乎没有的状态的时间的缩短。Furthermore, in the present embodiment, the counter electrode potential line 99 and the image signal line 91 are electrically connected to the same ground potential line 93 a via the discharge resistor 400 . Accordingly, the potential difference between the two wirings can be easily brought to a state where there is almost no potential difference via the discharge resistor 400 . In other words, it is possible to shorten the time until the potential difference between the two wirings becomes almost non-existent via the discharge resistor 400 .

接下来,就本实施形态中的像素开关用的TFT和放电电阻的构成,参照图4至图6进行说明。这里图4是表示任意的像素开关用的TFT中的,沿着沟道区域的横剖面的剖视图。图5是图3中的C1的局部放大俯视图。图6是图5中的A-A′剖视图。Next, the configurations of the pixel switch TFT and the discharge resistor in this embodiment will be described with reference to FIGS. 4 to 6 . Here, FIG. 4 is a cross-sectional view showing a cross-section along a channel region of an arbitrary pixel switching TFT. FIG. 5 is a partially enlarged plan view of C1 in FIG. 3 . Fig. 6 is a sectional view taken along line A-A' in Fig. 5 .

在图4中,像素开关用的TFT30具有LDD(轻掺杂漏)结构,具备扫描线2,通过来自该扫描线2的电场而形成沟道的半导体层1a的沟道区域1a′,包括使扫描线2与半导体层1a绝缘的栅绝缘膜的绝缘膜2a,半导体层1a的低浓度源区域1b和低浓度漏区域1c,半导体层1a的高浓度源区域1d和高浓度漏区域1e。In FIG. 4 , the pixel switch TFT 30 has an LDD (Lightly Doped Drain) structure, has a scanning line 2, and the channel region 1a' of the semiconductor layer 1a that forms a channel by the electric field from the scanning line 2 includes The scanning line 2 is an insulating film 2a of a gate insulating film insulated from the semiconductor layer 1a, a low-concentration source region 1b and a low-concentration drain region 1c of the semiconductor layer 1a, and a high-concentration source region 1d and a high-concentration drain region 1e of the semiconductor layer 1a.

在扫描线2之上形成分别开孔通往高浓度源区域1d的接触孔81和通往高浓度漏区域1e的接触孔83的第1层间绝缘膜41。A first interlayer insulating film 41 is formed on the scanning line 2 to open a contact hole 81 leading to the high-concentration source region 1d and a contact hole 83 leading to the high-concentration drain region 1e.

在第1层间绝缘膜41之上形成蓄电电容的下部电容电极71,经由接触孔83,电连接于高浓度漏区域1e。在这些之上,形成开孔接触孔81的第2层间绝缘膜42。The lower capacitor electrode 71 of the storage capacitor is formed on the first interlayer insulating film 41 , and is electrically connected to the high-concentration drain region 1 e through the contact hole 83 . On top of these, the second interlayer insulating film 42 opening the contact hole 81 is formed.

在第2层间绝缘膜42之上形成数据线3,经由接触孔81,电连接于高浓度源区域1d。在这些之上依次形成第3层间绝缘膜43和像素电极9a。The data line 3 is formed on the second interlayer insulating film 42 and is electrically connected to the high-concentration source region 1d through the contact hole 81 . On these, the third interlayer insulating film 43 and the pixel electrode 9a are sequentially formed.

另一方面,在TFT 30的下侧,经由基底绝缘膜12设有下侧遮光膜11a。下侧遮光膜11a为了避免从TFT阵列基板10侧入射于装置内的返回光照射TFT30的沟道区域1a′及其周边地对其进行遮光而设置。On the other hand, on the lower side of the TFT 30, a lower light-shielding film 11a is provided via the base insulating film 12. The lower side light-shielding film 11 a is provided to shield the channel region 1 a ′ of the TFT 30 and its surroundings from the return light incident into the device from the TFT array substrate 10 side so as not to irradiate it.

在图5中,图像信号线91由供给串并行展开的多个图像信号VID1~VID6的多条图像信号线91a~91f构成,多条图像信号线91a~91f分别经由作为放电电阻400的多个放电电阻400a~400f当中的对应的一个放电电阻电连接于接地电位线93a。In FIG. 5 , the image signal line 91 is composed of a plurality of image signal lines 91 a to 91 f for supplying a plurality of image signals VID1 to VID6 developed in series and parallel, and the plurality of image signal lines 91 a to 91 f pass through a plurality of discharge resistors 400 respectively. A corresponding one of the discharge resistors 400a to 400f is electrically connected to the ground potential line 93a.

在图6中,放电电阻400在TFT阵列基板10之上经由基底绝缘膜12,由掺杂有杂质的半导体层4a来构成。进而,在放电电阻400与图像信号线91和对向电极电位线99的连接部上,局部地存在着由比放电电阻400浓度高地掺杂有杂质的半导体层4a来构成的高浓度杂质掺杂部分4d和4e。在放电电阻400之上,形成分别开口有通往高浓度杂质掺杂部分4d和4e的接触孔85和87的第1层间绝缘膜41。In FIG. 6 , the discharge resistor 400 is formed of the impurity-doped semiconductor layer 4 a via the base insulating film 12 on the TFT array substrate 10 . Furthermore, on the connection portion between the discharge resistor 400 and the image signal line 91 and the counter electrode potential line 99, there is locally a high-concentration impurity-doped portion composed of the semiconductor layer 4a doped with impurities at a concentration higher than that of the discharge resistor 400. 4d and 4e. On the discharge resistor 400, the first interlayer insulating film 41 having contact holes 85 and 87 leading to the high-concentration impurity-doped portions 4d and 4e, respectively, is formed.

在第1层间绝缘膜41之上,形成图像信号线91d和接地电位线93a。图像信号线91d经由接触孔85电连接于高浓度杂质掺杂部分4d,接地电位线93a经由接触孔87电连接于高浓度杂质掺杂部分4e。在这些之上依次形成第2层间绝缘膜42和第3层间绝缘膜43。On the first interlayer insulating film 41, an image signal line 91d and a ground potential line 93a are formed. The image signal line 91d is electrically connected to the high-concentration impurity doped portion 4d via the contact hole 85 , and the ground potential line 93a is electrically connected to the high-concentration impurity doped portion 4e via the contact hole 87 . On top of these, a second interlayer insulating film 42 and a third interlayer insulating film 43 are sequentially formed.

由于像这样来构成,所以可以有效地防止在连接部上存在着杂质未掺杂的极高电阻的半导体膜部分,防止变得不能得到图像信号线91或对向电极电位线99与放电电阻400之间的导电性的情况。实际上由于在进行杂质掺杂的场合,因掩模的尺寸误差或图形误差等,可能发生这种极高电阻的半导体膜部分,所以像本形态这样通过特意高浓度地进行杂质掺杂而在连接部上构筑进行了低电阻化的部位,实践上大为有利。Due to this configuration, it is possible to effectively prevent the presence of an extremely high-resistance semiconductor film portion not doped with impurities on the connection portion, and prevent the image signal line 91 or the counter electrode potential line 99 from becoming inaccessible to the discharge resistor 400. The conductivity between the situation. In fact, when impurity doping is performed, such an extremely high-resistance semiconductor film portion may occur due to a dimensional error or pattern error of the mask. It is practically advantageous to construct a low-resistance portion on the connection portion.

再者,虽然在本实施形态中,放电电阻400连接于数据线驱动电路用的接地电位线93a,但是也可以连接于扫描线驱动电路用的接地电位线93b。In addition, in this embodiment, the discharge resistor 400 is connected to the ground potential line 93a for the data line driving circuit, but may be connected to the ground potential line 93b for the scanning line driving circuit.

通过对构成放电电阻400的半导体膜4a进行与对构成像素开关用的TFT的半导体膜所进行的杂质掺杂不同的专用的杂质掺杂,使之具有与构成半导体元件的半导体膜不同的电阻值。The semiconductor film 4a constituting the discharge resistor 400 is doped with a dedicated impurity different from the impurity doping performed on the semiconductor film constituting the TFT for pixel switching, so that it has a resistance value different from that of the semiconductor film constituting the semiconductor element. .

接下来,就本实施形态中的放电电阻的制造过程,参照图7和图8,进行说明。这里图7和图8是放电电阻和像素开关用的TFT的制造工序图。Next, the manufacturing process of the discharge resistor in this embodiment will be described with reference to FIGS. 7 and 8 . Here, FIG. 7 and FIG. 8 are manufacturing process diagrams of discharge resistors and TFTs for pixel switches.

首先在图7(a)的工序中,准备例如硅基板、石英基板、玻璃基板等TFT阵列基板10。这里,最好是在N2(氮气)等惰性气体气氛下,以大约850~1300℃,更好是1000℃的高温进行热处理,预先进行前处理以便在以后所实施的高温处理中基板10产生的变形减少。First, in the step of FIG. 7( a ), a TFT array substrate 10 such as a silicon substrate, a quartz substrate, or a glass substrate is prepared. Here, it is preferable to perform heat treatment at a high temperature of about 850-1300° C., more preferably 1000° C., under an atmosphere of an inert gas such as N 2 (nitrogen), and perform pretreatment in advance so that the substrate 10 will be processed at a high temperature later. deformation reduction.

接着,在像这样处理了的TFT阵列基板10的整个面上,通过溅射法等,形成100~500nm左右的膜厚,最好是大约200nm的膜厚的例如Ti、Cr、W、Ta、Mo和Pb等金属或金属硅化物等金属合金膜的遮光层后,通过例如光刻法和蚀刻处理,形成在像素开关用的TFT的下侧所形成的预定图形的下侧遮光膜11a。Next, on the entire surface of the TFT array substrate 10 processed in this way, by sputtering or the like, a film thickness of about 100 to 500 nm, preferably about 200 nm, such as Ti, Cr, W, Ta, After a light-shielding layer of metal such as Mo and Pb or a metal alloy film such as metal silicide, the lower side light-shielding film 11a of a predetermined pattern formed on the lower side of the TFT for pixel switching is formed by, for example, photolithography and etching.

接着,在下侧遮光膜11a之上,通过例如常压或减压CVD(化学汽相淀积)法等用TEOS(正硅酸四乙酯)气体,TEB(硼酸四乙酯)气体,TMOP(tetra methyl oxy phosrate)气体等,形成由进行NSG(无掺杂硅酸盐玻璃)、磷(P)或硼(B)掺杂而成的,PSG、BSG、BPSG等硅酸盐玻璃膜,氮化硅膜,氧化硅膜等所构成的基底绝缘层12。Next, on the lower side light-shielding film 11a, TEOS (tetraethyl orthosilicate) gas, TEB (tetraethyl borate) gas, TMOP ( tetra methyl oxy phosrate) gas, etc., to form silicate glass films such as PSG, BSG, BPSG, etc., which are doped with NSG (non-doped silicate glass), phosphorus (P) or boron (B), nitrogen The insulating base layer 12 is formed of a silicon oxide film, a silicon oxide film, or the like.

接着,在基底绝缘层12之上,通过减压CVD法等形成无定形硅膜,通过热处理,固相生长多晶硅膜。或者,不经由无定形硅膜,通过减压CVD法等直接形成多晶硅膜。接着,对此一多晶硅膜,通过施行光刻法和蚀刻处理形成具有预定图形的第1半导体膜1a和第2半导体膜4a。进而,通过进行热氧化等,形成成为栅绝缘膜的绝缘膜2a。结果,第1半导体膜1a和第2半导体膜4a的厚度,成为大约30~150nm的厚度,最好是大约35~50nm的厚度,绝缘膜2a的厚度,成为大约20~150nm的厚度,最好是大约30~100nm的厚度。Next, an amorphous silicon film is formed on the insulating base layer 12 by a reduced-pressure CVD method or the like, and a polysilicon film is solid-phase grown by heat treatment. Alternatively, the polysilicon film is directly formed by a reduced-pressure CVD method or the like without passing through the amorphous silicon film. Next, on this polysilicon film, a first semiconductor film 1a and a second semiconductor film 4a having a predetermined pattern are formed by performing photolithography and etching. Furthermore, by performing thermal oxidation or the like, an insulating film 2a serving as a gate insulating film is formed. As a result, the thickness of the first semiconductor film 1a and the second semiconductor film 4a is about 30 to 150 nm, preferably about 35 to 50 nm, and the thickness of the insulating film 2a is about 20 to 150 nm, preferably about 20 to 150 nm. It is thickness of about 30-100nm.

接下来在图7(b)的工序中,接着,在像素开关用的TFT部分处,通过例如减压CVD法等把多晶硅膜沉积到大约100~500nm的厚度,进而热扩散磷(P),把此一多晶硅膜导电化后,通过光刻法和蚀刻处理,形成具有预定图形的扫描线2。Next, in the process of FIG. 7(b), next, at the TFT portion for pixel switching, a polysilicon film is deposited to a thickness of about 100 to 500 nm by, for example, a reduced-pressure CVD method, and then thermally diffuses phosphorus (P), After this polysilicon film is made conductive, scanning lines 2 having a predetermined pattern are formed by photolithography and etching.

接下来在图7(c)的工序中,接着,在像素开关用的TFT部分处,通过以低浓度掺杂杂质离子,形成低浓度源区域1b和低浓度漏区域1c的半导体层1a。另一方面,放电电阻部分预先由阻止杂质掺杂用的抗蚀剂60覆盖。Next, in the process of FIG. 7( c ), the semiconductor layer 1a of low-concentration source region 1b and low-concentration drain region 1c is formed by doping impurity ions at a low concentration in the TFT portion for pixel switching. On the other hand, the discharge resistor portion is previously covered with a resist 60 for preventing impurity doping.

接下来在图8(a)的工序中,接着,在像素开关用的TFT部分处,通过以高浓度掺杂杂质离子,形成包括低浓度源区域1b和低浓度漏区域1c,高浓度源区域1d和高浓度漏区域1e的,LDD结构的像素开关用TFT30的半导体膜1a。另一方面,放电电阻部分预先由预定图形的抗蚀剂61覆盖,借此形成包括高浓度掺杂区域4d和4e的,半导体膜4a。Next, in the process of FIG. 8(a), next, at the TFT portion for pixel switching, by doping impurity ions at a high concentration, a low-concentration source region 1b and a low-concentration drain region 1c are formed, and a high-concentration source region 1b is formed. 1d and the high-concentration drain region 1e, the semiconductor film 1a of the pixel switching TFT 30 having an LDD structure. On the other hand, the discharge resistor portion is previously covered with a resist 61 of a predetermined pattern, whereby the semiconductor film 4a including the high-concentration doped regions 4d and 4e is formed.

接下来在图8(b)的工序中,接着,像素开关用的TFT部分整个预先由抗蚀剂62覆盖。放电电阻部分预先由抗蚀剂62覆盖高浓度掺杂区域4d和4e之上,通过以预定的浓度掺杂杂质离子而形成放电电阻400。Next, in the step of FIG. 8( b ), next, the entire TFT portion for pixel switching is covered with a resist 62 in advance. The discharge resistor portion is previously covered with a resist 62 over the high-concentration doped regions 4d and 4e, and the discharge resistor 400 is formed by doping impurity ions at a predetermined concentration.

接下来在图8(c)的工序中,在像素开关用的TFT部分处,形成下部电容电极71和数据线3。另一方面,在放电电阻部分处,形成图像信号线91和接地电位线93a。首先,通过例如干蚀刻法或湿蚀刻法或者它们的组合,在第1层间绝缘膜41中开孔接触孔83、85和87。接着,通过例如减压CVD法等沉积多晶硅膜,进而热扩散磷(P),把此一多晶硅膜进行导电化而形成下部电容电极71、图像信号线91和接地电位线93a。在下部电容电极71之上,进而通过例如减压CVD法、等离子CVD法等沉积由高温氧化硅膜(HTO膜)或氮化硅膜所构成的介电体膜到膜厚50nm左右的比较薄的厚度后,通过溅射把Ti、Cr、W、Ta、Mo和Pb等金属或金属硅化物等金属合金膜形成上部电容电极。这样一来,形成存储电容。接着,在第2层间绝缘层42中开孔接触孔81。接着,沉积导电膜3a,形成数据线3。在其之上,形成第3层间绝缘膜43和像素电极9a。Next, in the process of FIG. 8( c ), the lower capacitive electrode 71 and the data line 3 are formed in the TFT portion for pixel switching. On the other hand, at the discharge resistance portion, an image signal line 91 and a ground potential line 93a are formed. First, contact holes 83, 85, and 87 are formed in first interlayer insulating film 41 by, for example, dry etching or wet etching or a combination thereof. Next, a polysilicon film is deposited by, for example, the reduced-pressure CVD method, and phosphorus (P) is thermally diffused to conduct the polysilicon film to form the lower capacitance electrode 71, the image signal line 91, and the ground potential line 93a. On the lower capacitive electrode 71, a dielectric film made of a high temperature silicon oxide film (HTO film) or a silicon nitride film is deposited to a relatively thin film thickness of about 50 nm by, for example, a reduced pressure CVD method, a plasma CVD method, or the like. After a certain thickness, Ti, Cr, W, Ta, Mo, Pb and other metals or metal alloy films such as metal silicides are formed by sputtering to form the upper capacitor electrode. In this way, a storage capacitor is formed. Next, a contact hole 81 is opened in the second interlayer insulating layer 42 . Next, a conductive film 3 a is deposited to form a data line 3 . Thereon, a third interlayer insulating film 43 and a pixel electrode 9a are formed.

根据本实施形态,则不像前述专利文献2那样由像素部的TFT中用的膜来形成放电电阻400,放电电阻400通过把与对像素开关用的TFT 30等的像素部、周边电路的半导体膜所进行的杂质掺杂不同的专用的杂质掺杂(参照图8(b)),对构成放电电阻400的半导体膜进行,使之具有与构成像素开关用的TFT的半导体膜不同的电阻值。在本实施形态中,放电电阻具有0.1MΩ~5MΩ的电阻值,以便可以在实用上最佳的程度的时间内放电。特别是由于对半导体膜进行专用的杂质掺杂(参照图8(b))而形成放电电阻400,所以关于杂质浓度或杂质种类,或放电电阻400的面积或配置等,可以与像素开关用的TFT 30等构成像素部、周边电路的半导体元件无关地设定。由此,在有限的TFT阵列基板10之上区域上,确保用来形成放电电阻400的区域变得非常容易。特别是即使是小型的液晶装置,或对TFT阵列基板而言图像显示区域10a为大型的液晶装置的场合,确保这种区域也变得容易。这些的结果,以预期的面积且在预期的位置上可以形成具有预期的电阻值的放电电阻400。According to this embodiment, instead of forming the discharge resistor 400 with a film used in the TFT of the pixel portion as in the aforementioned Patent Document 2, the discharge resistor 400 is formed by connecting the pixel portion with the TFT 30 for switching the pixel, and the semiconductor of the peripheral circuit. Exclusive impurity doping (refer to FIG. 8( b )) in which the impurity doping of the film is different is performed on the semiconductor film constituting the discharge resistor 400 so that it has a resistance value different from that of the semiconductor film constituting the TFT for pixel switching. . In this embodiment, the discharge resistor has a resistance value of 0.1 MΩ to 5 MΩ so that the discharge can be performed within a practically optimum time. In particular, since the discharge resistor 400 is formed by performing dedicated impurity doping (refer to FIG. 8(b)) to the semiconductor film, the impurity concentration or impurity type, or the area or arrangement of the discharge resistor 400, etc., can be compared with those used for pixel switching. The TFT 30 and other semiconductor elements constituting the pixel portion and peripheral circuits are set independently. Therefore, it becomes very easy to ensure an area for forming the discharge resistor 400 on the limited area above the TFT array substrate 10 . Especially in the case of a small liquid crystal device or a liquid crystal device in which the image display region 10a is large in terms of a TFT array substrate, it is easy to secure such an area. As a result of these, the discharge resistor 400 having a desired resistance value can be formed in a desired area and at a desired position.

如果像以上这样用本实施形态,则可以极其有效地防止图像信号线91、对向电极电位线99中电荷的残留。According to the present embodiment as described above, it is possible to extremely effectively prevent charge remaining in the image signal line 91 and the counter electrode potential line 99 .

再者,也可以在将构成半导体元件的半导体膜与构成放电电阻的半导体膜在同一工序中成膜和构图后,在不同工序中进行杂质掺杂。或者,也可以在将这些半导体膜在不同工序中成膜和构图后,在不同工序中进行杂质掺杂。Furthermore, after the semiconductor film constituting the semiconductor element and the semiconductor film constituting the discharge resistor are formed and patterned in the same process, impurity doping may be performed in a different process. Alternatively, after these semiconductor films are formed and patterned in different steps, impurity doping may be performed in a different step.

(变形例)(Modification)

接下来,参照图9至图11,就根据本实施形态的变形例进行说明。这里图9是根据本实施形态的第1变形例中的与图5同样的图。图10是第1变形例中的与图6同样的剖视图。图11是第2变形例中的与图6同样的剖视图。Next, a modified example according to this embodiment will be described with reference to FIGS. 9 to 11 . Here, FIG. 9 is a diagram similar to FIG. 5 in the first modification example according to the present embodiment. Fig. 10 is a cross-sectional view similar to Fig. 6 in the first modified example. Fig. 11 is a cross-sectional view similar to Fig. 6 in a second modified example.

如图9和图10中作为第1变形例所示,引绕布线90也可以包括在TFT阵列基板10之上,经由层间绝缘膜通过放电电阻400的上层侧的布线部。在此一构成中,引绕布线90至少在与放电电阻400重叠的区域处,与图像信号线91同层地形成。As shown in FIGS. 9 and 10 as a first modification example, the routing wiring 90 may include a wiring portion on the upper layer side of the discharge resistor 400 on the TFT array substrate 10 via an interlayer insulating film. In this configuration, the routing wiring 90 is formed in the same layer as the image signal line 91 at least in a region overlapping the discharge resistor 400 .

此外,如图11中作为第2变形例所示,引绕布线90也可以包括在TFT阵列基板10之上,经由层间绝缘膜通过放电电阻400的下层侧的布线部。在此一构成中,引绕布线90至少在与放电电阻400重叠的区域处,与像素开关用的TFT的下侧遮光膜11a同层地(TFT阵列基板10与基底绝缘膜12之间的层中)形成。In addition, as shown in FIG. 11 as a second modified example, the routing wiring 90 may include a wiring portion on the TFT array substrate 10 that passes through the lower layer side of the discharge resistor 400 via an interlayer insulating film. In this configuration, the routing wiring 90 is formed in the same layer as the lower light-shielding film 11a of the pixel switching TFT at least in the area overlapping the discharge resistor 400 (a layer between the TFT array substrate 10 and the base insulating film 12). middle) is formed.

这样一来,由于引绕布线90包括通过放电电阻400的上层侧或下层侧的布线部分,所以没有必要为放电电阻400专用而分配形成放电电阻400的TFT阵列基板10之上的平面区域,在其上层侧或下层侧可以配置与放电电阻400不同的引绕布线90、周边电路部分。特别是,只要像本实施形态那样在预定位置上预先设置静电保护电路410(参照图3),不论是否像这样经由层间绝缘膜成为构筑电容器的结构,都可以通过此一部分降低放电电阻400被静电破坏的可能性。In this way, since the routing wiring 90 includes the wiring portion passing through the upper layer side or the lower layer side of the discharge resistor 400, it is not necessary to allocate a planar area on the TFT array substrate 10 forming the discharge resistor 400 exclusively for the discharge resistor 400. The routing wiring 90 different from the discharge resistor 400 and peripheral circuit parts may be arranged on the upper layer side or the lower layer side. In particular, as long as the static electricity protection circuit 410 (refer to FIG. 3 ) is provided in advance at a predetermined position as in this embodiment, the discharge resistance 400 can be lowered by this part regardless of whether the structure of the capacitor is formed through the interlayer insulating film like this. Possibility of electrostatic damage.

进而,图像信号线91由供给串并行展开的多个图像信号VID1~VID6的多条图像信号线91a~91f构成,多条图像信号线91a~91f分别经由作为放电电阻400的多个放电电阻400a~400f当中的对应的一个放电电阻电连接于接地电位线93a。多个放电电阻400a~400f,电阻长度L和电阻宽度W在预定范围内一致,引绕布线90的该布线部分对所有的多个放电电阻400a~400f重叠。Furthermore, the image signal line 91 is composed of a plurality of image signal lines 91a to 91f for supplying a plurality of image signals VID1 to VID6 developed in series and parallel, and the plurality of image signal lines 91a to 91f pass through a plurality of discharge resistors 400a as discharge resistors 400, respectively. A corresponding one of the discharge resistors among ~400f is electrically connected to the ground potential line 93a. In the plurality of discharge resistors 400a to 400f, the resistor length L and the resistor width W match within a predetermined range, and this wiring portion of the routing wiring 90 overlaps all of the plurality of discharge resistors 400a to 400f.

由于像这样来构成,所以多个放电电阻400a~400f,电阻长度L和电阻宽度W在预定范围内一致,最好是,电阻长度L和电阻宽度W一致为同一设计值。借此放电电阻400a~400f的电阻值可以在预定范围内一致(最好是相同)。而且,引绕布线90的布线部分对所有多个放电电阻400a~400f重叠,最好是,对所有多个放电电阻400a~400f相等地重叠。因而,相应于电阻长度L和电阻宽度W一致到什么程度,或者根据相等地重叠到什么程度,从多条图像信号线91a~91f所放电的电荷量相互接近,或者最好是相等。换句话说,放电后的图像信号线91a~91f的电位相互接近,或者最好是相等,可以降低残留电荷的图像信号VID1~VID6的每个系列的不均。由此,可以有效地避免在从检查装置拆卸之际等,产生残留电荷的不均,在像素电极9a和对向电极21间施加不均的直流电压,致使夹持于两电极间的液晶层50(参照图2)因不均而引起烧接的事态。因而,可以有效地防止图像信号VID1~VID6的每个系列的显示不均的发生。With this configuration, the plurality of discharge resistors 400a to 400f have the same resistance length L and resistance width W within a predetermined range, and preferably, the resistance length L and resistance width W are equal to the same design value. Accordingly, the resistance values of the discharge resistors 400a-400f can be consistent (preferably the same) within a predetermined range. Furthermore, the wiring portion of the routing wiring 90 overlaps all of the plurality of discharge resistors 400a to 400f, and preferably overlaps equally to all of the plurality of discharge resistors 400a to 400f. Therefore, depending on how much the resistance length L and the resistance width W match or overlap equally, the amounts of charges discharged from the plurality of image signal lines 91a to 91f are close to each other, or preferably equal. In other words, the potentials of the image signal lines 91a to 91f after discharge are close to each other, or preferably equal to each other, so that the unevenness of each series of image signals VID1 to VID6 of residual charges can be reduced. Thereby, it can be effectively avoided that uneven residual charge occurs when detaching from the inspection device, etc., and uneven DC voltage is applied between the pixel electrode 9a and the counter electrode 21, causing the liquid crystal layer sandwiched between the two electrodes to 50 (refer to FIG. 2 ) is a state of burning due to unevenness. Therefore, it is possible to effectively prevent the occurrence of display unevenness for each series of image signals VID1 to VID6.

进而,因为没有残留电荷的不均,故可以高精度地实施以后再次实施的检查或调整。更具体地说可以有效地避免在进行检查之际,因残留电荷的偏差,变得不能高精度地进行周边电路或像素部处的正常或非正常的判定这样的实践上的大问题。Furthermore, since there is no unevenness in residual charge, inspection or adjustment to be performed again later can be performed with high precision. More specifically, it is possible to effectively avoid the practically serious problem of being unable to accurately determine whether the peripheral circuit or the pixel portion is normal or abnormal due to variation in residual charge during inspection.

再者,在这种残留电荷中,把上述预定范围设定成不产生达到实际的损害的图像信号VID1~VID6的每个系列的不均的程度就可以了。更具体地说,只要既考虑制造误差,又通过实验的、经验的、模拟等方式,把不使残留电荷中产生不均的、与多个放电电阻400a~400f相关的电阻长度L和电阻宽度W的范围,作为上述预定范围进行设定就可以了。此外,只要单纯地,把多个放电电阻400a~400f的电阻长度L和电阻宽度W一致为相同,且把布线部分对所有多个放电电阻400a~400f相等地重叠地设计就足够了。进而最好是,如果在同一工序中,形成这些多个放电电阻400a~400f,则除了制造工序容易外,使电阻值一致也变得容易。In this residual charge, it is only necessary to set the above-mentioned predetermined range to such an extent that there is no unevenness for each series of the image signals VID1 to VID6 that is actually damaged. More specifically, as long as the manufacturing error is taken into consideration, the resistance length L and the resistance width related to the plurality of discharge resistances 400a to 400f that do not cause unevenness in the residual charge can be determined by experiments, experiences, simulations, etc. The range of W may be set as the predetermined range described above. In addition, it is sufficient simply to make the resistance length L and the resistance width W of the plurality of discharge resistors 400a to 400f the same, and to design the wiring portions to overlap equally for all of the plurality of discharge resistors 400a to 400f. Furthermore, it is preferable to form the plurality of discharge resistors 400a to 400f in the same process, in addition to the ease of the manufacturing process, it is also easy to make the resistance values uniform.

<第2实施形态><Second Embodiment>

接下来,就根据第2实施形态的液晶装置的制造方法,参照图3、图7、图8和图12进行说明。图12是表示本实施形态中液晶装置的制造方法的流程图。Next, a method of manufacturing a liquid crystal device according to the second embodiment will be described with reference to FIGS. 3 , 7 , 8 and 12 . FIG. 12 is a flowchart showing a method of manufacturing a liquid crystal device in this embodiment.

在图12中,根据本实施形态的液晶装置的制造方法,包括在TFT阵列基板10之上形成像素部9a,包括数据线驱动电路101、扫描线驱动电路104等的周边电路,外部电路连接端子102,引绕布线90和放电电阻400的第1形成工序(S10),在对向基板20之上形成对向电极21的第2形成工序(S20),以及把TFT阵列基板10和对向基板20相互粘贴的粘贴工序(S30)。In FIG. 12, the method of manufacturing a liquid crystal device according to this embodiment includes forming a pixel portion 9a on a TFT array substrate 10, peripheral circuits including a data line driving circuit 101, a scanning line driving circuit 104, and external circuit connection terminals. 102, the first forming process (S10) of the routing wiring 90 and the discharge resistor 400, the second forming process (S20) of forming the opposing electrode 21 on the opposing substrate 20, and connecting the TFT array substrate 10 and the opposing substrate 20. Pasting process (S30) of pasting each other.

第1形成工序(S10),包括对构成成为如图3中所示的像素部9a或包括数据线驱动电路101、扫描线驱动电路104等的周边电路的至少一部分的半导体元件的第1半导体膜1a(参照图7(c))以第1浓度进行杂质掺杂的第1掺杂工序(S11)。进而,包括与该第1掺杂工序不同地对构成放电电阻400的第2半导体膜4a(参照图8(b))以第2浓度进行杂质掺杂的第2掺杂工序(S12)。The first forming step (S10) includes forming a first semiconductor film on a semiconductor element constituting at least a part of the pixel portion 9a shown in FIG. 1a (see FIG. 7( c )) a first doping step ( S11 ) of doping impurities with a first concentration. Furthermore, a second doping step ( S12 ) of doping the second semiconductor film 4 a (see FIG. 8( b )) constituting the discharge resistor 400 with an impurity at a second concentration differently from the first doping step is included.

根据本实施形态的液晶装置的制造方法,则针对TFT阵列基板10,通过包括成膜处理、构图处理、杂质掺杂处理、高温处理等各种处理的,第1形成工序,可以形成像素部9a,包括数据线驱动电路101、扫描线驱动电路104等的周边电路,外部电路连接端子102,引绕布线90及放电电阻400等。According to the manufacturing method of the liquid crystal device of the present embodiment, for the TFT array substrate 10, the pixel portion 9a can be formed through the first forming process including film forming treatment, patterning treatment, impurity doping treatment, high temperature treatment and other treatments. , including peripheral circuits such as the data line driving circuit 101, the scanning line driving circuit 104, the external circuit connection terminal 102, the routing wiring 90, the discharge resistor 400, and the like.

另一方面,针对对向基板20,通过包括例如成膜处理、构图处理、杂质掺杂处理、高温处理等各种处理的,第2形成工序(S20),可以形成对向电极21等。然后,通过粘贴工序,使TFT阵列基板10和对向基板20可以粘贴,以便最终地成为液晶层50(参照图2)被夹持的形态。On the other hand, the counter electrode 21 and the like can be formed on the counter substrate 20 through a second forming step ( S20 ) including various treatments such as film formation treatment, patterning treatment, impurity doping treatment, and high temperature treatment. Then, the TFT array substrate 10 and the counter substrate 20 can be pasted together through the pasting step so that the liquid crystal layer 50 (see FIG. 2 ) is finally sandwiched.

这里特别是,在形成TFT阵列基板10的第1形成工序(S10)中,通过第1掺杂工序(S11),可以对构成成为像素部9a或包括数据线驱动电路101、扫描线驱动电路104等的周边电路的一部分的半导体元件的第1半导体膜1a以第1浓度进行杂质掺杂(参照图7(c))。In particular, in the first forming step (S10) of forming the TFT array substrate 10, the first doping step (S11) can be used to form the pixel portion 9a or include the data line driving circuit 101 and the scanning line driving circuit 104. The first semiconductor film 1 a of a part of the semiconductor element of peripheral circuits such as the like is doped with impurities at a first concentration (see FIG. 7( c )).

与此相前后,通过与第1掺杂工序(S10)不同的,也就是用来形成放电电阻400的专用的第2掺杂工序(S20),可以对构成放电电阻400的第2半导体膜4a以第2浓度进行杂质掺杂(参照图8(b))。Before and after this phase, the second semiconductor film 4a constituting the discharge resistor 400 can be treated by the second doping step (S20) which is different from the first doping step (S10), that is, a dedicated second doping step (S20) for forming the discharge resistor 400. Impurity doping is performed at a second concentration (see FIG. 8( b )).

因而,根据第2实施形态,则由于不像前述专利文献2那样由像素部的TFT中用的膜来形成放电电阻,对半导体膜进行专用的杂质掺杂而形成放电电阻400,所以关于杂质浓度或杂质种类,或放电电阻400的面积或配置等,可以与构成像素部、包括数据线驱动电路101和扫描线驱动电路104的周边电路的半导体元件无关地设定。由此,与根据第1实施形态的液晶装置的场合同样,具有与构成像素开关用的TFT 30的半导体膜不同的电阻值地形成放电电阻400变得容易。Therefore, according to the second embodiment, the discharge resistor 400 is formed by performing dedicated impurity doping on the semiconductor film instead of forming the discharge resistor 400 from the film used in the TFT of the pixel portion as in the aforementioned Patent Document 2. Therefore, the impurity concentration Or the type of impurity, or the area or arrangement of the discharge resistor 400 , etc., can be set regardless of semiconductor elements constituting the pixel portion and peripheral circuits including the data line driver circuit 101 and the scan line driver circuit 104 . Accordingly, as in the case of the liquid crystal device according to the first embodiment, it becomes easy to form the discharge resistor 400 having a resistance value different from that of the semiconductor film constituting the TFT 30 for switching pixels.

如果像以上这样用本实施形态,则可以比较容易地制造能够非常有效地防止在图像信号线91、对向电极电位线99中电荷残留的液晶装置。According to the present embodiment as described above, it is possible to relatively easily manufacture a liquid crystal device capable of preventing charge remaining in the image signal line 91 and the counter electrode potential line 99 very effectively.

在本实施形态的液晶的制造方法中,在第1形成工序(S10)中,第1半导体膜1a和第2半导体膜4a在第1掺杂工序(S11)和第2掺杂工序(S12)之前在相互同一工序中成膜和构图。In the manufacturing method of the liquid crystal of the present embodiment, in the first forming step (S10), the first semiconductor film 1a and the second semiconductor film 4a are formed in the first doping step (S11) and the second doping step (S12). Previously, film formation and patterning were performed in the same process as each other.

由此,由于第1半导体膜1a和第2半导体膜4a在同一工序中成膜和构图,所以可以谋求制造过程的简化。但是也可以在不同工序中成膜和构图这些半导体膜后,对构成放电电阻的半导体膜进行专用的杂质掺杂。Thus, since the first semiconductor film 1a and the second semiconductor film 4a are formed and patterned in the same step, the manufacturing process can be simplified. However, after forming and patterning these semiconductor films in different steps, it is also possible to perform dedicated impurity doping on the semiconductor films constituting the discharge resistor.

在根据本实施形态的液晶装置的制造方法中,特别是,在第1形成工序(S10)中,在第1掺杂工序(S11)被实施之际,第2半导体膜4a由用来阻止以第1浓度进行的杂质掺杂的第1抗蚀剂61(图8(a))所覆盖。再者,第1抗蚀剂61是覆盖例如图5和图9中61′的单点划线所示的矩形区域的抗蚀剂。In the method of manufacturing a liquid crystal device according to this embodiment, in particular, in the first forming step (S10), when the first doping step (S11) is performed, the second semiconductor film 4a is used to prevent It is covered with the first resist 61 (FIG. 8(a)) doped with impurities at the first concentration. In addition, the first resist 61 is a resist covering, for example, a rectangular area indicated by a dashed line 61' in FIGS. 5 and 9 .

因而,由于在第1掺杂工序(S11)被实施之际,第2半导体膜4a由第1抗蚀剂61(参照图8(a))所覆盖,所以可以相对于构成半导体元件的第1半导体膜1a,关于其杂质浓度或杂质种类,或放电电阻的面积或配置等无关地形成构成放电电阻400的第2半导体膜4a。Therefore, since the second semiconductor film 4a is covered with the first resist 61 (see FIG. 8(a)) when the first doping step (S11) is performed, it can In the semiconductor film 1a, the second semiconductor film 4a constituting the discharge resistor 400 is formed irrespective of its impurity concentration or impurity type, or the area or arrangement of the discharge resistor.

进而,在第1形成工序(S10)中,也可以为:第2掺杂工序(S12)经由使比由第1抗蚀剂61所覆盖的区域宽的区域露出的第2抗蚀剂62以第2浓度进行杂质掺杂地进行制造(参照图8(b)),以便在放电电阻400与图像信号线91和上述对向电极电位线99的至少一方的连接部上,局部地存在着由比放电电阻400浓度高地掺杂有杂质的半导体层来构成的部分。再者,第2抗蚀剂62具有例如图5和图9中62′的虚线所示的矩形的开口部。Furthermore, in the first forming step (S10), the second doping step (S12) may be performed via the second resist 62 that exposes a region wider than the region covered by the first resist 61. Impurity doping with the second concentration is performed (refer to FIG. 8( b )), so that at least one connection portion between the discharge resistor 400 and the image signal line 91 and the above-mentioned counter electrode potential line 99 locally exists due to the ratio The discharge resistor 400 is a portion formed of a semiconductor layer doped with impurities at a high concentration. In addition, the second resist 62 has, for example, a rectangular opening as indicated by a dotted line 62' in FIGS. 5 and 9 .

如果像这样制造,则可以在放电电阻400的连接部上,局部地形成由比放电电阻400浓度高地掺杂有杂质的半导体层来构成的高浓度杂质掺杂部分4d及4e。借此,可以有效地防止在连接部上存在着杂质未掺杂的极高电阻的半导体膜部分,防止出现不能得到图像信号线91或对向电极电位线99与放电电阻400之间的导电性的情况。由于在进行杂质掺杂的场合,因掩模的尺寸误差或图形误差等,可能发生这种极高电阻的半导体膜部分,所以像这样通过用使图形相互微妙地偏移的第1抗蚀剂61和第2抗蚀剂62而在连接部上构筑进行了低电阻化的部位,实践上大为有利。By manufacturing in this way, high-concentration impurity-doped portions 4d and 4e made of a semiconductor layer doped with impurities at a concentration higher than that of the discharge resistor 400 can be locally formed on the connection portion of the discharge resistor 400 . Thereby, it is possible to effectively prevent the presence of an extremely high-resistance semiconductor film portion that is not doped with impurities on the connection portion, and prevent that the conductivity between the image signal line 91 or the counter electrode potential line 99 and the discharge resistor 400 cannot be obtained. Case. In the case of impurity doping, such an extremely high-resistance semiconductor film portion may occur due to a dimensional error or a pattern error of the mask, so by using the first resist whose patterns are slightly shifted from each other like this, 61 and the second resist 62 to build a low-resistance portion on the connecting portion, which is practically advantageous.

在根据本实施形态的液晶装置的制造方法中,引绕布线90包括,在TFT阵列基板10之上,经由层间绝缘膜通过放电电阻400的上层侧或下层侧的布线部分。图像信号线91由供给串并行展开的多个图像信号VID1~VID6的多条图像信号线91a~91f构成,该多条图像信号线91a~91f分别经由作为放电电阻400的多个放电电阻400a~400f当中对应的一个放电电阻电连接于接地电位线。进而,多个放电电阻400a~400f,电阻长度L和电阻宽度W在预定范围内一致,布线部分对所有多个放电电阻400a~400f重叠,第2掺杂工序(S12),在同一工序中对多个放电电阻400a~400f掺杂。In the method of manufacturing a liquid crystal device according to this embodiment, the routing wiring 90 includes a wiring portion passing through the upper layer side or the lower layer side of the discharge resistor 400 on the TFT array substrate 10 via an interlayer insulating film. The image signal line 91 is composed of a plurality of image signal lines 91a to 91f for supplying a plurality of image signals VID1 to VID6 developed in series and parallel, and the plurality of image signal lines 91a to 91f are respectively passed through a plurality of discharge resistors 400a to 91f as the discharge resistor 400 . A corresponding discharge resistor among 400f is electrically connected to the ground potential line. Furthermore, the plurality of discharge resistors 400a-400f, the resistance length L and the resistance width W are consistent within a predetermined range, and the wiring portion overlaps all of the plurality of discharge resistors 400a-400f, and the second doping step (S12) is performed in the same step. The plurality of discharge resistors 400a to 400f are doped.

根据本实施形态的液晶装置的制造方法,则由于通过第2掺杂工序(S12),在同一工序中对多个放电电阻400a~400f掺杂,所以针对多个放电电阻400a~400f,可以使电阻长度L和电阻宽度W一致为同一设计值。因而,可以使对所有多个放电电阻400a~400f把经由层间绝缘膜通过放电电阻400的上层侧或下层侧的布线部分相等地重叠比较容易。可以降低残留电荷的图像信号VID1~VID6的每个系列的不均。由此,可以有效地避免在从检查装置拆卸之际等,产生残留电荷的不均,在像素电极9a和对向电极21间施加不均的直流电压,致使夹持于两电极间的液晶50因不均而引起烧接的事态。因而,可以有效地防止图像信号VID1~VID6的每个系列的显示不均的发生。According to the method of manufacturing a liquid crystal device of this embodiment, since the second doping step (S12) is used to dope the plurality of discharge resistors 400a to 400f in the same step, the plurality of discharge resistors 400a to 400f can be The resistance length L and the resistance width W are the same design value. Therefore, it is possible to make it easier to equally overlap the wiring portions on the upper layer side or the lower layer side of the discharge resistor 400 through the interlayer insulating film for all the plurality of discharge resistors 400a to 400f. It is possible to reduce the unevenness for each series of the image signals VID1 to VID6 of residual charges. Thereby, it can be effectively avoided that uneven residual charge occurs when detaching from the inspection device, etc., and uneven DC voltage is applied between the pixel electrode 9a and the counter electrode 21, causing the liquid crystal 50 sandwiched between the two electrodes to The situation of burning due to unevenness. Therefore, it is possible to effectively prevent the occurrence of display unevenness for each series of image signals VID1 to VID6.

<电子设备><electronic device>

接下来,就把上述作为电光装置的液晶装置运用于各种电子设备的场合进行说明。Next, the case where the above-mentioned liquid crystal device as an electro-optical device is applied to various electronic devices will be described.

首先,就把此一液晶装置用作光阀的投影机进行说明。图13是表示投影机的构成例的俯视图。如此一图13中所示,在投影机1100内部,设有由卤素灯等白色光源构成的灯单元1102。从此一灯单元1102所射出的投影光由配置于光导1104内的四个反射镜1106和两个分色镜1108分离成RGB的三原色,入射于作为对应于各原色的光阀的液晶面板1110R、1110B和1110G。First, a projector in which this liquid crystal device is used as a light valve will be described. FIG. 13 is a plan view showing a configuration example of a projector. As shown in FIG. 13, inside the projector 1100, a lamp unit 1102 composed of a white light source such as a halogen lamp is provided. Projection light emitted from one lamp unit 1102 is separated into three primary colors of RGB by four reflecting mirrors 1106 and two dichroic mirrors 1108 arranged in the light guide 1104, and enters the liquid crystal panel 1110R, which is a light valve corresponding to each primary color. 1110B and 1110G.

液晶面板1110R、1110B和1110G的构成,与上述液晶装置是同等的,由从图像信号处理电路所供给的R、G、B的原色信号分别驱动。而且,由这些液晶面板所调制的光从三个方向入射于分色棱镜1112。在此一分色棱镜1112中,R和B光弯折90°,另一方面G光直线前进。因而,各色的图像被合成的结果,经由投影透镜1114,彩色图像就投影于屏幕等。The configurations of the liquid crystal panels 1110R, 1110B, and 1110G are the same as those of the liquid crystal device described above, and are respectively driven by primary color signals of R, G, and B supplied from the image signal processing circuit. And, the light modulated by these liquid crystal panels enters the dichroic prism 1112 from three directions. In this dichroic prism 1112, the R and B lights are bent by 90°, while the G light goes straight. Therefore, as a result of synthesizing the images of the respective colors, a color image is projected on a screen or the like via the projection lens 1114 .

这里,如果着眼于各液晶面板1110R、1110B和1110G的显示像,则液晶面板1110G的显示像对液晶面板1110R、1110B的显示像有必要翻转。Here, focusing on the display images of the liquid crystal panels 1110R, 1110B, and 1110G, the display images of the liquid crystal panel 1110G must be reversed with respect to the display images of the liquid crystal panels 1110R and 1110B.

再者,由于在液晶面板1110R、1110B和1110G上,由分色镜1108,入射对应于R、G、B各原色的光,所以没有必要设置滤色器。Furthermore, since the light corresponding to the primary colors of R, G, and B is incident on the liquid crystal panels 1110R, 1110B, and 1110G by the dichroic mirror 1108, it is not necessary to provide color filters.

接下来,就把液晶装置运用于移动型的个人计算机的例子进行说明。图14是表示此一个人计算机的构成的透视图。在图14中,计算机1200由具备键盘1202的主体部1204,和液晶显示单元1206来构成。此一液晶显示单元1206通过在前面所述的液晶装置1005的背面附加背光源而构成。Next, an example in which the liquid crystal device is applied to a mobile personal computer will be described. Fig. 14 is a perspective view showing the configuration of this personal computer. In FIG. 14 , a computer 1200 includes a main body 1204 including a keyboard 1202 and a liquid crystal display unit 1206 . This liquid crystal display unit 1206 is constituted by adding a backlight to the back of the above-mentioned liquid crystal device 1005 .

进而,就把液晶装置运用于便携式电话机的例子进行说明。图15是表示此一便携式电话机的构成的透视图。在图15中,便携式电话机1300具有:多个操作按钮1302及反射型的液晶装置1005。在此一反射型的液晶装置1005中,根据需要在其前面设置前光源。Furthermore, an example in which the liquid crystal device is applied to a cellular phone will be described. Fig. 15 is a perspective view showing the structure of this portable telephone. In FIG. 15 , a mobile phone 1300 has a plurality of operation buttons 1302 and a reflective liquid crystal device 1005 . In this reflective liquid crystal device 1005, a front light source is provided in front of it as needed.

再者,除了参照图13至图15说明的电子设备之外,还可以举出液晶电视机,或取景器型、监视器直观型的磁带录像机,汽车导航装置,传呼机,电子手册,台式计算器,文字处理器,工作站,可视电话,POS终端,具备触摸面板的装置等。而且,能够运用于这些各种电子设备是不用说的。Furthermore, in addition to the electronic equipment described with reference to FIGS. devices, word processors, workstations, videophones, POS terminals, devices with touch panels, etc. Furthermore, it goes without saying that it can be applied to these various electronic devices.

<第2实施形态><Second Embodiment>

就本发明的第2实施形态,参照图16和图17进行说明。A second embodiment of the present invention will be described with reference to Fig. 16 and Fig. 17 .

首先,就根据第2实施形态的电光装置的静电保护电路和放电电阻的电构成,参照图16进行说明。这里图16是表示根据第2实施形态的电光装置的静电保护电路和放电电阻的电构成的电路图。再者,在图16中,对与图1至图12中所示的根据第1实施形态的构成要素同样的构成要素赋予同一参照标号,适当省略它们的说明。First, the electrical configuration of the electrostatic protection circuit and the discharge resistor of the electro-optical device according to the second embodiment will be described with reference to FIG. 16 . Here, FIG. 16 is a circuit diagram showing the electrical configuration of the electrostatic protection circuit and the discharge resistor of the electro-optical device according to the second embodiment. In addition, in FIG. 16, the same reference numerals are assigned to the same components as those according to the first embodiment shown in FIGS. 1 to 12, and their descriptions are appropriately omitted.

在根据第2实施形态的电光装置中,与参照图3示出的根据第1实施形态的电光装置同样,图像信号线91的一端电连接于配置于周边区域的外部电路连接端子102,在图像信号线91的中途设有静电保护电路410S。In the electro-optical device according to the second embodiment, as in the electro-optical device according to the first embodiment shown in FIG. An electrostatic protection circuit 410S is provided in the middle of the signal line 91 .

如图16中所示,静电保护电路410S具备P沟道TFT 410a和N沟道TFT 410b。P沟道TFT 410a的栅与供给第1电源信号VDDX的电源信号源94电连接。另一方面,N沟道TFT 410b的栅与供给第2电源信号VSSX的接地电位线93a电连接。因为像这样进行二极管连接,故P沟道TFT 410a和N沟道TFT 410b分别作为二极管发挥功能。由此,在静电,例如经由外部电路连接端子102施加于图像信号线91的场合,在TFT阵列基板10上比较靠近外部电路连接端子102的位置处,可以使静电迅速地经由P沟道TFT 410a释放。因而,静电保护电路410S通过使静电例如经由外部电路连接端子102施加于图像信号线91,可以防止像素开关用的TFT 30被静电破坏。再者,虽然在图16中,仅示出设在用来供给图像信号VID1的图像信号线91的中途的静电保护电路410S,但是在供给图像信号VID2~VID6的图像信号线的各个的中途也设有同样的构成的静电保护电路410S。As shown in FIG. 16, the electrostatic protection circuit 410S has a P-channel TFT 410a and an N-channel TFT 410b. The gate of the P-channel TFT 410a is electrically connected to the power signal source 94 that supplies the first power signal VDDX. On the other hand, the gate of the N-channel TFT 410b is electrically connected to the ground potential line 93a to which the second power supply signal VSSX is supplied. Since the diode connection is performed in this way, the P-channel TFT 410a and the N-channel TFT 410b each function as a diode. Thus, when static electricity, for example, is applied to the image signal line 91 via the external circuit connection terminal 102, the static electricity can be quickly passed through the P-channel TFT 410a at a position on the TFT array substrate 10 that is relatively close to the external circuit connection terminal 102. freed. Therefore, the static electricity protection circuit 410S can prevent the TFT 30 for pixel switching from being destroyed by static electricity by applying static electricity to the image signal line 91 via the external circuit connection terminal 102, for example. In addition, in FIG. 16 , only the static electricity protection circuit 410S provided in the middle of the image signal line 91 for supplying the image signal VID1 is shown, but also in the middle of each of the image signal lines for supplying the image signals VID2 to VID6. An electrostatic protection circuit 410S having the same configuration is provided.

进而,如图16中所示,在根据第2实施形态的电光装置中,图像信号线91在静电保护电路410S内,也就是在TFT阵列基板10上比较靠近外部电路连接端子102的位置处,经由放电电阻400电连接于接地电位线93a。由此,与根据第1实施形态的电光装置同样,可以防止在图像信号线91中电荷残留的情况。再者,在根据第2实施形态的电光装置中,与根据第1实施形态的电光装置不同,在图像信号线91的与连接于外部电路连接端子102的前端相反侧的布线终端处,也可以不经由放电电阻400(参照图3)电连接于接地电位线93a。但是,像这样在位于相反侧的布线终端上,也可以冗长地具备放电电阻400(参照图3)。Furthermore, as shown in FIG. 16, in the electro-optical device according to the second embodiment, the image signal line 91 is inside the electrostatic protection circuit 410S, that is, at a position relatively close to the external circuit connection terminal 102 on the TFT array substrate 10, It is electrically connected to the ground potential line 93 a via the discharge resistor 400 . Thereby, similarly to the electro-optical device according to the first embodiment, it is possible to prevent charge from remaining in the image signal line 91 . Furthermore, in the electro-optical device according to the second embodiment, unlike the electro-optical device according to the first embodiment, at the wiring end of the image signal line 91 opposite to the front end connected to the external circuit connection terminal 102, a It is not electrically connected to the ground potential line 93 a via the discharge resistor 400 (see FIG. 3 ). However, the discharge resistor 400 (see FIG. 3 ) may be redundantly provided on the wiring terminal on the opposite side as described above.

在第2实施形态中特别是,由于放电电阻400设在静电保护电路410S内(更具体地说,从外部电路连接端子102看,在比静电保护电路410S远的一侧将图像信号线91与放电电阻400电连接),故可以使因施加于图像信号线91的静电的存在而导致放电电阻400被静电破坏的可能性非常低。Especially in the second embodiment, since the discharge resistor 400 is provided in the static electricity protection circuit 410S (more specifically, when viewed from the external circuit connection terminal 102, the image signal line 91 and the The discharge resistor 400 is electrically connected), so the possibility of the discharge resistor 400 being damaged by static electricity due to the presence of static electricity applied to the image signal line 91 can be very low.

接下来,就上述静电保护电路和放电电阻的具体的构成,参照图17进行说明。这里图17是表示根据第2实施形态的电光装置的静电保护电路和放电电阻的具体的构成的俯视图。Next, specific configurations of the electrostatic protection circuit and the discharge resistor described above will be described with reference to FIG. 17 . Here, FIG. 17 is a plan view showing a specific configuration of an electrostatic protection circuit and a discharge resistor of an electro-optical device according to a second embodiment.

如图17中所示,静电保护电路410S具备P沟道TFT 410a和N沟道TFT 410b。As shown in FIG. 17, the electrostatic protection circuit 410S has a P-channel TFT 410a and an N-channel TFT 410b.

P沟道TFT 410a由半导体层411a和栅电极412a来构成。The P-channel TFT 410a is composed of a semiconductor layer 411a and a gate electrode 412a.

栅电极412a由与扫描线2(参照图4)相同的膜来形成,经由接触孔812与由与下部电容电极71(参照图4)相同的膜所形成的电源信号线94电连接。再者,所谓“相同的膜”指的是在制造工序中的同一工序中所成膜的膜,是同一种类的膜,所谓“是相同膜”并不是必须连成一张膜的意思,基本上是,只要是相同的膜当中相互分断的膜部分就足够了。Gate electrode 412a is formed of the same film as scanning line 2 (see FIG. 4 ), and is electrically connected to power signal line 94 formed of the same film as lower capacitive electrode 71 (see FIG. 4 ) through contact hole 812 . Furthermore, the so-called "same film" refers to the film formed in the same process in the manufacturing process, which is the same type of film. The so-called "same film" does not mean that it must be connected into one film. Yes, it is sufficient as long as it is the part of the film that is separated from each other in the same film.

半导体层411a由与半导体层1a(参照图4)相同的膜来形成。半导体层411a的源区域经由接触孔811a与电源信号线94电连接。另一方面,半导体层411a的漏区域,经由接触孔813a与图像信号线91电连接。The semiconductor layer 411a is formed of the same film as that of the semiconductor layer 1a (see FIG. 4 ). The source region of the semiconductor layer 411a is electrically connected to the power signal line 94 via the contact hole 811a. On the other hand, the drain region of the semiconductor layer 411a is electrically connected to the video signal line 91 through the contact hole 813a.

N沟道TFT 410b由半导体层411b和栅电极412b来构成。The N-channel TFT 410b is composed of a semiconductor layer 411b and a gate electrode 412b.

栅电极412b由与扫描线2相同的膜来形成,经由接触孔812b与电源信号线94电连接。The gate electrode 412b is formed of the same film as the scanning line 2, and is electrically connected to the power signal line 94 through the contact hole 812b.

半导体层411b由与半导体层1a相同的膜来形成。半导体层411b的源区域,经由接触孔811b与接地电位线93a电连接。另一方面,半导体层411b的漏区域,经由接触孔813b与图像信号线91电连接。The semiconductor layer 411b is formed of the same film as that of the semiconductor layer 1a. The source region of the semiconductor layer 411b is electrically connected to the ground potential line 93a through the contact hole 811b. On the other hand, the drain region of the semiconductor layer 411b is electrically connected to the image signal line 91 through the contact hole 813b.

在图17中,在静电保护电路410S内,设有放电电阻400。放电电阻400成为与参照图6说明的第1实施形态中的放电电阻大致同样的构成。放电电阻400经由接触孔841与接地电位线93a电连接,经由接触孔842与图像信号线91电连接。由于像这样放电电阻400形成到静电保护电路410S内,所以不会招致TFT阵列基板10、电光装置总体的大型化。In FIG. 17 , a discharge resistor 400 is provided in an electrostatic protection circuit 410S. The discharge resistor 400 has substantially the same configuration as the discharge resistor in the first embodiment described with reference to FIG. 6 . The discharge resistor 400 is electrically connected to the ground potential line 93 a through the contact hole 841 , and is electrically connected to the image signal line 91 through the contact hole 842 . Since the discharge resistor 400 is formed in the static electricity protection circuit 410S in this way, the overall size of the TFT array substrate 10 and the electro-optical device will not be increased.

进而,在本实施形态中,放电电阻400构成为,具有沿着接地电位线93a的第1部分401和沿着图像信号线91的第2部分402。由此,比起假如放电电阻400仅由直线地连接接地电位线93a和图像信号线91间的部分构成,没有第1部分401和第2部分402的场合来,可以高电阻地形成放电电阻400。也就是说,通过沿着接地电位线93a加长第1部分401,或者除此以外或者取而代之地通过沿着图像信号线91加长第2部分402,可以加长接触孔841和842相互间的距离,可以以与此一长度成比例的形式提高放电电阻400的电阻值。在此一场合,为了使放电电阻400成为高电阻,没有必要加宽包括接地电位线93a和图像信号线91的排列成条带状的多条布线中的布线间距。这种特征在TFT阵列基板10上的有限的布线区域内既谋求布线的微细化又使放电电阻400高电阻化方面,实践上非常有利。Furthermore, in the present embodiment, the discharge resistor 400 is configured to have a first portion 401 along the ground potential line 93 a and a second portion 402 along the image signal line 91 . Thus, compared to the case where the discharge resistor 400 is composed of only a portion linearly connected between the ground potential line 93a and the image signal line 91 without the first portion 401 and the second portion 402, the discharge resistor 400 can be formed with high resistance. . That is, by lengthening the first portion 401 along the ground potential line 93a, or in addition to or instead of lengthening the second portion 402 along the image signal line 91, the mutual distance between the contact holes 841 and 842 can be lengthened. The resistance value of the discharge resistor 400 is increased in proportion to this length. In this case, in order to increase the resistance of the discharge resistor 400, it is not necessary to widen the wiring pitch among the plurality of wirings including the ground potential line 93a and the video signal line 91 arranged in strips. This feature is practically very advantageous in achieving miniaturization of the wiring and increasing the resistance of the discharge resistor 400 in the limited wiring area on the TFT array substrate 10 .

像以上说明的这样,根据第2实施形态的电光装置,则由于在图像信号线91的连接于放电电阻400的部分与外部电路连接端子102之间存在静电保护电路410S,即使形成微小尺寸的放电电阻400,也可以使因静电的存在而导致的该微小尺寸的放电电阻400被静电破坏的可能性非常低。如果像这样把放电电阻400形成到静电保护电路410S内,则不会招致TFT阵列基板10、电光装置总体的大型化,而且,不会招致静电破坏引起的装置的不良。As described above, according to the electro-optic device of the second embodiment, since the electrostatic protection circuit 410S is provided between the portion of the image signal line 91 connected to the discharge resistor 400 and the external circuit connection terminal 102, even if a minute-sized discharge is formed, The resistor 400 can also reduce the possibility of the discharge resistor 400 being damaged by static electricity due to the presence of static electricity. Forming the discharge resistor 400 in the static electricity protection circuit 410S in this way does not increase the overall size of the TFT array substrate 10 and the electro-optical device, and also does not cause device failure due to electrostatic breakdown.

本发明不限于上述实施形态,在不背离由技术方案和说明书总体所表达的发明精神或思想的范围内可进行适当变更,伴随这种变更的电光装置和具备该电光装置的电子设备也属于本发明的技术范围。The present invention is not limited to the above-mentioned embodiments, and can be appropriately changed within the scope of not departing from the spirit or idea of the invention expressed by the technical solution and the description as a whole, and the electro-optical device accompanied by such a change and the electronic equipment equipped with the electro-optical device also belong to this invention. The technical scope of the invention.

Claims (17)

1. an electro-optical device is characterized in that,
On substrate, possess:
Be arranged in a plurality of pixel portions of pixel region,
Be disposed at the periphery that is positioned at aforementioned pixel region the neighboring area, be used for controlling the peripheral circuit of aforementioned a plurality of pixel portions, and
Be used for supplying with the image signal line of picture signal and the earthing potential line of supply earthing potential to aforementioned peripheral circuit,
Aforementioned image signal line is electrically connected on aforementioned earthing potential line via by than the high discharge resistance that film constituted of conducting film resistance that constitutes aforementioned image signal line and aforementioned earthing potential line.
2. the electro-optical device described in claim 1 is characterized in that, wherein,
Aforementioned pixel portions has pixel electrode,
Possess: with aforementioned pixel electrode pair to counter electrode, and
Be used for the counter electrode current potential is supplied to the counter electrode equipotential line of aforementioned counter electrode.
3. the electro-optical device described in claim 2 is characterized in that, wherein,
Aforementioned counter electrode equipotential line is electrically connected on aforementioned earthing potential line via by than the high discharge resistance that film constituted of conducting film resistance that constitutes aforementioned counter electrode equipotential line and aforementioned earthing potential line.
4. the electro-optical device described in claim 3 is characterized in that, wherein,
In the wiring of at least one side in aforementioned image signal line and aforementioned counter electrode equipotential line,
One end of this wiring is electrically connected on the external circuit-connecting terminal that is disposed at aforementioned neighboring area,
The other end of this wiring is electrically connected on aforementioned earthing potential line via aforementioned discharge resistance.
5. the electro-optical device described in claim 2 is characterized in that, wherein,
In the wiring of at least one side in aforementioned image signal line and the aforementioned counter electrode equipotential line,
One end of aforementioned at least one side's wiring is electrically connected on the external circuit-connecting terminal that is disposed at aforementioned neighboring area,
In the holding circuit that is provided with at least one side in electrostatic discharge protective circuit and the input protection circuit midway of aforementioned at least one side's wiring,
In aforementioned at least one side's the holding circuit that is routed in aforementioned at least one side, be electrically connected on aforementioned earthing potential line via aforementioned discharge resistance.
6. the electro-optical device described in claim 2 is characterized in that, wherein,
In the wiring of at least one side in aforementioned image signal line and aforementioned counter electrode equipotential line,
One end of aforementioned at least one side's wiring is electrically connected on the external circuit-connecting terminal that is disposed at aforementioned neighboring area,
In the holding circuit that is provided with at least one side in electrostatic discharge protective circuit and the input protection circuit midway of aforementioned at least one side's wiring,
Aforementioned at least one side's wiring see a side far away than aforementioned at least one side's holding circuit from aforementioned external circuit-connecting terminal, is electrically connected on aforementioned earthing potential line via aforementioned discharge resistance.
7. the electro-optical device described in the claim 2 to 6 any one is characterized in that, wherein,
Aforementioned counter electrode equipotential line is electrically connected on identical aforementioned earthing potential line mutually with aforementioned image signal line via aforementioned discharge resistance.
8. the electro-optical device described in the claim 1 to 6 any one is characterized in that, wherein,
Aforementioned discharge resistance is made of semiconductor film, will with the different impurity of the impurity that semiconductor film mixed of the semiconductor element of at least a portion that formation is become aforementioned pixel portions or aforementioned peripheral circuit, the semiconductor film that constitutes aforementioned discharge resistance is mixed.
9. the electro-optical device described in the claim 1 to 6 any one is characterized in that, wherein, on aforesaid base plate, draw around wiring comprise, via interlayer dielectric by the upper layer side of aforementioned discharge resistance or the wiring portion of lower layer side.
10. the electro-optical device described in claim 9 is characterized in that, wherein,
Aforementioned image signal line is made of the multiple bar chart image signal line of a plurality of picture signals of supplying with the serial parallel expansion,
This multiple bar chart image signal line is electrically connected on aforementioned earthing potential line via each of a plurality of aforementioned discharge resistances respectively,
Aforementioned a plurality of discharge resistance, the length of its resistance is consistent in preset range with width,
Aforementioned wiring portion and all aforementioned a plurality of discharge resistances are overlapping.
11. the electro-optical device described in the claim 2 to 6 any one is characterized in that, wherein,
Aforementioned discharge resistance is made of the semiconductor film that is doped with impurity,
Connecting portion place at least one side of aforementioned discharge resistance and aforementioned image signal line and aforementioned counter electrode equipotential line exists the part that is made of the aforesaid semiconductor film that is doped with impurity than aforementioned discharge resistance concentration highland partly.
12. the manufacture method of an electro-optical device, this electro-optical device, on substrate, possess: a plurality of pixel portions that are arranged in pixel array region, be disposed at the neighboring area of the periphery that is positioned at aforementioned pixel array region, be used for driving the peripheral circuit of aforementioned a plurality of pixel portions, be used for supplying with the image signal line of picture signal and the earthing potential line of supply earthing potential to aforementioned peripheral circuit, be arranged at the pixel electrode of aforementioned pixel portions, with aforementioned pixel electrode pair to counter electrode, and the counter electrode equipotential line that is used for supplying with the counter electrode current potential to aforementioned counter electrode, aforementioned image signal line is via by than the high discharge resistance that film constituted of conducting film resistance that constitutes aforementioned image signal line and aforementioned earthing potential line, be electrically connected on aforementioned earthing potential line, this manufacture method is characterised in that, comprising:
On aforesaid base plate, form the 1st of aforementioned pixel portions, aforementioned peripheral circuit and aforementioned discharge resistance and form operation,
On the subtend substrate, form the 2nd of aforementioned counter electrode and form operation, and
The stickup operation that aforesaid base plate and aforementioned subtend substrate are pasted mutually,
The aforementioned the 1st forms operation comprises: the 1st semiconductor film of semiconductor element that formation is become at least a portion of aforementioned pixel portions or aforementioned peripheral circuit carries out the 1st doping operation of doping impurity and differently the 2nd semiconductor film that constitutes aforementioned discharge resistance is carried out the 2nd doping operation of doping impurity with the 2nd concentration with the 1st doping operation with the 1st concentration.
13. the manufacture method of the electro-optical device described in claim 12 is characterized in that, wherein, form in the operation the aforementioned the 1st, the aforementioned the 1st with the 2nd semiconductor film the aforementioned the 1st with the 2nd doping operation before in identical mutually operation film forming and composition.
14. the manufacture method of the electro-optical device described in claim 12 or 13, it is characterized in that, wherein, form in the operation the aforementioned the 1st, when implementing aforementioned the 1st doping operation, aforementioned the 2nd semiconductor film is by being used for stoping the 1st resist of the doping impurity of carrying out with aforementioned the 1st concentration to cover.
15. the manufacture method of the electro-optical device described in claim 14, it is characterized in that, wherein, form in the operation the aforementioned the 1st, aforementioned the 2nd doping operation is via making the 2nd resist that exposes than the regional wide zone that is covered by aforementioned the 1st resist, carry out doping impurity with aforementioned the 2nd concentration, so that the connecting portion place at least one side of aforementioned discharge resistance and aforementioned image signal line and aforementioned counter electrode equipotential line exists the part that is made of the aforesaid semiconductor film that is doped with impurity than aforementioned discharge resistance concentration highland partly.
16. manufacture method as claim 12 or 13 described electro-optical devices, it is characterized in that, wherein, on aforesaid base plate, have and draw around wiring, aforementioned drawing around wiring comprises, on aforesaid base plate, via interlayer dielectric by the upper layer side of aforementioned discharge resistance or the wiring portion of lower layer side, aforementioned image signal line is made of the multiple bar chart image signal line of a plurality of picture signals of supplying with the serial parallel expansion, this multiple bar chart image signal line is electrically connected on aforementioned earthing potential line via a discharge resistance as the correspondence in a plurality of discharge resistances of aforementioned discharge resistance respectively, aforementioned a plurality of discharge resistance, its resistance length is consistent in preset range with the resistance width, aforementioned wiring portion and all aforementioned a plurality of discharge resistances are overlapping
Aforementioned the 2nd doping operation is mixed to aforementioned a plurality of discharge resistances in same operation.
17. an electronic equipment is characterized in that, wherein possesses the electro-optical device described in any one in the claim 1 to 11.
CN2006100082539A 2005-02-17 2006-02-16 Electro-optical device, manufacturing method thereof, and electronic device Expired - Fee Related CN100406979C (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP2005040113 2005-02-17
JP040113/2005 2005-02-17
JP286393/2005 2005-09-30

Publications (2)

Publication Number Publication Date
CN1821841A CN1821841A (en) 2006-08-23
CN100406979C true CN100406979C (en) 2008-07-30

Family

ID=36923291

Family Applications (1)

Application Number Title Priority Date Filing Date
CN2006100082539A Expired - Fee Related CN100406979C (en) 2005-02-17 2006-02-16 Electro-optical device, manufacturing method thereof, and electronic device

Country Status (1)

Country Link
CN (1) CN100406979C (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN106932981A (en) * 2012-01-12 2017-07-07 精工爱普生株式会社 Liquid-crystal apparatus and electronic equipment

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103513459A (en) * 2013-10-14 2014-01-15 北京京东方光电科技有限公司 Array substrate and preparing method thereof, display device and preparing method thereof
CN103984194B (en) * 2014-03-21 2016-04-06 苏州佳世达光电有限公司 Projector
CN209592036U (en) * 2019-05-31 2019-11-05 北京京东方技术开发有限公司 Display substrate and display device

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH07318980A (en) * 1994-03-30 1995-12-08 Nec Corp Liquid crystal display panel
CN1196547A (en) * 1997-04-14 1998-10-21 卡西欧计算机株式会社 Display device with destaticizing element
JPH11212113A (en) * 1998-01-22 1999-08-06 Toshiba Corp Manufacturing method of liquid crystal display device

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH07318980A (en) * 1994-03-30 1995-12-08 Nec Corp Liquid crystal display panel
CN1196547A (en) * 1997-04-14 1998-10-21 卡西欧计算机株式会社 Display device with destaticizing element
JPH11212113A (en) * 1998-01-22 1999-08-06 Toshiba Corp Manufacturing method of liquid crystal display device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN106932981A (en) * 2012-01-12 2017-07-07 精工爱普生株式会社 Liquid-crystal apparatus and electronic equipment

Also Published As

Publication number Publication date
CN1821841A (en) 2006-08-23

Similar Documents

Publication Publication Date Title
CN100394285C (en) Electro-optical device and electronic equipment having the same
JP4297103B2 (en) ELECTRO-OPTICAL DEVICE, MANUFACTURING METHOD THEREOF, AND ELECTRONIC DEVICE
CN102193262B (en) Electro-optical device and electronic equipment
US6864505B2 (en) Electro-optical device and electronic apparatus
CN101241284A (en) Substrate for electro-optical device, electro-optical device, and electronic device
CN100547472C (en) Electro-optical device, manufacturing method thereof, and electronic device
CN100445851C (en) Electro-optic devices and electronics
JP2005260145A (en) ELECTRO-OPTICAL DEVICE, MANUFACTURING METHOD THEREOF, AND ELECTRONIC DEVICE
CN1996604A (en) Electro-optic device, method for fabricating the same, and electronic apparatus
TWI310540B (en) Electro-optical device and electronic apparatus
CN100477237C (en) Electro-optic device, manufacturing method thereof, electronic device, and capacitor
CN100406979C (en) Electro-optical device, manufacturing method thereof, and electronic device
JP4069597B2 (en) Electro-optical device and electronic apparatus
JP4123245B2 (en) Electro-optical device and electronic apparatus
JP5195455B2 (en) ELECTRO-OPTICAL DEVICE, MANUFACTURING METHOD THEREOF, AND ELECTRONIC DEVICE
JP2010008635A (en) Method of manufacturing substrate for electrooptical device, substrate for electrooptical device, electrooptical device, and electronic equipment
US20250284164A1 (en) Electro-optical device and electronic apparatus
JP4984911B2 (en) Electro-optical device and electronic apparatus
JP5343476B2 (en) Electro-optical device and electronic apparatus
JP2011221119A (en) Electro-optic device, electronic equipment, and manufacturing method of electro-optic device
JP2008205248A (en) Semiconductor device and manufacturing method thereof, electro-optical device and manufacturing method thereof, and electronic apparatus
JP2004004723A (en) Electro-optical devices and electronic equipment
JP5278584B2 (en) Electro-optical device and electronic apparatus
JP2009295725A (en) Method for manufacturing of substrate for electrooptical device, substrate for electrooptical device, electrooptical device, and electronic device
JP4797453B2 (en) Electro-optical device manufacturing method, electro-optical device, electronic apparatus, and semiconductor substrate manufacturing method

Legal Events

Date Code Title Description
C06 Publication
PB01 Publication
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
C14 Grant of patent or utility model
GR01 Patent grant
CF01 Termination of patent right due to non-payment of annual fee
CF01 Termination of patent right due to non-payment of annual fee

Granted publication date: 20080730

Termination date: 20210216