CN109993243A - A product anti-counterfeiting traceability system based on transparent film RFID chip - Google Patents

Abstract

The invention discloses a commodity anti-counterfeiting traceability system based on a transparent film RFID chip. The RFID chip includes a transparent film substrate and a chip layout on the transparent film substrate. The chip layout includes a rectifier circuit, a modulation circuit, a digital logic circuit, an antenna and a tuning circuit. The fully transparent thin film transistors in the chip layout circuit are all ZnO‑TFT devices , after the RFID chip is made into a label, the two ends of the product seal are bridged, which is convenient for opening the product package and destroying the label. The identification code written in advance by the RFID chip can be read by a special reader or a mobile phone with NFC function, and through the network database. Recording and querying of packaging, storage, delivery, sales and other information of commodities. The invention applies a stable transparent RFID chip, which has high technical barriers and is difficult to imitate; the transparent film substrate is easily destroyed and cannot be repaired without affecting the appearance of the product; The anti-counterfeiting system can be applied to the anti-counterfeiting of various commodities.

Description

A product anti-counterfeiting traceability system based on transparent film RFID chip

technical field

The invention relates to anti-counterfeiting and RFID chip design technology, in particular to a product anti-counterfeiting traceability system based on a transparent film substrate RFID chip.

Background technique

RFID chips have been widely used in access control, payment, logistics, identity recognition, anti-counterfeiting and other fields in recent years. At present, most of the RFID chips on the market are silicon chips, and transparent thin-film chips belong to a relatively new field, and there are very few international research institutions or companies.

At present, commodity anti-counterfeiting is mainly divided into destructive anti-counterfeiting, glorious light-changing anti-counterfeiting and RFID chip anti-counterfeiting. Destructive anti-counterfeiting refers to the technology that the action of opening the seal can destroy the product packaging or packaging accessories at the same time, which can effectively prevent the packaging from being reused, and does not require additional learning costs for consumers, but it is not conducive to the preservation of goods and has a low safety factor. Glorious light-changing anti-counterfeiting refers to printing light-changing text or patterns on the packaging, which can present different colors at different angles and under different lighting conditions. RFID chip anti-counterfeiting is to attach an RFID chip to the packaging seal, and use a card reader or mobile phone to identify the chip information to prevent forgery. However, since the existing RFID tag uses a silicon-based chip, although the antenna is easily damaged, the chip is difficult to be destroyed, so there are hidden dangers of being read and reused. In practical applications, a variety of anti-counterfeiting methods are generally used to increase reliability.

SUMMARY OF THE INVENTION

In order to solve the problems in the background art, the present invention provides a product anti-counterfeiting traceability system based on a transparent film base RFID chip. The invention applies a stable transparent RFID chip, which has high technical barriers and is difficult to imitate; the transparent film base is fragile and irreparable, and It does not affect the appearance of the product. The special reader adopts encryption protocol and algorithm. It is a complete set of anti-counterfeiting system that is difficult to copy and cannot be reused. It can be applied to the anti-counterfeiting of various commodities.

The present invention adopts following technical scheme:

The RFID chip of the present invention includes a transparent film substrate and a chip layout on the transparent film substrate. The chip layout includes a rectifier circuit, a modulation circuit, a digital logic circuit, an antenna and a tuning circuit. The circuit is connected with the modulation circuit;

The fully transparent thin film transistors in the circuit of the chip layout all use ZnO-TFT devices, and the ZnO-TFT devices include an ITO source layer, an ITO drain layer, a ZnO layer, and a first Al ₂ O ₃ layer that are sequentially formed on the transparent thin film substrate. , the second Al ₂ O ₃ layer, the ITO gate region layer and the barrier layer, the ITO source region layer and the ITO drain region layer are respectively located on both sides of the bottom of the ZnO-TFT device and are in the same layer; the middle part of the ZnO layer is embedded downward in the ITO source A rectangular depression is formed between the region layer and the ITO drain layer, and the two sides of the ZnO layer are respectively deposited on the upper surface of the ITO source layer and the ITO drain layer; the first Al ₂ O ₃ layer is deposited on the upper surface of the ZnO layer and also has a rectangular shape. Concave, with the same structure as the ZnO layer, the middle part of the second Al ₂ O ₃ layer covers the upper surface of the first Al ₂ O ₃ layer and the lower surface of the middle part of the second Al ₂ O ₃ layer protrudes downward and covers the first Al ₂ O The middle of the ₃ layers is recessed, and both sides of the second Al ₂ O ₃ layer extend to the upper surfaces of the ITO source layer and the ITO drain layer respectively; the middle of the upper surfaces of the ITO source layer and the ITO drain layer respectively extend from the second Al ₂ O ₃ Inverted L-shaped protrusions are formed on the first Al ₂ O ₃ layer after the two sides are penetrated; the ITO gate region layer is tiled in the middle of the upper surface of the second Al ₂ O ₃ layer; the ITO gate region layer has both sides. The barrier layer is isolated from the ITO gate region layer, and the two barrier layers are respectively located on the inverted L-shaped protrusion of the ITO source region layer, the upper surface of the second Al ₂ O ₃ layer, and the inverted L-shaped protrusion of the ITO drain region layer. Starting from the upper surface of the second Al ₂ O ₃ layer, the inner sides of the two barrier layers close to the ITO gate region layer are respectively vertically flush with the two sides of the first Al ₂ O ₃ layer.

The transparent film substrate is made of glass, PET, PI and other materials.

The preparation process of the ZnO-TFT device is as follows:

S1: Deposit a layer of 200nm ITO as the source and drain layers on the cleaned transparent film substrate, spin-coat photoresist on the upper surface of the source and drain layers, and use a photolithography machine to expose and transfer the pattern to the transparent film substrate, and photolithography After the glue is dissolved and denatured, the source and drain layers are etched to form a part of the ITO source layer and the ITO drain layer;

S2: use atomic layer deposition ALD equipment to deposit ZnO thin film on the ITO source layer and ITO drain layer as ZnO layer; surface anneal and deposit Al ₂ O ₃ thin film on the ZnO layer as the first Al ₂ O ₃ layer, using light The etching process etches the ZnO layer and the first Al ₂ O ₃ layer, so that a channel is formed on both sides of the ZnO layer and the first Al ₂ O ₃ layer;

S3: deposit a layer of Al ₂ O ₃ on the upper surface of the first Al ₂ O ₃ layer and the upper surfaces of the ITO source layer and the ITO drain layer as the second Al ₂ O ₃ layer, on both sides of the second Al ₂ O ₃ layer Extend into the channels on both sides of the ZnO layer and the first Al ₂ O ₃ layer respectively, and then use 1% HF solution to form channels by photolithography on both sides of the second Al ₂ O ₃ layer near the edge, so that the second Al ₂ The O ₃ layer does not completely cover the upper surfaces of the ITO source layer and the ITO drain layer;

S4: deposit an ITO layer of 100 nm on the upper surface of the structure obtained in step S3, the two sides of the ITO layer extend to the edges of both sides of the second Al ₂ O ₃ layer and are partially deposited into the channels on both sides of the second Al ₂ O ₃ layer, Then the ITO layer between the via holes on both sides of the second Al ₂ O ₃ layer to the middle of the second Al ₂ O ₃ layer is peeled off, and the ITO layer remaining on the upper surface of the second Al ₂ O ₃ layer after peeling is used as the ITO gate region layer , the ITO layers remaining on both sides after stripping are used as another part of the ITO source layer and the ITO drain layer respectively, and a part of the ITO source layer and the ITO drain layer prepared in step S2 together form the ITO source layer and the ITO drain layer. Floor;

S5: Coat a layer of photoresist on the upper surface of the ITO source region layer as a blocking region, and obtain the blocking layers located on both sides of the ITO gate region layer by etching through a photolithography process, and the blocking layers are close to the inner side of the ITO gate region layer respectively with Both sides of the first Al ₂ O ₃ layer are vertically flush;

S6: Deuterium doping: Use deuterium gas to perform ion implantation doping in the upper region between the two barrier layers at room temperature, and the lower region corresponding to the barrier layer cannot be ion implanted and doped under the blocking effect of the barrier layer.

The deuterium doping is used to control the variation of the threshold voltage of the ZnO-TFT.

The first Al ₂ O ₃ layer is a protective layer, the second Al ₂ O ₃ layer is a gate oxide layer, an ITO gate region layer is a gate electrode, and an ITO source region layer and an ITO drain region layer are respectively used as a source electrode and a drain electrode.

Each of the RFID chips has a corresponding identification code. The identification code is written before the RFID chip is attached to the seal as a label. The wireless communication device supplies power to the RFID chip when it is close to the RFID chip. The inherent nature of the circuit in the RFID chip The frequency resonates to a specific frequency through the tuning circuit, the antenna obtains energy from the wireless communication device, the rectifier circuit rectifies the energy into direct current to supply power to the digital logic circuit, the digital logic circuit generates the identification code signal in the RFID chip and outputs it to the modulation circuit, and the modulation circuit will identify the After the code signal is modulated to a specific frequency, it is transmitted to the wireless communication device through the antenna. The wireless communication device demodulates the modulated signal and restores it to an identification code signal. The wireless communication device reads and displays the commodity information on the RFID chip, and at the same time, the reading time Write to the network database.

The network database is used to record the packaging, storage, delivery time and place of commodities, sales conditions and consumer inquiry records. Consumers can read and query the purchased commodity information from the network database through a reader.

The specific frequency is 13.56MHz.

The wireless communication device adopts a dedicated reader or a mobile phone with NFC function.

The wireless communication device is provided with a one-key function of burning the RFID chip, and the RFID chip can be burned by increasing the power of the wireless communication device when starting the wireless communication device, so as to prevent the chip from being reused for counterfeit goods.

The components in the circuit of the chip layout are all transparent components, and the components include fully transparent thin film transistors, capacitors, and wires, wherein the capacitors are mainly composed of upper and lower ITO layers and an insulating layer between the two ITO layers.

The inverter structure in the circuit of the chip layout is a depletion load inverter.

The digital logic circuit is mainly composed of a ring oscillator, a counter, a decoder, a memory, a Manchester encoder and a D flip-flop. The digital logic circuit is composed of a ring oscillator to generate a global clock. The counter counts according to the clock frequency of the global clock. The same address signal obtained by counting is transmitted to two decoders respectively, and the two decoders obtain the address signals on the word line and bit line in the ROM respectively, and take out the identification code data from the ROM, and the decoder The data on the bit line and word line of the read-only memory is shaped by the D flip-flop and sent to the Manchester encoder, and the Manchester encoder outputs the encoded data as an identification code signal to the modulation circuit.

The RFID tag is mainly composed of a transparent zinc oxide thin film transistor, and the ZnO-TFT device adopts a bottom gate structure.

The thickness of the transparent film substrate is 100-700 μm.

The antenna is printed on the periphery of the RFID chip circuit, and can be divided into a square or a circle according to the shape of the seal. The outer side of the square antenna is 1-4cm long, and the diameter of the circular antenna is 2cm. .

After the RFID chip is made into a label, it is attached to the seal and bridges both sides of the seal.

The beneficial effects that the present invention has are:

1) The fully transparent chip of the present invention is a new field in the world. At present, there are very few research groups that can realize the transparent radio frequency tag chip. Therefore, compared with the traditional chip, the fully transparent chip of the present invention has a high appearance and a high degree of recognition. It is difficult to counterfeit, which can effectively prevent counterfeiters from deceiving consumers by counterfeiting chips.

2) The RFID chip of the present invention is different from the traditional commodity anti-counterfeiting traceability system, using a transparent film as the substrate, the chip is completely transparent and easily damaged, and can be covered outside the visible labels such as two-dimensional codes, without affecting the appearance of existing products, And when it is placed in the seal, consumers can destroy the chip after opening the package, so as to achieve the effect of anti-counterfeiting.

3) The anti-counterfeiting traceability system has high recognition degree, wide application range, high safety factor, good anti-counterfeiting effect, low cost, and low learning cost for consumers.

Description of drawings

Fig. 1 is a system structure block diagram of the present invention.

Fig. 2 is the structure diagram and process flow of the ZnO-TFT device used in the present invention; Fig. 2 (a) is the structure diagram of the source and drain layers and the transparent film substrate; Fig. 2 (b) is the ITO source layer and the ITO drain layer. and the structure diagram of the transparent film substrate; Fig. 2(c) is the structure diagram of depositing ZnO layer on the structure of Fig. 2(b); Fig. 2(d) is the deposition of the first Al ₂ O ₃ on the structure of Fig. 2(c) The structure diagram of the layer; Figure 2 (e) is a structure diagram of the structure of Figure 2 (d) through photolithography; Figure 2 (f) is a structure diagram of the second Al ₂ O ₃ layer deposited on the structure of Figure 2 (e) Fig. 2 (g) is the structure diagram of Fig. 2 (e) structure through photolithography; Fig. 2 (h) is the structure diagram after deposition, photolithography, stripping operation on Fig. 2 (g) structure; Fig. 2 (i) is a structural diagram after deposition, photolithography, and deuterium doping operations on the structure of FIG. 2(h).

FIG. 3 is a chip layout of the present invention.

FIG. 4 is a structural diagram of a digital logic circuit of the present invention.

FIG. 5 is a waveform diagram of the test result of the present invention.

6 is a schematic structural diagram of the present invention applied to a red wine bottle.

FIG. 7 is a schematic structural diagram of the present invention applied to a liquor bottle.

FIG. 8 is a schematic view of the structure of the present invention applied to a medicine tank.

FIG. 9 is a schematic structural diagram of the present invention applied to a tea can or a cigarette case.

10 is a schematic structural diagram of the present invention applied to a salt bag.

FIG. 11 is a schematic structural diagram of the present invention applied to a jewelry box.

In the figure: 1: transparent film substrate; 2: ZnO layer; 3: first Al ₂ O ₃ layer; 4: second Al ₂ O ₃ layer; 5: ITO source layer; 6: ITO drain layer; 7: ITO gate layer; 8: barrier layer; 9: source and drain layer; 10: label; 11: encapsulation; 12: two-dimensional code; 13: cork; 14: bottle mouth; 15: can mouth; 16: sealing.

Detailed ways

The present invention will be further described below with reference to the accompanying drawings and embodiments.

As shown in FIG. 1 , the anti-counterfeiting system of the present invention includes a tag made of an RFID chip, a special reader for reading tag information, and a network database for recording commodity circulation information. The label spans the two ends of the seal, and the thickness is 100-700μm, which is convenient for breaking the label while opening the package of the product. The circuit of the RFID chip is printed on a transparent film, and the fully transparent thin film transistor in the RFID chip circuit adopts a ZnO-TFT device. The RFID chip includes counters, decoding and ROM storage, triggers, ring oscillators, buffers and other parts.

As shown in FIG. 2(i), the ZnO-TFT device includes an ITO source layer 5, an ITO drain layer 6, a ZnO layer ₂ , a first _Al2O3 layer 3, a second Al ₂ O ₃ layer 4, ITO gate region layer 7 and barrier layer 8, ITO source region layer 5 and ITO drain region layer 6 are respectively located on both sides of the bottom of the ZnO-TFT device and are in the same layer; the middle part of the ZnO layer 2 is embedded downward A rectangular depression is formed between the ITO source layer 5 and the ITO drain layer, and the two sides of the ZnO layer 2 are respectively deposited on the upper surfaces of the ITO source layer 5 and the ITO drain layer; the first Al ₂ O ₃ layer 3 is deposited on the ZnO The upper surface of the layer 2 also has a rectangular depression, which has the same structure as the ZnO layer 2. The middle part of the second Al ₂ O ₃ layer 4 covers the upper surface of the first Al ₂ O ₃ layer 3 and the middle part of the second Al ₂ O ₃ layer 4 The lower surface protrudes downward to cover the depression in the middle of the first Al ₂ O ₃ layer 3, and the two sides of the second Al ₂ O ₃ layer 4 extend to the upper surface of the ITO source layer 5 and the ITO drain layer respectively; the ITO source layer 5 and The middle part of the upper surface of the ITO drain region layer 6 is respectively penetrated from both sides of the second Al ₂ O ₃ layer 4 to form inverted L-shaped protrusions on the first Al ₂ O ₃ layer 3 respectively; the ITO gate region layer 7 is tiled on the first Al 2 O 3 layer 3 The middle of the upper surface of the two Al ₂ O ₃ layers 4 ; there are barrier layers 8 on both sides of the ITO gate region layer 7 , the barrier layers 8 are isolated from the ITO gate region layer 7 , and the two barrier layers 8 are respectively located in the ITO source region layer 5 The upper surface of the inverted L-shaped protrusion and the second Al ₂ O ₃ layer 4, the inverted L-shaped protrusion of the ITO drain layer 6 and the upper surface of the second Al ₂ O ₃ layer 4, the two barrier layers 8 are close to the ITO The inner side of the gate region layer 7 is vertically flush with the two sides of the first Al ₂ O ₃ layer 3 respectively.

Detailed ways:

The fabrication process of the ZnO-TFT device is as follows:

S1: As shown in Figure 2(a), a layer of 200 nm ITO is deposited on the cleaned transparent film substrate 1 as the source and drain layers, and photoresist is spin-coated on the upper surface of the source and drain layers, and exposed using a photolithography machine Transfer the pattern to the transparent film substrate 1; as shown in Figure 2(b), after the photoresist is dissolved and denatured, the source and drain layers are etched to form a part of the ITO source layer 5 and the ITO drain layer 6;

S2: As shown in Figure 2(c), use ALD equipment to deposit a ZnO thin film on the ITO source layer 5 and the ITO drain layer 6 as the ZnO layer 2; as shown in Figure 2(d), on the upper surface of the ZnO layer 2 Anneal and deposit an Al ₂ O ₃ thin film as the first Al ₂ O ₃ layer 3; as shown in Figure 2(e), the ZnO layer 2 and the first Al ₂ O ₃ layer 3 are etched using a photolithography process, so that the ZnO layer 2 A channel is formed on both sides of the first Al ₂ O ₃ layer 3;

S3: As shown in FIG. 2(f), a layer of Al ₂ O ₃ is deposited on the upper surface of the first Al ₂ O ₃ layer 3 and the upper surfaces of the ITO source layer 5 and the ITO drain layer 6 as the second Al ₂ O ₃ layers 4, both sides of the second Al ₂ O ₃ layer 4 extend into the channels on both sides of the ZnO layer 2 and the first Al ₂ O ₃ layer 3 respectively; as shown in FIG. 2(g), the volume fraction is 1 % HF solution is etched on both sides of the second Al ₂ O ₃ layer 4 near the edges to form channels, so that the second Al ₂ O ₃ layer 4 does not cover the upper surfaces of the ITO source layer 5 and the ITO drain layer 6 completely covered;

S4: As shown in FIG. 2(h), a 100 nm ITO layer is deposited on the upper surface of the structure obtained in step S3, and both sides of the ITO layer extend to the edges of both sides of the second Al ₂ O ₃ layer 4 and are partially deposited to the second Inside the channels on both sides of the Al ₂ O ₃ layer 4 , the ITO layer between the through holes on both sides of the second Al ₂ O ₃ layer 4 to the middle of the second Al ₂ O ₃ layer 4 is peeled off, and the second Al ₂ The ITO layer on the upper surface of the O ₃ layer 4 is used as the ITO gate region layer 7, and the ITO layers remaining on both sides after stripping are used as the other part of the ITO source region layer 5 and the ITO drain region layer 6 and the ITO source region layer prepared in step S2 respectively. 5. A part of the ITO drain region layer 6 together forms the ITO source region layer 5 and the ITO drain region layer 6;

S5: Coating a layer of photoresist on the upper surface of the ITO source region layer 5 as a blocking region, and etching the blocking layers 8 on both sides of the ITO gate region layer 7 through a photolithography process, and the blocking layer 8 is close to the ITO gate region layer. The inner sides of 7 are respectively vertically flush with the two sides of the first Al ₂ O ₃ layer 3;

S6: Deuterium doping: As shown in FIG. 2(i), deuterium gas is used to perform ion implantation doping in the upper region between the two barrier layers 8 at room temperature, and the lower region corresponding to the barrier layer 8 is in the barrier layer 8 Under the blocking effect of ions, the doping cannot be implanted.

The transparent film substrate 1 used can be made of glass, PET, PI and other materials. The specific embodiment of the present invention uses a wafer as the transparent film substrate 1

As shown in Figure 3, the chip layout includes a rectifier circuit, a modulation circuit, a digital logic circuit, an antenna and a tuning circuit. The antenna is connected to the tuning circuit, the rectifier circuit, and the modulation circuit respectively, and the rectifier circuit is connected to the modulation circuit through the digital logic circuit; each The RFID chip has a corresponding identification code, which is written before the RFID chip is attached to the seal as a label. The reader supplies power to the RFID chip when it is close to the RFID chip. The natural frequency of the circuit in the RFID chip is tuned by tuning The circuit resonates to 13.56MHz, the antenna obtains energy from the reader, the rectifier circuit rectifies the energy into direct current to supply power to the digital logic circuit, the digital logic circuit generates the identification code signal in the RFID chip and outputs it to the modulation circuit, and the modulation circuit modulates the identification code signal to After 13.56MHz, it is transmitted to the reader through the antenna. The reader demodulates the modulated signal and restores it to an identification code signal. The reader reads and displays the commodity information on the RFID chip, and writes the reading time into the network database at the same time. The reader adopts encryption protocol and algorithm, and the protocol is compatible with 14443 protocol.

As shown in Figure 4, the digital logic circuit is mainly composed of a ring oscillator, a counter, a decoder, a memory, a Manchester encoder and a D flip-flop. The digital logic circuit is composed of a ring oscillator to generate a global clock, and the counter is based on the clock frequency of the global clock. Counting, the counter transmits the same address signal obtained by counting to the two decoders respectively, and the two decoders obtain the address signals on the word line and bit line in the ROM respectively, and take out the identification code data from the ROM. , the data on the bit line and word line of the ROM is shaped by the D flip-flop and sent to the Manchester encoder by the decoder, and the Manchester encoder outputs the encoded data as an identification code signal to the modulation circuit

Figure 5 shows the test result waveform when the test voltage V _DD is 10V, and the data rate is 18.4kbit/s. The waveform shown in the figure adopts Manchester encoding, and the Manchester code shown in the figure is 01100101010110011001010101010110, and the decoded data is 1011110101111110.

Fig. 6 is an example diagram of applying the present invention to make a label and applying it to red wine. The label 10 is pasted on the outside of the cork stopper 13 and the bottle mouth 14 of the red wine bottle, bridging the cork stopper 13 and the bottle body, and is between the glass label 10 and the bottle mouth. Visible verification means such as two-dimensional code 12 or anti-counterfeiting can be added. The label 10 has a chip and an antenna on the side facing the wine bottle to prevent it from being damaged.

FIG. 7 is an example diagram of applying the present invention to make a label and then applying it to liquor. The label 10 is pasted on the outside of the bottle mouth 14 of the liquor bottle. Add two-dimensional code 12 or brilliance light to anti-counterfeiting and other visible verification means. The label 10 has a chip and an antenna on the side facing the wine bottle to prevent it from being damaged.

FIG. 8 is an example diagram of the label 10 made by the present invention and applied to a medicine can. The label 10 is pasted on the outside of the medicine can mouth 15. If the medicine can mouth 15 is sealed with plastic 11 and transparent, it can be placed between the glass label 10 and the can mouth 15. Add visible verification means such as two-dimensional code 12 or anti-counterfeiting of brilliance and light. The side of the label 10 with the chip and the antenna faces the inside of the medicine tank to prevent it from being damaged, and the outside of the label 10 is packaged with plastic 11.

Fig. 9 is an example diagram of applying the present invention to make a label and then applying it to a tea can or a cigarette case. The label 10 is pasted on the seal 16 of the tea can or cigarette case, and a two-dimensional code or a brilliance light can be added to the inside of the label 10 to prevent counterfeiting. Visible verification means, the side of the label 10 with the chip and the antenna faces the inside of the tea can or cigarette case to prevent damage, and the outside of the label 10 is encapsulated by conventional encapsulation means such as sealing.

Figure 10 is an example diagram of applying the present invention to make a label and then applying it to a salt bag. The label 10 is pasted on the seal 16 of the salt bag. The inner side of the label 10 can be added with visible verification means such as two-dimensional code or anti-counterfeiting. 10. The side with the chip and antenna faces the inside of the salt bag to prevent it from being damaged.

Fig. 11 is an example diagram of the label made by the present invention and applied to a jewelry box. The label 10 is pasted at the opening of the jewelry box. The inner side of the label 10 can be added with visible verification means such as a two-dimensional code 12 or a light-colored anti-counterfeiting anti-counterfeiting method. 10. The side with the chip and antenna faces the inside of the salt bag to prevent it from being damaged.

The above is only a preferred example of the present invention in the anti-counterfeiting of food, beverages and other commodities, and does not limit the present invention in any form. Modifications are equivalent examples of equivalent changes, but any simple modifications, equivalent changes and modifications made to the above examples according to the technical essence of the present invention without departing from the technical solution content of the present invention still belong to the protection scope of the present invention. Inside.

Claims (9)

1. a commodity anti-counterfeiting traceability system based on a transparent film substrate RFID chip, is characterized in that: the RFID chip comprises a transparent film substrate (1) and a chip layout on the transparent film substrate (1), and the chip layout includes a rectifier circuit, a modulation circuit , a digital logic circuit, an antenna and a tuning circuit, the rectifier circuit is connected to the antenna through the tuning circuit, and the rectifier circuit is connected to the modulation circuit through the digital logic circuit; The fully transparent thin film transistors in the circuit of the chip layout all use ZnO-TFT devices, and the ZnO-TFT devices include an ITO source layer (5), an ITO drain layer (6), a ZnO source layer (5), an ITO drain layer (6), and a ZnO layer formed on a transparent thin film substrate (1) in sequence. layer ( ₂ ), first _Al2O3 layer (3), _{second Al2O3} layer (4), ITO gate layer (7) and barrier layer (8), ITO source layer (5), ITO The drain region layers (6) are respectively located on both sides of the bottom of the ZnO-TFT device and are in the same layer; the middle part of the ZnO layer (2) is embedded downwardly between the ITO source region layer (5) and the ITO drain region layer to form a rectangular depression, The two sides of the ZnO layer (2) are respectively deposited on the upper surface of the ITO source layer (5) and the ITO drain layer; the first Al ₂ O ₃ layer (3) is deposited on the upper surface of the ZnO layer (2) and also has a rectangular depression, The middle part of the second Al ₂ O ₃ layer (4) covers the upper surface of the first Al ₂ O ₃ layer (3) and the lower surface of the middle part of the second Al ₂ O ₃ layer (4) protrudes downward to cover the first Al ₂ The O ₃ layer (3) is recessed in the middle, and both sides of the second Al ₂ O ₃ layer (4) extend to the upper surfaces of the ITO source layer (5) and the ITO drain layer respectively; the ITO source layer (5) and the ITO drain layer The middle part of the upper surface of the layer (6) is respectively penetrated from both sides of the second Al ₂ O ₃ layer (4) to form inverted L-shaped protrusions on the first Al ₂ O ₃ layer (3) respectively; the ITO gate region layer (7) ) is tiled in the middle of the upper surface of the second Al ₂ O ₃ layer (4); there are barrier layers (8) on both sides of the ITO gate region layer (7), the barrier layer (8) and the ITO gate region layer (7) Separated from each other, the two barrier layers (8) are respectively located on the inverted L-shaped protrusion of the ITO source layer (5), the upper surface of the _{second Al2O3} layer (4), and the inverted L of the ITO drain layer (6). type protrusions and the upper surface of the second Al ₂ O ₃ layer (4), the inner sides of the two barrier layers (8) close to the ITO gate region layer (7) and the two sides of the first Al ₂ O ₃ layer (3) respectively The sides are vertically flush. 2. The commodity anti-counterfeiting traceability system based on transparent film base RFID chip according to claim 1, is characterized in that: the preparation technology of described ZnO-TFT device is as follows: S1: deposit a layer of ITO on the cleaned transparent film substrate (1) as a source and drain layer (9), spin-coat photoresist on the upper surface of the source and drain layer (9), and use a photolithography machine to expose the transferred pattern to On the transparent film substrate (1), after the photoresist is dissolved and denatured, the source and drain layers are etched to form a part of the ITO source layer (5) and the ITO drain layer (6); S2: Atomic layer deposition equipment is used to deposit a ZnO film on the ITO source layer (5) and the ITO drain layer (6) as a ZnO layer (2); surface annealing and deposition of an Al ₂ O ₃ film on the ZnO layer (2) As the first Al ₂ O ₃ layer ( 3 ), the ZnO layer ( 2 ) and the first Al ₂ O ₃ layer ( 3 ) are etched using a photolithography process, so that the ZnO layer ( 2 ) and the first Al ₂ O ₃ layer ( 3) Channels are formed on both sides; S3: deposit a layer of Al ₂ O ₃ on the upper surface of the first Al ₂ O ₃ layer (3) and the upper surfaces of the ITO source layer (5) and the ITO drain layer (6) as a second Al ₂ O ₃ layer ( 4), the two sides of the second Al ₂ O ₃ layer (4) are respectively extended into the channels on both sides of the ZnO layer ( 2) and the first Al ₂ O ₃ layer (3), and then HF solution is used in the second Al ₂ O Channels are formed by photolithography on both sides of layer ₃ (4) near the edge, so that the second Al ₂ O ₃ layer (4) does not completely cover the upper surfaces of the ITO source layer (5) and the ITO drain layer (6) ; S4: deposit an ITO layer on the upper surface of the structure obtained in step S3, the ITO layer extends to the edges of both sides of the second Al ₂ O ₃ layer (4) on both sides, and is partially deposited on both sides of the second Al ₂ O ₃ layer (4) In the side channel, then the ITO layer between the through holes on both sides of the second Al ₂ O ₃ layer (4) to the middle of the second Al ₂ O ₃ layer (4) is peeled off, and the second Al ₂ O ₃ layer remains after the peeling. (4) The ITO layer on the upper surface is used as the ITO gate region layer (7), and the ITO layers remaining on both sides after peeling are used as another part of the ITO source region layer (5) and the ITO drain region layer (6) respectively and prepared in step S2 A part of the ITO source region layer (5) and the ITO drain region layer (6) together form the ITO source region layer (5) and the ITO drain region layer (6); S5: Coating a layer of photoresist on the upper surface of the ITO source region layer (5) as a blocking region, and etching the barrier layers (8) on both sides of the ITO gate region layer (7) through a photolithography process, and the blocking layer (8) The inner side close to the ITO gate region layer (7) is respectively vertically flush with the two sides of the first Al ₂ O ₃ layer (3); S6: Deuterium doping: ion implantation doping is performed using deuterium gas in the upper region between the two barrier layers (8). 3. The product anti-counterfeiting traceability system based on a transparent film base RFID chip according to claim 1, wherein the first Al ₂ O ₃ layer (3) is a protective layer, and the second Al ₂ O ₃ layer (4) ) as the gate oxide layer, the ITO gate region layer (7) as the gate electrode, the ITO source region layer (5) and the ITO drain region layer (6) as the source electrode and the drain electrode, respectively. 4. The product anti-counterfeiting traceability system based on a transparent film substrate RFID chip according to claim 1, wherein each of the RFID chips has a corresponding identification code, and the wireless communication device is an RFID chip when it is close to the RFID chip For power supply, the natural frequency of the circuit in the RFID chip resonates to a specific frequency through the tuning circuit, the antenna obtains energy from the wireless communication device, the rectifier circuit rectifies the energy into direct current to supply power to the digital logic circuit, and the digital logic circuit generates the identification code signal in the RFID chip Output to the modulation circuit. The modulation circuit modulates the identification code signal to a specific frequency and transmits it to the wireless communication device through the antenna. The wireless communication device demodulates the modulated signal and restores it to the identification code signal. The wireless communication device reads and displays the commodity on the RFID chip. information. 5 . The product anti-counterfeiting traceability system based on a transparent film base RFID chip according to claim 4 , wherein the specific frequency is 13.56 MHz. 6 . 6 . The product anti-counterfeiting traceability system based on a transparent film substrate RFID chip according to claim 4 , wherein the wireless communication device adopts a dedicated reader or a mobile phone with NFC function. 7 . 7 . The product anti-counterfeiting traceability system based on the transparent film substrate RFID chip according to claim 4 , wherein the wireless communication device is provided with a key to burn the RFID chip to prevent the chip from being reused for counterfeit goods. 8 . 8 . The product anti-counterfeiting traceability system based on a transparent film substrate RFID chip according to claim 1 , wherein the components in the circuit of the chip layout are all transparent components, and the components include fully transparent thin film transistors, capacitors, and wires, 9 . The capacitor is mainly composed of two upper and lower ITO layers and an insulating layer located in the middle of the two ITO layers. 9 . The product anti-counterfeiting traceability system based on a transparent film substrate RFID chip according to claim 1 , wherein the inverter structure in the circuit of the chip layout is a depletion load inverter. 10 .