CN109166899B - Display substrate, manufacturing method thereof and display device - Google Patents

Abstract

This invention provides a display substrate, its manufacturing method, and a display device, belonging to the field of display technology. The display substrate includes a routing area comprising a first region at the intersection of gate lines and data lines, and a second region excluding the first region. The display substrate includes thin-film transistors and a passivation layer covering the thin-film transistors. An organic film is disposed on the passivation layer, and the organic film includes at least a cutout corresponding to the first region. The technical solution of this invention can improve the yield of the display substrate.

Description

Display substrate, manufacturing method thereof, and display device

technical field

The present invention relates to the field of display technology, and in particular, to a display substrate, a manufacturing method thereof, and a display device.

Background technique

In the prior art, when a display substrate is fabricated, after a passivation layer covering the thin film transistor is formed, an organic film is formed on the passivation layer, and a pixel electrode is formed on the organic film. The thickness of the organic film is relatively large, reaching the micron level. Through the organic film, the distance between the thin film transistor of the display substrate and the pixel electrode can be increased, the parasitic capacitance of the display substrate can be reduced, and the power consumption of the display substrate can be reduced.

However, in the wiring area of the display substrate, the organic film at the intersection of the gate line and the data line is prone to accumulating charges. Once the accumulation is too much, the charge will be released and the ESD (Electro-Static discharge, electrostatic discharge) phenomenon will occur, making the display The overall yield of the substrate decreases.

SUMMARY OF THE INVENTION

The technical problem to be solved by the present invention is to provide a display substrate, a manufacturing method thereof, and a display device, which can improve the yield of the display substrate.

In order to solve the above-mentioned technical problems, the embodiments of the present invention provide the following technical solutions:

In one aspect, a display substrate is provided, a wiring area of the display substrate includes a first area at the intersection of a gate line and a data line and a second area other than the first area, the display substrate includes a thin film A transistor and a passivation layer covering the thin film transistor, an organic film is arranged on the passivation layer, and the organic film includes a hollow portion corresponding to at least the first region.

Further, the minimum distance between the boundary of the first region and the boundary of the hollow portion is greater than a preset threshold.

Further, the preset threshold is 350um.

Further, an electrostatic guiding pattern is provided between the boundary of the hollow portion and the boundary of the first region.

Further, the hollow portion includes an adjacent first border and a second border, an included angle between the first border and the second border is a right angle, and is close to the first border and the second border The electrostatic guiding pattern includes a first conductive pattern parallel to the first boundary, a second conductive pattern parallel to the second boundary, and a conductive connection portion connecting the first conductive pattern and the second conductive pattern, The conductive connection portion is arc-shaped; or the conductive connection portion includes a plurality of conductive line segments connected end to end in sequence, and the included angle formed by adjacent conductive line segments is an obtuse angle; or the conductive connection portion and the first conductive line segment are formed. The included angle formed by the pattern is an obtuse angle, and the included angle formed by the conductive connection portion and the second conductive pattern is an obtuse angle.

Embodiments of the present invention also provide a display device, including the above-mentioned display substrate.

An embodiment of the present invention further provides a method for fabricating a display substrate, wherein a wiring area of the display substrate includes a first area at the intersection of gate lines and data lines and a second area other than the first area, The manufacturing method includes:

forming a thin film transistor and a passivation layer covering the thin film transistor;

An organic film is formed on the passivation layer, and the organic film includes at least a hollow portion corresponding to the first region.

Further, forming the organic film on the passivation layer includes:

forming a layer of photosensitive organic material on the passivation layer;

Expose the organic material by using a mask, and the mask includes at least an opaque pattern corresponding to the first region and a light transmissive pattern other than the opaque pattern;

After developing, the organic material blocked by the opaque pattern is removed.

Further, the method also includes:

An electrostatic guiding pattern is formed between the boundary of the hollow portion and the boundary of the first region.

Further, the hollow portion includes an adjacent first border and a second border, and the included angle between the first border and the second border is a right angle, forming a shape close to the first border and the second border. The electrostatic guiding pattern of the boundary includes:

forming a first conductive pattern parallel to the first boundary, a second conductive pattern parallel to the second boundary, and a conductive connection portion connecting the first conductive pattern and the second conductive pattern, the conductive connection or the conductive connecting portion includes a plurality of conductive line segments connected end to end in sequence, and the included angle formed by the adjacent conductive line segments is an obtuse angle; or the conductive connecting portion and the first conductive pattern are formed The included angle is an obtuse angle, and the included angle formed by the conductive connection portion and the second conductive pattern is an obtuse angle.

Embodiments of the present invention have the following beneficial effects:

In the above solution, in the wiring area of the display substrate, no organic film is provided at the intersection of the gate line and the data line, which reduces the probability of accumulating charges at the intersection of the gate line and the data line, and can reduce the display substrate in the wiring area. The probability of ESD occurs, thereby improving the yield of the display substrate.

Description of drawings

FIG. 1 is a schematic diagram of a wiring area of a conventional display substrate;

FIG. 2 is a schematic diagram of ESD occurring on a conventional display substrate;

3 is a schematic diagram of a wiring area of a display substrate according to an embodiment of the present invention;

FIG. 4 is a schematic diagram of a wiring area of a display substrate according to another embodiment of the present invention.

reference number

1 gate line

2 data lines

3Organic film

4 Locations where ESD occurs

5 Cutouts

51 First Frontier

52 Second Frontier

6 Electrostatic Boot Graphics

61 The first conductive line segment

62 second conductive line segment

63 Third Conductive Segment

Detailed ways

In order to make the technical problems, technical solutions and advantages to be solved by the embodiments of the present invention clearer, the following detailed description will be given in conjunction with the accompanying drawings and specific embodiments.

FIG. 1 is a schematic diagram of a wiring area of an existing display substrate. As shown in FIG. 1 , the wiring area is provided with gate lines 1 and data lines 2 , wherein the intersections of the gate lines 1 and the data lines 2 are covered with organic Film 3, due to the level difference at the intersection of the gate line 1 and the data line 2, during the coating process of the organic film 3 due to the influence of the level difference, it is easy to generate charge accumulation at the intersection of the gate line 1 and the data line 2. Once If there is too much accumulation, the charge will be released and the ESD phenomenon will occur. As shown in Figure 2, 4 is the position where ESD occurs. The position where ESD occurs is generally located in the coating direction of the organic film 3. The ESD phenomenon will lead to the yield of the display substrate. decrease.

In order to solve the above problems, embodiments of the present invention provide a display substrate, a manufacturing method thereof, and a display device, which can improve the yield of the display substrate.

An embodiment of the present invention provides a display substrate, wherein a wiring area of the display substrate includes a first area at the intersection of a gate line and a data line and a second area other than the first area, the display substrate includes A thin film transistor and a passivation layer covering the thin film transistor, an organic film is provided on the passivation layer, and the organic film includes at least a hollow portion corresponding to the first region.

In this embodiment, in the wiring area of the display substrate, no organic film is provided at the intersection of the gate line and the data line, which reduces the probability of accumulating charge at the intersection of the gate line and the data line, and can reduce the traces on the display substrate. The probability of ESD occurs in the area, thereby improving the yield of the display substrate.

Further, the minimum distance between the boundary of the first region and the boundary of the hollow portion is greater than a preset threshold. The disposition area of the organic film should be kept as far away from the first area as possible. The farther the distance between the disposition area of the organic film and the first area, the lower the probability of ESD.

Preferably, the preset threshold is 350um, that is, the minimum distance between the boundary of the setting area of the organic film and the boundary of the first area is greater than 350um, so that the distance between the setting area of the organic film and the first area is relatively long, Greatly reduces the probability of ESD.

In order to further reduce the charge accumulated in the wiring area, an electrostatic guiding pattern is arranged between the boundary of the hollow portion and the boundary of the first area. The electrostatic guiding pattern is made of conductive material, and is connected with the grounding point or Connecting to the preset ground point outside the display substrate can lead away the accumulated charge in the trace area, eliminate the accumulation of charge during the organic film coating process or other hardware fluctuations, and further reduce the probability of ESD in the trace area. .

In a specific embodiment, the hollow portion includes an adjacent first border and a second border, an included angle between the first border and the second border is a right angle, and is close to the first border and the second border. The electrostatic guiding pattern of the second boundary includes a first conductive pattern parallel to the first boundary, a second conductive pattern parallel to the second boundary, and a conductive pattern connecting the first conductive pattern and the second conductive pattern connection part, the conductive connection part is arc-shaped; or the conductive connection part includes a plurality of conductive line segments connected end to end in sequence, and the included angle formed by the adjacent conductive line segments is an obtuse angle; or the conductive connection part and the The included angle formed by the first conductive pattern is an obtuse angle, and the included angle formed by the conductive connection portion and the second conductive pattern is an obtuse angle.

Due to the high probability of ESD in sharp corner areas, the electrostatic guiding pattern is designed to exclude right and sharp corners, which can effectively conduct static electricity and eliminate the accumulation caused by the organic film coating process or other hardware fluctuations In the case of electric charge, the probability of ESD occurring in the trace area is reduced.

The display substrate of the present invention will be further introduced below in conjunction with the accompanying drawings and specific embodiments:

As shown in FIG. 3 , a gate line 1 and a data line 2 are arranged in the wiring area of the display substrate, and the display substrate includes a first area at the intersection of the gate line 1 and the data line 2 and a second area other than the first area. Two regions, in addition, an organic film 3 is also provided on the display substrate, and the organic film 3 includes a hollow portion 5 corresponding to the first region, wherein the corresponding meaning is that the orthographic projection of the first region on the display substrate falls into the hollow portion 5 in orthographic projection on the display substrate. The distance d between the boundary of the hollow part 5 and the boundary of the first region is greater than 350um, which can make the distance between the installation region of the organic film and the first region relatively far, and greatly reduce the probability of ESD.

In order to further reduce the charge accumulated in the wiring area, as shown in FIG. 4 , an electrostatic guiding pattern 6 is provided between the boundary of the hollow portion 5 and the boundary of the first area, and the electrostatic guiding pattern 6 may be connected with the display substrate. The ground point on the display board or the ground point connection outside the display substrate can conduct the charge accumulated in the trace area. As shown in FIG. 4 , the hollow portion 5 includes adjacent first borders 51 and second borders 52 , the included angle between the first border 51 and the second border 52 is a right angle, and the electrostatic guiding pattern 6 includes a The first conductive line segment 61, the second conductive line segment 62 and the third conductive line segment 63 are connected end to end in sequence, wherein the first conductive line segment 61 and the third conductive line segment 63 are respectively parallel to the first boundary 51 and the second boundary 52, The angle between a conductive line segment 61 and the second conductive line segment 62 is an obtuse angle, and the angle between the third conductive line segment 63 and the second conductive line segment 62 is an obtuse angle. Since the probability of ESD occurring in the sharp corner area is high, therefore, The electrostatic guiding pattern 6 is designed not to include right angles and acute angles, and extends along the boundary of the hollow portion 5, which can not only effectively guide the charges accumulated at the edge of the organic film, but also effectively reduce the probability of ESD occurring in the wiring area.

In this embodiment, by designing the structure of the display substrate, no organic film is provided at the intersection of the gate line and the data line, so that the organic film is far away from the intersection of the gate line and the data line, and the electrostatic guiding pattern is designed to guide in time. By removing the charge, the probability of ESD occurring in the wiring area of the display substrate can be greatly reduced, thereby improving the product yield of the display substrate.

Embodiments of the present invention also provide a display device, including the above-mentioned display substrate. The display device can be any product or component with a display function, such as a TV, a monitor, a digital photo frame, a mobile phone, a tablet computer, etc., wherein the display device further includes a flexible circuit board, a printed circuit board and a backplane.

An embodiment of the present invention further provides a method for fabricating a display substrate, wherein a wiring area of the display substrate includes a first area at the intersection of gate lines and data lines and a second area other than the first area, The manufacturing method includes:

forming a thin film transistor and a passivation layer covering the thin film transistor;

An organic film is formed on the passivation layer, and the organic film includes at least a hollow portion corresponding to the first region.

In this embodiment, in the wiring area of the display substrate, no organic film is provided at the intersection of the gate line and the data line, which reduces the probability of accumulating charge at the intersection of the gate line and the data line, and can reduce the traces on the display substrate. The probability of ESD occurs in the area, thereby improving the yield of the display substrate.

Among them, the shape of the organic film can be changed by improving the pattern of the mask plate for making the organic film. When the organic film is made of a negative photosensitive material, the mask includes at least an opaque pattern corresponding to the first region and a light transmissive pattern other than the opaque pattern, and the passivation layer The organic film formed on includes:

forming a layer of photosensitive organic material (negative photosensitive material) on the passivation layer;

Expose the organic material by using a mask, and the mask includes at least an opaque pattern corresponding to the first region and a light transmissive pattern other than the opaque pattern;

After developing, the organic material blocked by the opaque pattern is removed.

Of course, the organic film is not limited to being made of a negative photosensitive material, but can also be made of a positive photosensitive material. When the organic film is made of a positive photosensitive material, the mask plate includes at least a transparent layer corresponding to the first region. A light pattern and an opaque pattern other than the light-transmitting pattern, the forming an organic film on the passivation layer includes:

forming a layer of photosensitive organic material (positive photosensitive material) on the passivation layer;

Expose the organic material by using a mask, the mask comprising at least a light-transmitting pattern corresponding to the first region and an opaque pattern other than the light-transmitting pattern;

After developing, the organic material blocked by the opaque pattern is retained, and the exposed organic material is removed.

Further, the method also includes:

An electrostatic guiding pattern is formed between the boundary of the hollow portion and the boundary of the first region.

In order to further reduce the charge accumulated in the wiring area, an electrostatic guiding pattern is arranged between the boundary of the hollow portion and the boundary of the first area. The electrostatic guiding pattern is made of conductive material, and is connected with the grounding point or Connecting to the preset ground point outside the display substrate can lead away the accumulated charge in the trace area, eliminate the accumulation of charge during the organic film coating process or other hardware fluctuations, and further reduce the probability of ESD in the trace area. .

In a specific embodiment, the hollow portion includes an adjacent first border and a second border, and an included angle between the first border and the second border is a right angle, forming a shape close to the first border and the second border. The electrostatic guiding pattern of the second boundary includes:

forming a first conductive pattern parallel to the first boundary, a second conductive pattern parallel to the second boundary, and a conductive connection portion connecting the first conductive pattern and the second conductive pattern, the conductive connection or the conductive connecting portion includes a plurality of conductive line segments connected end to end in sequence, and the included angle formed by the adjacent conductive line segments is an obtuse angle; or the conductive connecting portion and the first conductive pattern are formed The included angle is an obtuse angle, and the included angle formed by the conductive connection portion and the second conductive pattern is an obtuse angle.

Due to the high probability of ESD in sharp corner areas, the electrostatic guiding pattern is designed to exclude right and sharp corners, which can effectively conduct static electricity and eliminate the accumulation caused by the organic film coating process or other hardware fluctuations In the case of electric charge, the probability of ESD occurring in the trace area is reduced.

Unless otherwise defined, technical or scientific terms used in this disclosure should have the ordinary meaning as understood by one of ordinary skill in the art to which this invention belongs. As used in this disclosure, "first," "second," and similar terms do not denote any order, quantity, or importance, but are merely used to distinguish the various components. "Comprises" or "comprising" and similar words mean that the elements or things appearing before the word encompass the elements or things recited after the word and their equivalents, but do not exclude other elements or things. Words like "connected" or "connected" are not limited to physical or mechanical connections, but may include electrical connections, whether direct or indirect. "Up", "Down", "Left", "Right", etc. are only used to represent the relative positional relationship, and when the absolute position of the described object changes, the relative positional relationship may also change accordingly.

It will be understood that when an element such as a layer, film, region or substrate is referred to as being "on" or "under" another element, it can be "directly on" or "under" the other element, Or intermediate elements may be present.

The above are the preferred embodiments of the present invention. It should be pointed out that for those skilled in the art, without departing from the principles of the present invention, several improvements and modifications can be made. It should be regarded as the protection scope of the present invention.

Claims (8)

1. A display substrate, characterized in that a wiring area of the display substrate comprises a first area at the intersection of a gate line and a data line and a second area other than the first area, the display substrate It includes a thin film transistor and a passivation layer covering the thin film transistor. An organic film is arranged on the passivation layer. An electrostatic guiding pattern is arranged between the boundaries of the first area. 2 . The display substrate of claim 1 , wherein a minimum distance between the boundary of the first region and the boundary of the hollow portion is greater than a predetermined threshold. 3 . 3. The display substrate according to claim 2, wherein the preset threshold is 350um. 4 . The display substrate according to claim 1 , wherein the hollow portion comprises an adjacent first boundary and a second boundary, and an included angle between the first boundary and the second boundary is a right angle. 5 . , the electrostatic guiding patterns near the first boundary and the second boundary include a first conductive pattern parallel to the first boundary, a second conductive pattern parallel to the second boundary, and a connection to the first conductive pattern The conductive connection part of the pattern and the second conductive pattern, the conductive connection part is arc-shaped; or the conductive connection part includes a plurality of conductive line segments connected end to end in sequence, and the included angle formed by the adjacent conductive line segments is an obtuse angle ; or the included angle formed by the conductive connection portion and the first conductive pattern is an obtuse angle, and the included angle formed by the conductive connection portion and the second conductive pattern is an obtuse angle. 5. A display device, comprising the display substrate according to any one of claims 1-4. 6. A method for manufacturing a display substrate, wherein a wiring area of the display substrate comprises a first area at the intersection of a gate line and a data line and a second area other than the first area, so The production method includes: forming a thin film transistor and a passivation layer covering the thin film transistor; An organic film is formed on the passivation layer, and the organic film includes a hollow part corresponding to at least the first region; an electrostatic guiding pattern is formed between the boundary of the hollow part and the boundary of the first region. 7. The method for manufacturing a display substrate according to claim 6, wherein the forming an organic film on the passivation layer comprises: forming a layer of photosensitive organic material on the passivation layer; Expose the organic material by using a mask, and the mask includes at least an opaque pattern corresponding to the first region and a light transmissive pattern other than the opaque pattern; After developing, the organic material blocked by the opaque pattern is removed. 8 . The method for manufacturing a display substrate according to claim 6 , wherein the hollow portion comprises adjacent first borders and second borders, and a sandwich between the first border and the second border is sandwiched between the first border and the second border. 9 . The angle is a right angle, and forming the electrostatic guiding pattern close to the first boundary and the second boundary includes: forming a first conductive pattern parallel to the first boundary, a second conductive pattern parallel to the second boundary, and a conductive connection portion connecting the first conductive pattern and the second conductive pattern, the conductive connection or the conductive connecting portion includes a plurality of conductive line segments connected end to end in sequence, and the included angle formed by the adjacent conductive line segments is an obtuse angle; or the conductive connecting portion and the first conductive pattern are formed The included angle is an obtuse angle, and the included angle formed by the conductive connection portion and the second conductive pattern is an obtuse angle.

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