CN109002411B - Method and system for automatically configuring GPU expansion box, and GPU expansion box that can be automatically configured - Google Patents

Abstract

The present application discloses a method and system for automatically configuring a GPU expansion box, and an automatically configurable GPU expansion box. The method includes: establishing a mapping relationship between a connection topology of the GPU expansion box and a configuration of a PCIE switch chip in the GPU expansion box; The BMC of the host or the BMC of the GPU expansion box uses the I2C signal to detect the connection topology of the current GPU expansion box; according to the connection topology of the current GPU expansion box and the mapping relationship, the PCIE switch chip in the current GPU expansion box is configured. The system includes a mapping relationship establishment module, a detection module and a configuration module. The automatically configurable GPU expansion box is provided with the BMC of the GPU expansion box, and the host and the GPU expansion box are connected through a communication cable, and the connections between the host and the GPU expansion box, and between the multi-level GPU expansion boxes There is an I2C bus on the line. The present application can prevent the user from manually configuring the GPU expansion box, greatly improve the accuracy and efficiency of the configuration, and help improve the performance of the computer.

Description

Method and system for automatically configuring GPU expansion box, and GPU expansion box that can be automatically configured

technical field

The present application relates to the technical field of server system design, and in particular, to a method and system for automatically configuring a GPU expansion box and a GPU expansion box that can be automatically configured.

Background technique

With the rapid development of big data, cloud computing and artificial intelligence technologies, the system has higher and higher requirements for server computing performance. GPU (Graphics Processing Unit, graphics processor), because of its advantages in data computing, makes it in the The application on the server is more and more extensive. In order to expand more GPUs, multiple GPUs are usually integrated into one expansion box to form a GPU expansion box, so as to realize the pooling of GPU resources and facilitate the scheduling of GPU resources.

Generally, the GPU expansion box uses the PCIE switch chip to expand the limited PCIE (peripheral component interconnect express, high-speed serial computer expansion bus standard) interface on the CPU into multiple PCIE interfaces, thereby connecting more GPUs, completing GPU expansion and GPU resources. pooling. The connection between the GPU and the CPU through the PCIE interface is the connection topology of the GPU expansion box. In practical applications, due to different running services, different connection topologies need to be replaced for different services.

The current GPU expansion box adopts a fixed connection topology. When the connection topology needs to be changed for different services, the user first needs to change the physical connection relationship of the chassis according to the requirements, and then manually configure the GPU expansion box to achieve different topology connections.

However, in the current GPU expansion, when the connection topology changes, the GPU expansion box needs to be manually configured, which is cumbersome and prone to configuration errors. The accuracy and efficiency of the configuration are not high enough, thus affecting the performance of the computer.

SUMMARY OF THE INVENTION

The present application provides a method and system for automatically configuring a GPU expansion box, and an automatically configurable GPU expansion box, so as to solve the problems of low configuration accuracy and low configuration efficiency of the GPU expansion box in the prior art.

In order to solve the above technical problems, the embodiments of the present application disclose the following technical solutions:

A method for automatically configuring a GPU expansion box, wherein a PCIE switch chip is arranged in the GPU expansion box, and a plurality of ports are arranged on the PCIE switch chip, wherein the first port is used to connect a host or an upper-level GPU expansion box , the second port is used for backup, connecting the next-level GPU expansion box or connecting another host, and the remaining ports are used to connect the GPU in the current GPU expansion box, and the method includes:

Establish a mapping relationship between the connection topology of the GPU expansion box and the configuration of the PCIE switch chips in the GPU expansion box, where the connection topology of the GPU expansion box includes: direct connection mode, cascade mode and uplink mode;

The BMC (Baseboard Management Controller) of the host or the BMC of the GPU expansion box uses the I2C signal to detect the connection topology of the current GPU expansion box;

The BMC of the host or the BMC of the GPU expansion box configures the PCIE switch chip in the current GPU expansion box according to the connection topology of the current GPU expansion box and the mapping relationship.

Optionally, before the BMC of the host or the BMC of the GPU expansion box uses the I2C signal to detect the connection topology of the current GPU expansion box, the method further includes:

Establish a communication connection between the host BMC and the GPU expansion box BMC by adding an I2C signal to the connection line between the host and the GPU expansion box;

By adding an I2C signal on the connection line between the upper-level GPU expansion box and the next-level GPU expansion box, a communication connection between the BMC of the upper-level GPU expansion box and the BMC of the next-level GPU expansion box is established.

Optionally, the mapping relationship is:

The first connection topology of the GPU expansion box matches the first configuration, wherein the first connection topology is a direct connection mode, and the first configuration is: the first port on the PCIE switch chip is connected to a host, and the second port is not connected to any host or GPU expansion box;

The second connection topology of the GPU expansion box matches the second configuration, wherein the second connection topology is the first stage of the cascade mode, and the second configuration is: the first port on the PCIE switch chip is connected to a host, and the second port Connect the next-level GPU expansion box;

The third connection topology of the GPU expansion box matches the third configuration, wherein the third connection topology is the Nth level of the cascade mode, and the third configuration is: the first port on the PCIE switch chip is connected to the upper-level GPU expansion box, N≥2 and N is a natural number;

The fourth connection topology of the GPU expansion box matches the fourth configuration, wherein the fourth connection topology is an uplink mode, and the fourth configuration is: the first port on the PCIE switch chip is connected to a host, and the second port is connected to another host.

Optionally, when the connection topology of the GPU expansion box is: direct connection mode or uplink mode, the BMC of the host or the BMC of the GPU expansion box utilizes the I2C signal to detect the connection topology of the current GPU expansion box, including:

The BMC of the host uses the I2C signal to scan the first port and the second port of the PCIE switch chip in the GPU expansion box to determine whether the BMC of the host or the BMC of the GPU expansion box is detected; or,

The BMC of the GPU expansion box uses the I2C signal to scan the first port and the second port of the PCIE switch chip in the GPU expansion box to determine whether the BMC of the host or the BMC of the GPU expansion box is detected.

Optionally, when the connection topology of the GPU expansion box is in cascade mode, the BMC of the host detects the connection topology of the current GPU expansion box by using an I2C signal, including:

The BMC of the host uses the I2C signal to scan the first port and the second port of the PCIE switch chip in the first-level GPU expansion box to determine whether the BMC of the host or the BMC of the first-level GPU expansion box is detected;

The BMC of the upper-level GPU expansion box uses the I2C signal to scan the first port and the second port of the PCIE switch chip in the next-level GPU expansion box to determine whether the BMC of the next-level GPU expansion box is detected.

Optionally, when the connection topology of the GPU expansion box is in cascade mode, the BMC of the GPU expansion box detects the connection topology of the current GPU expansion box by using an I2C signal, including:

The BMC of the first-level GPU expansion box utilizes the I2C signal to scan the first port and the second port of the PCIE switch chip in the first-level GPU expansion box to determine whether to detect the BMC of the host or the BMC of the first-level GPU expansion box;

The BMC of the upper-level GPU expansion box uses the I2C signal to scan the first port and the second port of the PCIE switch chip in the next-level GPU expansion box to determine whether the BMC of the next-level GPU expansion box is detected.

Optionally, according to the connection topology of the current GPU expansion box and the mapping relationship, the configuration of the PCIE switch chip in the GPU expansion box includes:

If only the first port on the PCIE switch chip of the current GPU expansion box detects the BMC of the host, and the second port is not connected to any host or GPU expansion box, set the PCIE switch chip of the current GPU expansion box to the first configuration;

If the first port on the PCIE switch chip of the current GPU expansion box detects the BMC of the host, the second port is connected to the next-level GPU expansion box, and the PCIE switch chip of the current GPU expansion box is set to the second configuration;

If only the first port on the PCIE switch chip of the current GPU expansion box detects the BMC of the previous-level GPU expansion box, set the PCIE switch chip of the current GPU expansion box to the third configuration;

If the first port on the PCIE switch chip of the current GPU expansion box detects the BMC of one host, and the second port detects the BMC of another host, the PCIE switch chip of the current GPU expansion box is set to the fourth configuration.

A system for automatically configuring a GPU expansion box, wherein a PCIE switch chip is arranged in the GPU expansion box, and a plurality of ports are arranged on the PCIE switch chip, wherein the first port is used to connect a host or an upper-level GPU expansion box , the second port is used for backup, connecting to the next-level GPU expansion box or connecting to another host, and the remaining ports are used to connect the GPU in the current GPU expansion box, and the system includes:

a mapping relationship establishing module, used to establish a mapping relationship between the connection topology of the GPU expansion box and the configuration of the PCIE switch chip in the GPU expansion box;

The detection module is used to detect the connection topology of the current GPU expansion box by using the I2C signal;

The configuration module is configured to configure the PCIE switch chip in the GPU expansion box according to the current connection topology of the GPU expansion box and the mapping relationship.

Optionally, the mapping relationship is:

The first connection topology of the GPU expansion box matches the first configuration, wherein the first connection topology is a direct connection mode, and the first configuration is: the first port on the PCIE switch chip is connected to a host, and the second port is not connected to any host or GPU expansion box;

The second connection topology of the GPU expansion box matches the second configuration, wherein the second connection topology is the first stage of the cascade mode, and the second configuration is: the first port on the PCIE switch chip is connected to a host, and the second port Connect the next-level GPU expansion box;

The third connection topology of the GPU expansion box matches the third configuration, wherein the third connection topology is the Nth level of the cascade mode, and the third configuration is: the first port on the PCIE switch chip is connected to the upper-level GPU expansion box, N≥2 and N is a natural number;

The fourth connection topology of the GPU expansion box matches the fourth configuration, wherein the fourth connection topology is an uplink mode, and the fourth configuration is: the first port on the PCIE switch chip is connected to a host, and the second port is connected to another host.

An automatically configurable GPU expansion box, the GPU expansion box is provided with a PCIE switch chip, and the PCIE switch chip is provided with a plurality of ports, wherein the first port is used to connect a host or an upper-level GPU expansion box , the second port is used for backup, connecting to the next-level GPU expansion box or connecting to another host, and the other ports are used to connect the GPU in the current GPU expansion box,

The host computer is provided with the BMC of the host computer, which is used to monitor the GPU expansion box and the host computer, and configure the PCIE switch chip in the GPU expansion box according to the connection topology of the GPU expansion box;

The GPU expansion box is also provided with a BMC of the GPU expansion box, for monitoring the GPU expansion box and the host, and configuring the PCIE switch chip in the GPU expansion box according to the connection topology of the GPU expansion box;

The host and the GPU expansion box are communicated and connected through a connecting line, and an I2C bus is provided on the connecting line between the host and the GPU expansion box, as well as between the multi-level GPU expansion boxes, and the I2C bus is used to establish The communication connection between the host BMC and the GPU expansion box BMC, and the establishment of the communication connection between the BMC of the upper-level GPU expansion box and the BMC of the next-level GPU expansion box;

Both the BMC of the host and the BMC of the GPU expansion box are provided with the above-mentioned system for automatically configuring the GPU expansion box.

The technical solutions provided by the embodiments of the present application may include the following beneficial effects:

The application provides a method for automatically configuring a GPU expansion box. The method first establishes a mapping relationship between the connection topology of the GPU expansion box and the configuration of the PCIE switch chip in the GPU expansion box; then the BMC of the host or the BMC of the GPU expansion box utilizes I2C The signal detects the connection topology of the current GPU expansion box; finally, the PCIE switch chip in the current GPU expansion box is configured according to the connection topology of the current GPU expansion box and the mapping relationship. The application first establishes a one-to-one correspondence between the connection topology and the configuration of the PCIE switch chip in the GPU expansion box, and then controls the I2C signal of the GPU expansion box and the BMC chip in the host to scan the ports of the GPU expansion box, thereby realizing the expansion of the GPU. The computing system composed of the box and the host is monitored in real time. When the connection topology of the system changes, the BMC will configure the expansion box according to the actual connection topology, thereby completing the modification of the entire computing system. Since the present application controls the I2C signal through the BMC to perform real-time monitoring and complete automatic configuration, so as to avoid the user from manually configuring the GPU expansion box, the accuracy and configuration efficiency of the configuration can be greatly improved, and the performance of the computer can be improved.

The present application also provides a system for automatically configuring a GPU expansion box, the system mainly includes: a mapping relationship establishment module, a detection module and a configuration module, and the mapping relationship establishment module establishes the connection topology of the GPU expansion box and the PCIE switch chip in the GPU expansion box The mapping relationship between the configurations; then use the I2C signal to detect the connection topology of the current GPU expansion box through the detection module; finally, the configuration module establishes the mapping relationship of the module according to the detection results of the detection module and the mapping relationship, combined with the current connection topology of the GPU expansion box, Configure the PCIE switch chip in the GPU expansion box. The settings of the mapping relationship establishment module, the detection module and the configuration module in this application can make full use of the BMC to monitor the computing system in real time and complete the automatic reconfiguration, thereby avoiding the user's manual configuration of the GPU expansion box, thus greatly improving the configuration efficiency. Accuracy and configuration efficiency are beneficial to improve computer performance.

The present application also provides an automatically configurable GPU expansion box, the GPU expansion box is provided with a BMC, and the host is also provided with a BMC, and the BMC of the GPU expansion box and the BMC of the host are both provided with the above-mentioned automatic A system for configuring a GPU expansion box, the system includes a mapping relationship establishment module, a detection module and a configuration module. The setting of the I2C bus in the GPU expansion box of the present application can realize the communication between the GPU expansion box BMC and the host BMC, so that the computing system can be monitored in real time through the BMC and the automatic modification can be completed, so that the user can be prevented from manually configuring the GPU expansion box. The configuration accuracy and configuration efficiency can be greatly improved, and the performance of the computer can be improved.

It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory only and are not limiting of the present application.

Description of drawings

In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the following briefly introduces the accompanying drawings that need to be used in the description of the embodiments or the prior art. In other words, other drawings can also be obtained based on these drawings without creative labor.

1 is a schematic flowchart of a method for automatically configuring a GPU expansion box according to an embodiment of the present application;

Fig. 2 is the connection topology diagram of GPU expansion box in the embodiment of the application;

3 is a schematic structural diagram of a system for automatically configuring a GPU expansion box provided by an embodiment of the application;

FIG. 4 is a schematic structural diagram of an automatically configurable GPU expansion box provided by an embodiment of the present application.

Detailed ways

In order to make those skilled in the art better understand the technical solutions in the present application, the technical solutions in the embodiments of the present application will be described clearly and completely below with reference to the accompanying drawings in the embodiments of the present application. Obviously, the described The embodiments are only a part of the embodiments of the present application, but not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those of ordinary skill in the art without creative work shall fall within the scope of protection of the present application.

For a better understanding of the present application, the embodiments of the present application are explained in detail below with reference to the accompanying drawings.

Example 1

Referring to FIG. 1 , FIG. 1 is a schematic flowchart of a method for automatically configuring a GPU expansion box provided by an embodiment of the present application. As can be seen from FIG. 1 , the method for automatically configuring the GPU expansion box in this embodiment mainly includes the following processes:

S1: Establish a mapping relationship between the connection topology of the GPU expansion box and the configuration of the PCIE switch chip in the GPU expansion box. Among them, the connection topology of the GPU expansion box mainly includes three types: direct connection mode, cascade mode and uplink mode.

The GPU expansion box of this embodiment is provided with a PCIE switch chip, and the PCIE switch chip is provided with a plurality of ports, wherein the first port is used to connect the host or the upper-level GPU expansion box, and the second port is used for backup and connection to the lower level. The first-level GPU expansion box can be connected to another host, and the remaining ports are used to connect the GPU in the current GPU expansion box.

When using the GPU expansion box, the user will change the connection topology according to the actual needs of the business, which requires switching between various modes. Usually, the user will first reconnect the physical connection to complete the connection of the GPU expansion box. The topology is switched, and then the PCIE switch chip is reconfigured according to the specific connection topology. This embodiment can realize the automatic configuration of the PCIE switch chip through the BMC.

Three types of connection topologies can be seen in Figure 2. In this implementation, the GPU expansion box and the host can form a computing system, and this computing system usually has three types of connection topologies, which are referred to as the connection topology of the GPU expansion box in this embodiment. In the direct connection mode, a host ServerA is connected to a GPU expansion box through the port Pa0 of the CPU; in the cascade mode, the host ServerA is connected to a port P0 of the first-level GPU expansion box GPU box0 through a port Pa0 of the CPU. The first-level GPU expansion box GPU box0 is connected to a port P0 of the next-level GPU expansion box GPU box1 through another port P1, and so on, the cascade mode can set up multi-level GPU expansion boxes; in the upstream mode, there can be dual upstream or For multiple uplinks, taking the dual uplink mode as an example, the host ServerA is connected to one port P0 of the GPU expansion box through the Pa0 port of the CPU, and the host ServerB is connected to the other port P1 of the GPU expansion box through the Pb0 port of the CPU.

In this embodiment, the mapping relationship between the connection topology of the GPU expansion box and the configuration of the PCIE switch chip in the GPU expansion box is as follows:

The first connection topology of the GPU expansion box matches the first configuration, wherein the first connection topology is a direct connection mode, and the first configuration is: the first port on the PCIE switch chip is connected to a host, and the second port is not connected to any host or a GPU expansion box. The second connection topology of the GPU expansion box matches the second configuration, wherein the second connection topology is the first stage of the cascade mode, and the second configuration is: the first port on the PCIE switch chip is connected to a host, and the second port Connect the next level GPU expansion box. The third connection topology of the GPU expansion box matches the third configuration, wherein the third connection topology is the Nth level of the cascade mode, and the third configuration is: the first port on the PCIE switch chip is connected to the upper-level GPU expansion box, N≥2 and N is a natural number. The fourth connection topology of the GPU expansion box matches the fourth configuration, wherein the fourth connection topology is an uplink mode, and the fourth configuration is: the first port on the PCIE switch chip is connected to a host, and the second port is connected to another host.

Further, before step S1, this implementation also includes step S01: by adding an I2C signal on the connection line between the host and the GPU expansion box, establish a communication connection between the host BMC and the GPU expansion box BMC;

S02: Establish a communication connection between the BMC of the upper-level GPU expansion box and the BMC of the next-level GPU expansion box by adding an I2C signal to the connection line between the upper-level GPU expansion box and the next-level GPU expansion box .

Through step S01, an I2C bus is set on the connection line between the host and the GPU expansion box, so that the communication connection between the host BMC and the GPU expansion box BMC can be realized through the I2C signal. Through step S02, an I2C bus is set on the connection line between the upper-level GPU expansion box and the next-level GPU expansion box, so that the connection between the upper-level GPU expansion box and the next-level GPU expansion box can be realized through I2C signals communication connection.

Continuing to refer to FIG. 1 , after the mapping relationship is established, step S2 is performed: the BMC of the host or the BMC of the GPU expansion box uses the I2C signal to detect the connection topology of the current GPU expansion box.

In this implementation, since the communication connection between the BMC of the host and the BMC of the GPU expansion box has been realized through the I2C signal, any BMC of the two can detect the connection topology in the current GPU expansion box. Depending on the connection topology of the GPU expansion box, the BMC of the host or the BMC of the GPU expansion box uses the I2C signal to detect the current connection topology of the GPU expansion box in different ways. Specifically, it includes the following three situations:

S21: When the connection topology of the GPU expansion box is the direct connection mode or the uplink mode, the BMC of the host or the BMC of the GPU expansion box uses the I2C signal to detect the connection topology of the current GPU expansion box, including:

S211: The BMC of the host scans the first port and the second port of the PCIE switch chip in the GPU expansion box by using the I2C signal, and determines whether the BMC of the host or the BMC of the GPU expansion box is detected.

S212: The BMC of the GPU expansion box scans the first port and the second port of the PCIE switch chip in the GPU expansion box by using the I2C signal, and determines whether the BMC of the host computer or the BMC of the GPU expansion box is detected.

In this embodiment, the scanning using the I2C signal is bidirectional communication, that is, the scanning initiator and the scanned object are bidirectional communication, as long as they can be scanned, it means that bidirectional communication can be achieved between the two. For example: if the host scans the GPU expansion box, the host can communicate with the GPU expansion box. At this time, both the host and the GPU expansion box can obtain the topology information of the entire computing system. This topology information includes the scan initiator's own chassis. The position in the topological connection.

S22: When the connection topology of the GPU expansion box is in cascade mode, the BMC of the host uses the I2C signal to detect the current connection topology of the GPU expansion box, including:

S221: The BMC of the host scans the first port and the second port of the PCIE switch chip in the first-level GPU expansion box by using the I2C signal, and determines whether the BMC of the host or the BMC of the first-level GPU expansion box is detected.

S222: The BMC of the upper-level GPU expansion box uses the I2C signal to scan the first port and the second port of the PCIE switch chip in the next-level GPU expansion box to determine whether the BMC of the next-level GPU expansion box is detected.

In cascade mode, the BMC scan starts from the host BMC, scans down one level at a time, the host scans the first level GPU expansion box, and the first level GPU expansion box scans down the next level GPU expansion box.

S23: When the connection topology of the GPU expansion box is in cascade mode, the BMC of the GPU expansion box uses the I2C signal to detect the current connection topology of the GPU expansion box, including:

S231: The BMC of the first-level GPU expansion box uses the I2C signal to scan the first port and the second port of the PCIE switch chip in the first-level GPU expansion box to determine whether the BMC of the host or the BMC of the first-level GPU expansion box is detected;

S232: The BMC of the upper-level GPU expansion box uses the I2C signal to scan the first port and the second port of the PCIE switch chip in the next-level GPU expansion box to determine whether the BMC of the next-level GPU expansion box is detected.

It can be known from the above steps S21-S23 that the method in the present embodiment is adopted to carry out software programming to the BMC chip, so that the BMC of the GPU expansion box or the BMC of the host can automatically identify the topology connection relationship of the GPU expansion box, and after identifying the current topology connection relationship, The BMC of the subsequent GPU expansion box or the BMC of the host can correctly configure the PCIEswitch according to the corresponding topology structure, thereby completing the reconfiguration of the computing system.

After using the BMC to obtain the current topology connection relationship through the I2C signal, step S3 is performed: the BMC of the host or the BMC of the GPU expansion box configures the PCIEswitch chip in the current GPU expansion box according to the connection topology and mapping relationship of the current GPU expansion box.

Specifically, step S3 includes the following process:

S31: If only the first port on the PCIE switch chip of the current GPU expansion box detects the BMC of the host, and the second port is not connected to any host or GPU expansion box, set the PCIE switch chip of the current GPU expansion box to the first configuration;

S32: If the first port on the PCIE switch chip of the current GPU expansion box detects the BMC of the host, the second port is connected to the next-level GPU expansion box, and the PCIE switch chip of the current GPU expansion box is set to the second configuration;

S33: If only the first port on the PCIE switch chip of the current GPU expansion box detects the BMC of the previous-level GPU expansion box, set the PCIE switch chip of the current GPU expansion box to the third configuration;

S34: If the first port on the PCIE switch chip of the current GPU expansion box detects the BMC of one host, and the second port detects the BMC of another host, set the PCIE switch chip of the current GPU expansion box to the fourth configuration.

Further, in this embodiment, the reconfigured PCIE switch configuration can also be displayed, for example, the current topology can be displayed under the webpage of the BMC of the GPU expansion box or the BMC of the host.

The following takes the connection topology of the first level of direct connection mode, dual uplink mode and cascading mode as an example to explain how the BMC of the host or the BMC of the GPU expansion box uses the I2C signal to detect the connection topology of the current GPU expansion box:

1) The BMC of the GPU expansion box scans the P0 and P1 interfaces of the GPU expansion box through the I2C signal to determine whether the BMC of the host or the BMC of the GPU expansion box is detected.

2) If only the P0 port detects the BMC of the host, set the PCIE switch to the first configuration.

3) If only the P0 port detects the BMC of the expansion box, set the PCIE switch to the third configuration.

4) If both the P0 and P1 ports detect the BMC of the host, set the PCIE switch to the fourth configuration.

5) After the configuration is successful, the actual topology connection relationship is displayed under the BMC web, and the LED light is lit to inform the user that the configuration is completed.

To sum up, using the method of automatically configuring the GPU expansion box in this embodiment, the user only needs to change the connection relationship according to the application scenario, and does not need to reconfigure the computing system, and all the configuration of the computing system is completely automatically completed by the software. , which can greatly improve the efficiency of the allocation and reduce the impact of human error.

Embodiment 2

Referring to FIG. 3 on the basis of the embodiments shown in FIG. 1 and FIG. 2 , FIG. 3 is a schematic structural diagram of a system for automatically configuring a GPU expansion box provided by an embodiment of the present application. It can be seen from FIG. 3 that the system for automatically configuring the GPU expansion box in this embodiment mainly includes three parts: a mapping relationship establishment module, a detection module and a configuration module. Among them, the mapping relationship establishment module is used to establish the mapping relationship between the connection topology of the GPU expansion box and the configuration of the PCIE switch chip in the GPU expansion box; the detection module is used to detect the connection topology of the current GPU expansion box by using the I2C signal; the configuration module is used to Configure the PCIE switch chip in the GPU expansion box according to the current connection topology of the GPU expansion box and the mapping relationship.

The mapping relationship established by the mapping relationship establishing module is: the first connection topology of the GPU expansion box matches the first configuration, wherein the first connection topology is a direct connection mode, and the first configuration is: the first port on the PCIE switch chip is connected a host, and the second port is not connected to any host or GPU expansion box; the second connection topology of the GPU expansion box matches the second configuration, wherein the second connection topology is the first stage of the cascade mode, and the second configuration is : The first port on the PCIE switch chip is connected to a host, and the second port is connected to the next-level GPU expansion box; the third connection topology of the GPU expansion box matches the third configuration, wherein the third connection topology is in cascade mode The Nth stage and the third configuration are: the first port on the PCIE switch chip is connected to the upper-level GPU expansion box, N≥2 and N is a natural number; the fourth connection topology of the GPU expansion box matches the fourth configuration, where the first The four-connection topology is an uplink mode, and the fourth configuration is: the first port on the PCIE switch chip is connected to a host, and the second port is connected to another host.

Further, in the present embodiment, the system for automatically configuring the GPU expansion box is also provided with an I2C signal increase module, which is used to increase the I2C signal on the connection line between the host and the GPU expansion box, and establishes the relationship between the host BMC and the GPU expansion box BMC. and, generally used to increase the I2C signal on the connection line between the upper-level GPU expansion box and the next-level GPU expansion box to establish the connection between the BMC of the upper-level GPU expansion box and the next-level GPU expansion box Communication connection between BMCs.

Further, in this embodiment, the I2C signal adding module is an I2C bus.

In this implementation, the detection module includes: a first detection unit, a second detection unit, a third detection unit and a fourth detection unit. Wherein, the first detection unit is used to scan the first port and the second port of the PCIE switch chip in the GPU expansion box by using the I2C signal in the BMC of the host when the topology connection of the GPU expansion box is in the direct connection mode or the uplink mode, Determine whether the BMC of the host or the BMC of the GPU expansion box is detected.

The second detection unit is used to scan the first port and the second port of the PCIE switch chip in the GPU expansion box by using the I2C signal in the BMC of the GPU expansion box when the topology connection of the GPU expansion box is in the direct connection mode or the upstream mode. port to determine whether the BMC of the host or the BMC of the GPU expansion box is detected.

The third detection unit is used to scan the first port and the second port of the PCIE switch chip in the first-level GPU expansion box by using the I2C signal in the BMC of the host when the connection topology of the GPU expansion box is in cascade mode, and determine whether Detecting the BMC of the host or the BMC of the first-level GPU expansion box; and, in the BMC of the upper-level GPU expansion box, using the I2C signal to scan the first port and the second port of the PCIE switch chip in the next-level GPU expansion box , to determine whether the BMC of the next-level GPU expansion box is detected.

The fourth detection unit is used to scan the first port and the second port of the PCIE switch chip in the first-level GPU expansion box by using the I2C signal in the BMC of the first-level GPU expansion box when the connection topology of the GPU expansion box is the cascade mode. Two ports, determine whether the BMC of the host or the BMC of the first-level GPU expansion box is detected; and, in the BMC of the upper-level GPU expansion box, use the I2C signal to scan the first level of the PCIE switch chip in the next-level GPU expansion box port and the second port to determine whether the BMC of the next-level GPU expansion box is detected.

Further, in this implementation, the configuration module includes: a first setting unit, a second setting unit, a third setting unit and a fourth setting unit. The first setting unit is used to detect that only the first port on the PCIE switch chip of the current GPU expansion box detects the BMC of the host, and when the second port is not connected to any host or GPU expansion box, the current GPU expansion box The PCIE switch chip is set to the first configuration. The second setting unit is used to detect that the first port on the PCIEswitch chip of the current GPU expansion box detects the BMC of the host, and when the second port is connected to the next-level GPU expansion box, set the PCIE switch chip of the current GPU expansion box to the No. Second configuration. The third setting unit is configured to set the PCIE switch chip of the current GPU expansion box to the third configuration when only the first port on the PCIE switch chip of the current GPU expansion box detects the BMC of the previous-level GPU expansion box. The fourth detection unit is used to detect that the first port on the PCIEswitch chip of the current GPU expansion box detects the BMC of a host, and when the second port detects the BMC of another host, set the PCIE switch chip of the current GPU expansion box to Fourth configuration.

The working principle and working method of the system for automatically configuring the GPU expansion box in this embodiment have been described in detail in the embodiments shown in FIGS.

Embodiment 3

Referring to FIG. 4 on the basis of the embodiments shown in FIG. 1 , FIG. 2 and FIG. 3 , FIG. 4 is a schematic structural diagram of an automatically configurable GPU expansion box provided by an embodiment of the present application. As can be seen from FIG. 4 , in the GPU expansion box in this embodiment, a PCIE switch chip is provided, and a plurality of ports are provided on the PCIE switch chip, wherein the first port is used to connect the host or the upper-level GPU expansion box, and the second The ports are used for backup, connecting to the next-level GPU expansion box or connecting to another host, and the remaining ports are used to connect the GPU in the current GPU expansion box. The GPU expansion box is also provided with a BMC of the GPU expansion box, which is used to monitor the GPU expansion box and the host, and configure the PCIE switch chip in the GPU expansion box according to the connection topology of the GPU expansion box. In addition, the host of this embodiment is also provided with a BMC of the host, which is used to monitor the GPU expansion box and the host, and configure the PCIE switch chip in the GPU expansion box according to the connection topology of the GPU expansion box. The host computer and the GPU expansion box are communicated and connected through a connecting line, and an I2C bus is provided on the connecting line between the host computer and the GPU expansion box and between the multi-level GPU expansion boxes. The I2C bus between the host and the GPU expansion box is used to establish the communication connection between the host BMC and the GPU expansion box BMC, and the I2C bus between the multi-level GPU expansion boxes is used to establish the BMC of the upper-level GPU expansion box. Communication connection between BMCs of next-level GPU expansion boxes.

In this embodiment, both the BMC of the host and the BMC of the GPU expansion box are provided with a system for automatically configuring the GPU expansion box, and the system includes three parts: a mapping relationship establishment module, a detection module and a configuration module. Among them, the mapping relationship establishment module is used to establish the mapping relationship between the connection topology of the GPU expansion box and the configuration of the PCIE switch chip in the GPU expansion box; the detection module is used to detect the connection topology of the current GPU expansion box by using the I2C signal; the configuration module is used to Configure the PCIE switch chip in the GPU expansion box according to the current connection topology of the GPU expansion box and the mapping relationship.

The mapping relationship established by the mapping relationship establishing module includes: the first connection topology of the GPU expansion box matches the first configuration, wherein the first connection topology is a direct connection mode, and the first configuration is: the first connection topology on the PCIE switch chip The port is connected to a host, and the second port is not connected to any host or GPU expansion box; the second connection topology of the GPU expansion box matches the second configuration, wherein the second connection topology is the first level of the cascade mode, and the second The configuration is as follows: the first port on the PCIE switch chip is connected to a host, and the second port is connected to the next-level GPU expansion box; the third connection topology of the GPU expansion box matches the third configuration, wherein the third connection topology is cascading The Nth level of the mode, the third configuration is: the first port on the PCIE switch chip is connected to the upper-level GPU expansion box, N≥2 and N is a natural number; the fourth connection topology of the GPU expansion box matches the fourth configuration, where , the fourth connection topology is an uplink mode, and the fourth configuration is: the first port on the PCIE switch chip is connected to a host, and the second port is connected to another host.

For parts not described in detail in this embodiment, reference may be made to the embodiments shown in FIG. 1 , FIG. 2 , and FIG. 3 , and mutual reference can be made among the three, which will not be repeated here.

The above descriptions are only specific embodiments of the present application, so that those skilled in the art can understand or implement the present application. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the generic principles defined herein may be implemented in other embodiments without departing from the spirit or scope of the present application. Therefore, this application is not intended to be limited to the embodiments shown herein, but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.

Claims (10)

1. A method for automatically configuring a GPU expansion box, a PCIE switch chip is provided in the GPU expansion box, and a plurality of ports are provided on the PCIE switch chip, wherein the first port is used to connect a host or an upper-level GPU The expansion box, the second port is used for backup, connecting to the next-level GPU expansion box or connecting to another host, and the remaining ports are used to connect the GPU in the current GPU expansion box, and it is characterized in that, the method includes: Establish a mapping relationship between the connection topology of the GPU expansion box and the configuration of the PCIE switch chips in the GPU expansion box, where the connection topology of the GPU expansion box includes: direct connection mode, cascade mode and uplink mode; The BMC of the host or the BMC of the GPU expansion box uses the I2C signal to detect the connection topology of the current GPU expansion box; The BMC of the host or the BMC of the GPU expansion box configures the PCIE switch chip in the current GPU expansion box according to the connection topology of the current GPU expansion box and the mapping relationship. 2. the method for a kind of automatic configuration GPU expansion box according to claim 1, is characterized in that, before the BMC of host computer or the BMC of GPU expansion box utilizes I2C signal to detect the connection topology of current GPU expansion box, described method also comprises : Establish a communication connection between the host BMC and the GPU expansion box BMC by adding an I2C signal to the connection line between the host and the GPU expansion box; By adding an I2C signal on the connection line between the upper-level GPU expansion box and the next-level GPU expansion box, a communication connection between the BMC of the upper-level GPU expansion box and the BMC of the next-level GPU expansion box is established. 3. a kind of method for automatically configuring GPU expansion box according to claim 1, is characterized in that, described mapping relation is: The first connection topology of the GPU expansion box matches the first configuration, wherein the first connection topology is a direct connection mode, and the first configuration is: the first port on the PCIE switch chip is connected to a host, and the second port is not connected to any host or GPU expansion box; The second connection topology of the GPU expansion box matches the second configuration, wherein the second connection topology is the first stage of the cascade mode, and the second configuration is: the first port on the PCIE switch chip is connected to a host, and the second port Connect the next-level GPU expansion box; The third connection topology of the GPU expansion box matches the third configuration, wherein the third connection topology is the Nth level of the cascade mode, and the third configuration is: the first port on the PCIE switch chip is connected to the upper-level GPU expansion box, N≥2 and N is a natural number; The fourth connection topology of the GPU expansion box matches the fourth configuration, wherein the fourth connection topology is an uplink mode, and the fourth configuration is: the first port on the PCIE switch chip is connected to a host, and the second port is connected to another host. 4. the method for a kind of automatic configuration GPU expansion box according to claim 1, is characterized in that, when the connection topology of GPU expansion box is: during direct connection mode or upstream mode, the BMC of described host or the GPU expansion box BMC uses the I2C signal to detect the connection topology of the current GPU expansion box, including: The BMC of the host uses the I2C signal to scan the first port and the second port of the PCIE switch chip in the GPU expansion box to determine whether the BMC of the host or the BMC of the GPU expansion box is detected; or, The BMC of the GPU expansion box uses the I2C signal to scan the first port and the second port of the PCIE switch chip in the GPU expansion box to determine whether the BMC of the host or the BMC of the GPU expansion box is detected. 5. the method for a kind of automatic configuration GPU expansion box according to claim 1, is characterized in that, when the connection topology of GPU expansion box is cascading mode, the BMC of described host utilizes I2C signal to detect current GPU expansion box. Connection topology, including: The BMC of the host uses the I2C signal to scan the first port and the second port of the PCIE switch chip in the first-level GPU expansion box to determine whether the BMC of the host or the BMC of the first-level GPU expansion box is detected; The BMC of the upper-level GPU expansion box uses the I2C signal to scan the first port and the second port of the PCIE switch chip in the next-level GPU expansion box to determine whether the BMC of the next-level GPU expansion box is detected. 6. the method for a kind of automatic configuration GPU expansion box according to claim 1, is characterized in that, when the connection topology of GPU expansion box is cascading mode, the BMC of described GPU expansion box utilizes I2C signal to detect current GPU expansion The connection topology of the box, including: The BMC of the first-level GPU expansion box utilizes the I2C signal to scan the first port and the second port of the PCIE switch chip in the first-level GPU expansion box to determine whether to detect the BMC of the host or the BMC of the first-level GPU expansion box; The BMC of the upper-level GPU expansion box uses the I2C signal to scan the first port and the second port of the PCIE switch chip in the next-level GPU expansion box to determine whether the BMC of the next-level GPU expansion box is detected. 7. a kind of method for automatically configuring GPU expansion box according to claim 3, is characterized in that, described according to the connection topology of current GPU expansion box and described mapping relationship, the PCIE switch chip in GPU expansion box is configured, include: If only the first port on the PCIE switch chip of the current GPU expansion box detects the BMC of the host, and the second port is not connected to any host or GPU expansion box, set the PCIE switch chip of the current GPU expansion box to the first configuration; If the first port on the PCIE switch chip of the current GPU expansion box detects the BMC of the host, the second port is connected to the next-level GPU expansion box, and the PCIE switch chip of the current GPU expansion box is set to the second configuration; If only the first port on the PCIE switch chip of the current GPU expansion box detects the BMC of the previous-level GPU expansion box, set the PCIE switch chip of the current GPU expansion box to the third configuration; If the first port on the PCIE switch chip of the current GPU expansion box detects the BMC of one host, and the second port detects the BMC of another host, the PCIE switch chip of the current GPU expansion box is set to the fourth configuration. 8. A system for automatically configuring a GPU expansion box, wherein a PCIE switch chip is provided in the GPU expansion box, and a plurality of ports are provided on the PCIE switch chip, wherein the first port is used to connect a host or an upper-level GPU The expansion box, the second port is used for backup, connecting to the next-level GPU expansion box or connecting to another host, and the remaining ports are used to connect the GPU in the current GPU expansion box, and it is characterized in that, the system includes: a mapping relationship establishing module, used to establish a mapping relationship between the connection topology of the GPU expansion box and the configuration of the PCIE switch chip in the GPU expansion box; The detection module is used to detect the connection topology of the current GPU expansion box by using the I2C signal; The configuration module is configured to configure the PCIE switch chip in the GPU expansion box according to the current connection topology of the GPU expansion box and the mapping relationship. 9. the system of a kind of automatic configuration GPU expansion box according to claim 8, is characterized in that, described mapping relation is: The first connection topology of the GPU expansion box matches the first configuration, wherein the first connection topology is a direct connection mode, and the first configuration is: the first port on the PCIE switch chip is connected to a host, and the second port is not connected to any host or GPU expansion box; The second connection topology of the GPU expansion box matches the second configuration, wherein the second connection topology is the first stage of the cascade mode, and the second configuration is: the first port on the PCIE switch chip is connected to a host, and the second port Connect the next-level GPU expansion box; The third connection topology of the GPU expansion box matches the third configuration, wherein the third connection topology is the Nth level of the cascade mode, and the third configuration is: the first port on the PCIE switch chip is connected to the upper-level GPU expansion box, N≥2 and N is a natural number; The fourth connection topology of the GPU expansion box matches the fourth configuration, wherein the fourth connection topology is an uplink mode, and the fourth configuration is: the first port on the PCIE switch chip is connected to a host, and the second port is connected to another host. 10. An automatically configurable GPU expansion box, wherein a PCIE switch chip is provided in the GPU expansion box, and a plurality of ports are provided on the PCIE switch chip, wherein the first port is used to connect a host or an upper-level GPU The expansion box, the second port is used for backup, connecting to the next-level GPU expansion box or connecting to another host, and the remaining ports are used to connect the GPU in the current GPU expansion box, and it is characterized in that: The host computer is provided with the BMC of the host computer, which is used to monitor the GPU expansion box and the host computer, and configure the PCIE switch chip in the GPU expansion box according to the connection topology of the GPU expansion box; The GPU expansion box is also provided with a BMC of the GPU expansion box, for monitoring the GPU expansion box and the host, and configuring the PCIE switch chip in the GPU expansion box according to the connection topology of the GPU expansion box; The host and the GPU expansion box are communicated and connected through a connecting line, and an I2C bus is provided on the connecting line between the host and the GPU expansion box, as well as between the multi-level GPU expansion boxes, and the I2C bus is used to establish The communication connection between the host BMC and the GPU expansion box BMC, and the establishment of the communication connection between the BMC of the upper-level GPU expansion box and the BMC of the next-level GPU expansion box; The BMC of the host and the BMC of the GPU expansion box are both provided with the system for automatically configuring the GPU expansion box described in claim 8 or 9.

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