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CN108832211B - Active balancing circuit for battery packs - Google Patents

Active balancing circuit for battery packs Download PDF

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Publication number
CN108832211B
CN108832211B CN201810964865.8A CN201810964865A CN108832211B CN 108832211 B CN108832211 B CN 108832211B CN 201810964865 A CN201810964865 A CN 201810964865A CN 108832211 B CN108832211 B CN 108832211B
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China
Prior art keywords
pin
resistor
capacitor
diode
grounded
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CN201810964865.8A
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Chinese (zh)
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CN108832211A (en
Inventor
武骥
周沛新
刘兴涛
周亚男
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Hefei Pengpai Energy Technology Co ltd
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Hefei Pengpai Energy Technology Co ltd
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01M—PROCESSES OR MEANS, e.g. BATTERIES, FOR THE DIRECT CONVERSION OF CHEMICAL ENERGY INTO ELECTRICAL ENERGY
    • H01M10/00—Secondary cells; Manufacture thereof
    • H01M10/42—Methods or arrangements for servicing or maintenance of secondary cells or secondary half-cells
    • H01M10/4207—Methods or arrangements for servicing or maintenance of secondary cells or secondary half-cells for several batteries or cells simultaneously or sequentially
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01M—PROCESSES OR MEANS, e.g. BATTERIES, FOR THE DIRECT CONVERSION OF CHEMICAL ENERGY INTO ELECTRICAL ENERGY
    • H01M10/00—Secondary cells; Manufacture thereof
    • H01M10/42—Methods or arrangements for servicing or maintenance of secondary cells or secondary half-cells
    • H01M10/425—Structural combination with electronic components, e.g. electronic circuits integrated to the outside of the casing
    • H01M10/4257—Smart batteries, e.g. electronic circuits inside the housing of the cells or batteries
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01M—PROCESSES OR MEANS, e.g. BATTERIES, FOR THE DIRECT CONVERSION OF CHEMICAL ENERGY INTO ELECTRICAL ENERGY
    • H01M10/00—Secondary cells; Manufacture thereof
    • H01M10/42—Methods or arrangements for servicing or maintenance of secondary cells or secondary half-cells
    • H01M10/48—Accumulators combined with arrangements for measuring, testing or indicating the condition of cells, e.g. the level or density of the electrolyte
    • H01M10/486—Accumulators combined with arrangements for measuring, testing or indicating the condition of cells, e.g. the level or density of the electrolyte for measuring temperature
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01M—PROCESSES OR MEANS, e.g. BATTERIES, FOR THE DIRECT CONVERSION OF CHEMICAL ENERGY INTO ELECTRICAL ENERGY
    • H01M10/00—Secondary cells; Manufacture thereof
    • H01M10/42—Methods or arrangements for servicing or maintenance of secondary cells or secondary half-cells
    • H01M10/425—Structural combination with electronic components, e.g. electronic circuits integrated to the outside of the casing
    • H01M2010/4271—Battery management systems including electronic circuits, e.g. control of current or voltage to keep battery in healthy state, cell balancing
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E60/00—Enabling technologies; Technologies with a potential or indirect contribution to GHG emissions mitigation
    • Y02E60/10—Energy storage using batteries

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  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Electrochemistry (AREA)
  • General Chemical & Material Sciences (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Charge And Discharge Circuits For Batteries Or The Like (AREA)

Abstract

The embodiment of the invention provides an active equalization circuit for a battery pack, and belongs to the technical field of equalization of batteries. The active equalization circuit includes: a temperature acquisition unit; a voltage acquisition unit; an equalizing unit; a channel selection unit; a processing unit; the temperature of each single battery of the battery pack is obtained respectively; the voltage acquisition units are respectively connected to two ends of each single battery to acquire the voltage of the single battery; performing compensation calculation to determine the equivalent voltage of each single battery; judging whether the battery pack needs to be started for equalization or not according to each equivalent voltage; under the condition that the balance is judged to be started, the connection between the voltage acquisition unit and the battery pack is disconnected, and the balance unit is connected to the monomer battery with the lowest equivalent voltage in the battery pack so as to balance the monomer battery; after balancing for a period of time, detecting the voltages of all the monomers again and judging the balancing condition, and stopping active balancing when the balancing is not required to be started.

Description

Active equalization circuit for battery pack
Technical Field
The invention relates to the technical field of equalization of batteries, in particular to an active equalization circuit for a battery pack.
Background
The battery pack is one of the indispensable components of modern various electric appliances. In the production process of the single batteries, the single batteries are limited to equipment and other conditions, so that all parameters of each single battery are kept completely consistent. Therefore, the voltage of each unit cell often varies after the battery pack is used a plurality of times. Therefore, in order to improve the efficiency of energy utilization and ensure the use safety of the battery pack, the battery pack is often balanced during the use of the battery pack.
The prior art method for balancing the battery pack includes two methods: one is passive equalization, also called lossy equalization, which is simple to implement and low in cost, but has small discharge current and long equalization time, and also causes the problems of energy loss, heat dissipation and the like; the other is active equalization, namely lossless equalization, and the equalization mode has high energy utilization rate and short equalization time, but has higher cost and is relatively difficult to realize.
Disclosure of Invention
An object of an embodiment of the present invention is to provide an active equalization circuit for a battery pack, which performs compensation operation on voltages of unit cells by aiming at the problem of temperature unevenness of the battery pack, thereby improving equalization efficiency of the battery pack.
In order to achieve the above object, an embodiment of the present invention provides an active equalization circuit for a battery pack, the active equalization circuit including:
the temperature acquisition unit is used for acquiring the temperature of each single battery of the battery pack;
the voltage acquisition unit is used for acquiring the voltage of the single battery of the battery pack;
the equalization unit is used for performing equalization operation on the battery pack;
the first end of the channel selection unit is connected with the voltage acquisition unit, the second end of the channel selection unit is connected with the equalization unit, and the third end of the channel selection unit is connected with the battery pack;
the processing unit is respectively connected with the temperature acquisition unit, the voltage acquisition unit, the equalization unit and the channel selection unit and is used for:
the temperature of each single battery of the battery pack is respectively obtained through the temperature acquisition unit;
the channel selection unit is controlled to connect the voltage acquisition units to two ends of each single battery respectively so as to acquire the voltage of each single battery;
performing compensation calculation according to the temperature and the voltage, and determining the equivalent voltage of each single battery;
Judging whether the battery pack needs to be started for equalization or not according to each equivalent voltage;
under the condition that the battery pack is judged to need to be balanced, the channel selection unit is controlled to disconnect the connection between the voltage acquisition unit and the battery pack, and the channel selection unit is controlled to connect the balancing unit to the single battery with the lowest equivalent voltage in the battery pack so as to balance the single battery;
after balancing for a period of time, detecting the voltages of all the monomers again and judging the balancing condition, and stopping active balancing when the balancing is not required to be started.
Optionally, the voltage acquisition unit includes:
the voltage acquisition module is connected with the processing unit at one end;
the system comprises a voltage acquisition module, a channel selection unit, an acquisition switch, a processing unit and a control end of the acquisition switch, wherein one end of the acquisition switch is connected with the other end of the voltage acquisition module, the other end of the acquisition switch is connected with the first end of the channel selection unit, and the control end of the acquisition switch is connected with the processing unit.
Optionally, the voltage acquisition module includes:
the first resistor, one end of the first resistor and the other end of the first resistor are used for being connected with the positive electrode and the negative electrode of the single battery respectively;
One end of the second resistor is connected with one end of the first resistor;
one end of the third resistor is connected with the other end of the first resistor;
the inverting input end of the first operational amplifier is connected with the other end of the second resistor, the non-inverting input end of the first operational amplifier is connected with the other end of the third resistor, and the negative electrode of the power supply end of the first operational amplifier is grounded;
the positive electrode of the first diode is connected with the inverting input end of the first operational amplifier, and the negative electrode of the first diode is connected with the non-inverting input end of the first operational amplifier;
the positive electrode of the second diode is connected with the positive input end of the first operational amplifier, and the negative electrode of the second diode is connected with the negative input end of the first operational amplifier;
the fourth resistor is connected between the inverting input end of the first operational amplifier and the output end of the first operational amplifier;
the fifth resistor is connected between the positive input end of the first operational amplifier and the negative electrode of the power supply end of the first operational amplifier;
one end of the first inductor is used for being externally connected with a +5V direct current power supply, and the other end of the first inductor is connected with the positive electrode of the power supply end of the first operational amplifier;
The other end of the first inductor is grounded through the first capacitor and the second capacitor respectively;
the inverting input end of the second operational amplifier is connected with the output end of the second operational amplifier, the non-inverting input end of the second operational amplifier is connected with the output end of the first operational amplifier, and the output end of the second operational amplifier is connected with the processing unit.
Optionally, the equalization unit includes:
a boost module;
the transformer step-down module is connected with the voltage boosting module at one end;
and one end of the equalizing switch is connected with the other end of the transformer step-down module, and the other end of the equalizing switch is connected with the second end of the channel selection unit.
Optionally, the boost module includes:
one end of the sixth resistor is used for being externally connected with a +12V direct current power supply;
one end of the seventh resistor is connected with the other end of the sixth resistor, and the other end of the seventh resistor is grounded;
one end of the second inductor is connected with one end of the sixth resistor;
the positive electrode of the third diode is connected with the other end of the second inductor, and the negative electrode of the third diode is connected with the transformer step-down module;
The first pin and the sixth pin of the boost chip are grounded, and the seventh pin of the boost chip is connected with a node between the sixth resistor and the seventh resistor;
one end of the eighth resistor is connected with a ninth pin of the boost chip;
one end of the third capacitor is connected with the other end of the eighth resistor, and the other end of the third capacitor is connected with a tenth pin of the boost chip;
one end of the ninth resistor is connected with an eighth pin of the boost chip;
one end of the fourth capacitor is connected with the other end of the ninth resistor, and the other end of the fourth capacitor is connected with a sixth pin of the boost chip;
a tenth resistor, wherein one end of the tenth resistor is connected with a sixth pin of the boost chip;
an eleventh resistor, one end of which is connected with the other end of the ninth resistor, and the other end of which is connected with the other end of the tenth resistor;
the grid electrode of the first field effect tube is connected with a fifth pin of the boosting chip, the source electrode of the first field effect tube is connected with the other end of the tenth resistor, and the drain electrode of the first field effect tube is connected with a node between the second inductor and the third diode;
One end of the fifth capacitor is connected with a fourth pin of the boost chip, and the other end of the fifth capacitor is grounded;
the sixth capacitor is connected between the third pin of the second pin of the boost chip;
a twelfth resistor, wherein one end of the twelfth resistor is connected with the first pin of the boost chip, and the other end of the twelfth resistor is connected with one end of the second inductor;
a thirteenth resistor, one end of which is connected with a third pin of the boost chip;
one end of the seventh capacitor is connected with the other end of the thirteenth resistor, and the other end of the seventh capacitor is connected with the second pin of the boost chip;
a fourteenth resistor, one end of which is connected with the negative electrode of the third diode, and the other end of which is connected with the second pin of the boost chip;
a fifteenth resistor, one end of which is connected with the other end of the fourteenth resistor, and the other end of which is grounded;
optionally, the transformer step-down unit includes:
the first pin of the transformer is connected with the boosting module, the fifth pin of the transformer is grounded, and the tenth pin of the transformer is used for being connected with the negative electrode of the single battery;
The drain electrode of the second field effect tube is connected with the third pin of the transformer;
a sixteenth resistor, wherein one end of the sixteenth resistor is connected with the source electrode of the second field effect transistor, and the other end of the sixteenth resistor is grounded;
the high-frequency switch chip is suspended in the air, and the fifth pin of the high-frequency switch chip is grounded;
a seventeenth resistor, one end of which is connected with a sixth pin of the high-frequency switch chip, and the other end of which is connected with one end of the sixteenth resistor;
an eighteenth resistor, wherein one end of the eighteenth resistor is connected with a seventh pin of the high-frequency switch chip, and the other end of the eighteenth resistor is connected with the grid electrode of the second field effect transistor;
a nineteenth resistor connected between a fourth pin of the high frequency switch chip and a ground terminal;
a twentieth resistor, wherein one end of the twentieth resistor is connected with a first pin of the transformer, and the other end of the twentieth resistor is connected with a third pin of the high-frequency switch chip;
a twenty-first resistor, one end of which is connected with a first pin of the transformer, and the other end of which is connected with an eighth pin of the high-frequency switch chip;
A twenty-second resistor, one end of which is connected with a fourth pin of the transformer, and the other end of which is connected with a second pin of the high-frequency switch chip;
one end of the twenty-third resistor is connected with the other end of the twenty-second resistor, and the other end of the twenty-third resistor is grounded;
the first optical coupler is connected with the fourth pin of the high-frequency switch chip, the second pin of the first optical coupler is connected with the processing unit, and the third pin of the first optical coupler is grounded;
one end of the twenty-fourth resistor is connected with the first pin of the first optocoupler, and the other end of the twenty-fourth resistor is used for being externally connected with a +5V direct current power supply;
one end of the twenty-fifth resistor is connected with the second pin of the first optocoupler;
one end of the fourth diode is connected with a third pin of the transformer;
the anode of the fifth diode is connected with the other end of the fourth diode, and the cathode of the fifth diode is connected with the first pin of the transformer;
A sixth diode, wherein the positive electrode of the sixth diode is connected with the fourth pin of the transformer, and the negative electrode of the sixth diode is connected with the eighth pin of the high-frequency switch chip;
a seventh diode, wherein the anode of the seventh diode is connected with an eighth pin of the transformer;
an eighth diode, wherein the positive electrode of the eighth diode is grounded, and the negative electrode of the eighth diode is connected with an eighth pin of the high-frequency switch chip;
a ninth diode, wherein the positive electrode of the ninth diode is connected with the other end of the twenty-fifth resistor, and the negative electrode of the ninth diode is grounded;
one end of the eighth capacitor is connected with a sixth pin of the high-frequency switch chip, and the other end of the eighth capacitor is grounded;
a ninth capacitor, one end of which is connected with the third pin of the high-frequency switch chip, and the other end of which is grounded;
a tenth capacitor, one end of which is connected with an eighth pin of the high-frequency switch chip, and the other end of which is grounded;
an eleventh capacitor, one end of which is connected with the second pin of the high-frequency switch chip, and the other end of which is grounded;
A twelfth capacitor, a thirteenth capacitor and a fourteenth capacitor, wherein the negative electrode of the seventh diode is connected with a tenth pin of the transformer through the twelfth capacitor, the thirteenth capacitor and the fourteenth capacitor respectively;
the first pin of the current sensor chip is connected with the negative electrode of the seventh diode, the second pin of the current sensor chip is connected with the first pin of the current sensor chip, the third pin of the current sensor chip is connected with the fourth pin of the current sensor chip, the third pin of the current sensor chip is used for being connected with the positive electrode of the single battery, the fifth pin of the current sensor chip is grounded, and the eighth pin of the current sensor chip is used for being externally connected with a +5V direct current power supply;
a fifteenth capacitor, one end of which is connected with a sixth pin of the current sensor chip, and the other end of which is connected with a fifth pin of the current sensor chip;
a sixteenth capacitor, one end of which is connected with the processing unit, and the other end of which is grounded;
And one end of the twenty-sixth resistor is connected with the processing unit, and the other end of the twenty-sixth resistor is connected with a seventh pin of the current sensor chip.
Optionally, the channel selection unit includes:
the first end of the channel selection module is connected with the other end of the equalization unit, and the second end of the channel selection module is connected with the other end of the voltage acquisition unit;
and one end of the relay switch is connected with the third end of the channel selection module, and the other end of the relay switch is connected with the battery pack.
Optionally, the processing unit includes a microprocessor, and the channel selection module includes:
the system comprises a plurality of logic shift registers, a plurality of logic shift registers and a plurality of logic control circuits, wherein the eighth pin of each logic shift register is grounded, the tenth pin of each logic shift register is connected with an MR port of the microprocessor, the eleventh pin of each logic shift register is connected with an SHCP port of the microprocessor, the twelfth pin of each logic shift register is connected with an STCP port of the microprocessor, the thirteenth pin of each logic shift register is connected with an OE port of the microprocessor, the logic shift register connected with the microprocessor is connected with a DS port of the microprocessor through the fourteenth pin of the logic shift register, and the fourteenth pin of the logic shift register connected between two logic shift registers is connected with a ninth pin of the last logic shift register;
The relay switch includes:
the first pin of each second optocoupler is externally connected with a +5V direct current power supply through the twenty-seventh resistor, the second pin of the second optocoupler is used for receiving a control instruction of the processing unit through the channel selection module, the third pin of the second optocoupler is connected with one end of a single battery of the battery pack, and the fourth pin of the second optocoupler is used for being connected with the other ends of the acquisition switch and the equalizing switch through the channel selection module.
Optionally, the processing unit includes a microprocessor, and the channel selection module includes:
the system comprises a microprocessor, a plurality of logic shift registers and a plurality of logic control circuits, wherein an eighth pin of each logic shift register is grounded, a tenth pin of each logic shift register is connected with an MR port of the microprocessor, an eleventh pin of each logic shift register is connected with an SHCP port of the microprocessor, a twelfth pin of each logic shift register is connected with an STCP port of the microprocessor, a thirteenth pin of each logic shift register is connected with an OE port of the microprocessor, the logic shift register connected between the microprocessor and the logic shift registers is connected with a DS port of the microprocessor through a fourteenth pin of the logic shift register, and a fourteenth pin of the logic shift register connected between the two logic shift registers is connected with a ninth pin of the last logic shift register;
The relay switch includes: the optical coupler comprises at least one third optical coupler and at least one fourth optical coupler, wherein the third optical coupler corresponds to the fourth optical coupler one by one;
the second pin of each third optocoupler is used for receiving the control instruction of the processing unit through the channel selection module, the third pin of each third optocoupler is connected with one end of a single battery, the fourth pin of each third optocoupler is used for being connected with the other ends of the acquisition switch and the equalization switch through the channel selection module,
the first pin of each fourth optocoupler is externally connected with a +5V direct current power supply through a twenty-eighth resistor, the second pin of each fourth optocoupler is connected with the corresponding first pin of the third optocoupler, the third pin of each fourth optocoupler is connected with the other end of the single battery, and the fourth pin of each fourth optocoupler is used for being connected with the other ends of the acquisition switch and the equalizing switch through the channel selection module.
Optionally, the temperature acquisition unit includes:
the thermistors are respectively arranged on the single batteries, and one end of each thermistor is grounded;
a plurality of twenty-ninth resistors, wherein one end of each twenty-ninth resistor is used for externally connecting a reference voltage of +4.096V, and the other end of each twenty-ninth resistor is connected with the other end of the thermistor;
The input ends of the analog channel multiplexer are respectively connected to the node between each twenty-ninth resistor and the thermistor, the positive electrode of a power supply pin of the analog channel multiplexer is used for being externally connected with a direct current power supply of +5V, the negative electrode of the power supply pin of the analog channel multiplexer is grounded, the VEE pin of the analog channel multiplexer is connected with the negative electrode of the power supply pin of the analog channel multiplexer, and the enabling pin, the ninth pin, the tenth pin and the eleventh pin of the analog channel multiplexer are connected with the processing unit;
the non-inverting input end of the third operational amplifier is connected with the output pin of the analog channel multiplexer, and the inverting input end of the third operational amplifier is connected with the output end of the third operational amplifier;
and the output end of the third operational amplifier is connected with the processing unit through the thirty-first resistor.
Through the technical scheme, the active equalization circuit for the battery pack can perform temperature compensation calculation on the detection value when detecting the single voltage of the battery pack according to the characteristic of non-uniform temperature of the battery pack, so that accurate detection of the single voltage of the battery pack is realized, and the battery pack is actively equalized according to the calculated equivalent voltage, so that the rationality of selection of the equalized battery pack is improved, and the equalization efficiency of the battery pack is improved.
Additional features and advantages of embodiments of the invention will be set forth in the detailed description which follows.
Drawings
The accompanying drawings are included to provide a further understanding of embodiments of the invention and are incorporated in and constitute a part of this specification, illustrate embodiments of the invention and together with the description serve to explain, without limitation, the embodiments of the invention. In the drawings:
fig. 1 is a flowchart of an active equalization method for a battery pack according to an embodiment of the present invention;
FIG. 2 is a graph of voltage versus SOC for a battery cell under different temperature conditions, according to one embodiment of the present invention;
fig. 3 is a block diagram of an active equalization circuit for a battery pack according to an embodiment of the present invention;
fig. 4 is a block diagram of an active equalization circuit for a battery pack according to an embodiment of the present invention;
FIG. 5 is a schematic diagram of a voltage acquisition module according to one embodiment of the invention;
FIG. 6 is a block diagram of a boost module according to one embodiment of the invention;
fig. 7 is a schematic diagram of a transformer step-down module according to an embodiment of the present invention;
FIG. 8 is a schematic diagram of a channel selection module according to one embodiment of the invention;
fig. 9 is a schematic structural view of a relay switch according to an embodiment of the present invention;
fig. 10 is a schematic structural view of a relay switch according to an embodiment of the present invention; and
fig. 11 is a schematic structural view of a temperature acquisition unit according to an embodiment of the present invention.
Detailed Description
The following describes specific embodiments of the present invention in detail with reference to the drawings. It should be understood that the detailed description and specific examples, while indicating and illustrating the invention, are not intended to limit the invention.
Fig. 1 is a flowchart illustrating an active equalization method for a battery pack according to an embodiment of the present invention. In fig. 1, the active equalization method may include:
in step S10, a relationship curve of voltage and remaining capacity (SOC) of the unit cells of the battery pack at different temperatures is obtained through experiments. In one example of the present invention, taking a single cell as an example, the voltage versus remaining capacity curves of the single cell under different temperatures (0 ℃, 10 ℃, 20 ℃, 30 ℃, 40 ℃ and 50 ℃) are shown in fig. 2. In fig. 2, the voltages of the unit cells of the same SOC value are different in the case of different temperatures, and thus, it can be determined that the voltages of the unit cells vary with the temperature.
In step S11, the temperature and voltage of each unit cell of the battery pack are detected, respectively.
In step S12, compensation calculation is performed according to the temperature and voltage of the unit battery, and the equivalent voltage of each unit battery is determined. In one example of the present invention, the compensation calculation may be performed according to the temperature and voltage of the unit cell by determining the equivalent voltage of the unit cell at 20 ℃, for example, according to the relationship in fig. 2; preferably, the equivalent voltage can be calculated according to equation (1),
wherein U is 20℃ Is the equivalent voltage of a single battery at 20 ℃, U T Is the voltage of the single battery at the temperature T,is the amount of compensation required for the battery voltage at T to be equivalent to a voltage of 20 c, which is dependent on the battery type and can be determined according to the battery type.
In step S13, it is determined whether the battery pack needs to be balanced on or not according to each equivalent voltage. In one example of the present invention, it may be, for example, a threshold value preset to indicate whether or not active equalization is required to be started, and active equalization is started in the case where it is determined that the difference between the maximum value and the minimum value of the equivalent voltage of the battery pack is greater than the threshold value; and under the condition that the difference value is less than or equal to the threshold value, the active equalization is not started. In one example of the present invention, the maximum value and the minimum value may be determined by, for example, arranging the equivalent voltages of the unit cells from small to large using a bubble sorting method, and calculating a difference between the maximum value and the minimum value to thereby calculate the difference.
In step S14, when it is determined that the battery pack needs to be balanced, the unit cells having the lowest equivalent voltages are balanced.
After a period of equalization, step S11 is performed again.
In one embodiment of the present invention, the active equalization method may further include an active equalization circuit preset for the battery pack. As shown in fig. 3, the active equalization circuit may include a processing unit 10, a channel selection unit 20, an equalization unit 30, a voltage acquisition unit 40, and a temperature acquisition unit 50.
The temperature acquisition unit 50 may be used to acquire the temperature of each unit cell of the battery pack B.
The voltage acquisition unit 40 may be used to acquire the voltages of the unit cells of the battery pack B.
The equalization unit 30 may be used to perform an equalization operation on the battery B.
The first end of the channel selection unit 20 is connected with the voltage acquisition unit 40, the second end of the channel selection unit 20 is connected with the equalization unit 30, and the third end of the channel selection unit 20 is connected with the battery pack B.
The processing unit 10 may be connected to the temperature acquisition unit 50, the voltage acquisition unit 40, the equalization unit 30, the channel selection unit 20, respectively, for:
the temperature of each single battery of the battery pack B is respectively acquired through the temperature acquisition unit 50;
The control channel selection unit 20 connects the voltage acquisition unit 40 to both ends of each unit cell to acquire the voltage of each unit cell, respectively;
performing compensation calculation according to the temperature and the voltage, and determining the equivalent voltage of each single battery;
judging whether the battery pack B needs to be balanced or not according to each single voltage;
in the case that it is determined that the battery B needs to be balanced, the control channel selection unit 20 disconnects the voltage acquisition unit 40 from the battery B, and the control channel selection unit 20 connects the balancing unit 30 to the cell with the lowest equivalent voltage in the battery B to balance the cells;
after balancing the monomer battery with the lowest equivalent voltage for a period of time, detecting the monomer voltage of the battery pack B again and judging the balancing condition, and stopping active balancing when the balancing is not required to be started. In this embodiment, the length of the period of time may be determined according to the standard voltage, material of the battery B. In this embodiment, taking battery B as a lithium battery and a standard voltage of 3.6V as an example, the period of time may be 100ms.
In one embodiment of the present invention, as shown in fig. 4, the voltage acquisition unit 40 may include a voltage acquisition module 41 and an acquisition switch 42.
One end of the voltage acquisition module 41 may be connected to the processing unit 10. One end of the collection switch 42 may be connected with the other end of the voltage collection module 41, the other end of the collection switch 42 is connected with the first end of the channel selection unit 20, and the control end of the collection switch 42 is connected with the processing unit 10.
Preferably, the voltage acquisition module 41 may comprise a circuit as shown in fig. 5. In fig. 5, the voltage acquisition module 41 may include:
the first resistor R1, one end and the other end of the first resistor R1 are used for being connected with the positive electrode and the negative electrode of the single battery respectively;
the second resistor R2, one end of the second resistor R2 is connected with one end of the first resistor R1;
one end of the third resistor R3 is connected with the other end of the first resistor R1;
the negative electrode of the power supply end of the first operational amplifier U1 is grounded (+5V GND);
the positive electrode of the first diode D1 is connected with the inverting input end of the first operational amplifier U1, and the negative electrode of the first diode D1 is connected with the non-inverting input end of the first operational amplifier U1;
the positive electrode of the second diode D2 is connected with the positive input end of the first operational amplifier U1, and the negative electrode of the second diode D2 is connected with the negative input end of the first operational amplifier U1;
The fourth resistor R4 is connected between the inverting input end of the first operational amplifier U1 and the output end of the first operational amplifier U1;
the fifth resistor R5 is connected between the positive input end of the first operational amplifier U1 and the negative electrode of the power supply end of the first operational amplifier U1;
one end of the first inductor L1 is used for being externally connected with a +5V direct current power supply, and the other end of the first inductor L1 is connected with the positive electrode of the power supply end of the first operational amplifier U1;
the other end of the first inductor L1 is grounded (+5V GND) through the first capacitor C1 and the second capacitor C2 respectively, wherein the second capacitor C2 is a polar capacitor, the positive electrode of the second capacitor C2 is connected with the other end of the first inductor L1, the negative electrode of the second capacitor C2 is grounded, and the first capacitor C1 is a nonpolar capacitor;
the second operational amplifier U2, the inverting input end of the second operational amplifier U2 is connected with the output end of the second operational amplifier U2, the non-inverting input end of the second operational amplifier U2 is connected with the output end of the first operational amplifier U1, and the output end of the second operational amplifier U2 is connected with the processing unit 10. In case the processing unit 10 is a microcontroller, the output of the second op-amp U2 may be connected to the ad_vbat pin of the microprocessor.
In one embodiment of the present invention, as shown in fig. 4, the equalizing unit 30 may include: a boost module 31, a transformer buck module 32, and an equalization switch 33. One end of the transformer step-down module 32 may be connected with the step-up module 31; one end of the equalizing switch 33 is connected to the other end of the transformer step-down module 32, and the other end of the equalizing switch 33 is connected to the second end of the channel selection unit 20.
In one embodiment of the present invention, as shown in fig. 6, the boosting module 31 may include:
the resistor R6 is arranged at one end of the resistor R6 and is used for being externally connected with a +12V direct current power supply;
one end of the seventh resistor R7 is connected with the other end of the sixth resistor R6, and the other end of the seventh resistor R7 is grounded;
the second inductor L2, one end of the second inductor L2 is connected with one end of the sixth resistor R6;
the positive electrode of the third diode D3 is connected to the other end of the second inductor L2, and the negative electrode of the third diode D3 is connected to the transformer step-down module 32 (for example, pbl+ port in the figure);
the first pin (VIN) and the sixth pin (GND) of the boost chip U3 are grounded, and the seventh pin (UVLO) of the boost chip U3 is connected with a node between the sixth resistor R6 and the seventh resistor R7;
an eighth resistor R8, wherein one end of the eighth resistor R8 is connected with a ninth pin (RT) of the boost chip U3;
one end of the third capacitor C3 is connected with the other end of the eighth resistor R8, and the other end of the third capacitor C3 is connected with a tenth pin (SS) of the boost chip U3;
a ninth resistor R9, wherein one end of the ninth resistor R9 is connected with an eighth pin (CS) of the boost chip U3;
one end of the fourth capacitor C4 is connected with the other end of the ninth resistor R9, and the other end of the fourth capacitor C4 is connected with a sixth pin (GND) of the boost chip U3;
A tenth resistor R10, one end of the tenth resistor R10 is connected to a sixth pin (GND) of the boost chip U3;
an eleventh resistor R11, one end of the eleventh resistor R11 is connected to the other end of the ninth resistor R9, and the other end of the eleventh resistor R11 is connected to the other end of the tenth resistor R10;
the grid electrode of the first field effect tube Q1 is connected with a fifth pin (OUT) of the boost chip U3, the source electrode of the first field effect tube Q1 is connected with the other end of the tenth resistor R10, and the drain electrode of the first field effect tube Q1 is connected with a node between the second inductor L2 and the third diode D3;
one end of the fifth capacitor C5 is connected with a fourth pin (VCC) of the boost chip U3, and the other end of the fifth capacitor C5 is grounded;
a sixth capacitor C6, the sixth capacitor C6 being connected between the second pin (FB) and the third pin (COMP) of the boost chip U3;
a twelfth resistor R12, wherein one end of the twelfth resistor R12 is connected with a first pin (VIN) of the boost chip U3, and the other end of the twelfth resistor R12 is connected with one end of the second inductor L2;
a thirteenth resistor R13, one end of the thirteenth resistor R13 is connected to a third pin (COMP) of the boost chip U3;
a seventh capacitor C7, one end of the seventh capacitor C7 is connected to the other end of the thirteenth resistor R13, and the other end of the seventh capacitor C7 is connected to the second pin (FB) of the boost chip U3;
A fourteenth resistor R14, one end of the fourteenth resistor R14 is connected to the negative electrode of the third diode D3, and the other end of the fourteenth resistor R14 is connected to the second pin (FB) of the boost chip U3;
and a fifteenth resistor R15, one end of the fifteenth resistor R15 is connected to the other end of the fourteenth resistor R14, and the other end of the fifteenth resistor R15 is grounded.
In one embodiment of the present invention, as shown in fig. 7, the transformer step-down module 32 may include:
the transformer T1, the first pin of the transformer T1 is connected with the boosting module 31 (PBL+), the fifth pin of the transformer T1 is grounded, and the tenth pin of the transformer T1 is used for being connected with the negative electrode (BIJ-) of the single battery;
the drain electrode of the second field effect tube Q2 is connected with the third pin of the transformer T1;
a sixteenth resistor R16, wherein one end of the sixteenth resistor R16 is connected with the source electrode of the second field effect transistor Q2, and the other end of the sixteenth resistor R16 is grounded;
the high-frequency switch chip U4, the first pin (NC) of the high-frequency switch chip U4 is suspended, and the fifth pin (GND) of the high-frequency switch chip U4 is grounded;
a seventeenth resistor R17, one end of the seventeenth resistor R17 is connected to a sixth pin (Isense) of the high-frequency switch chip U4, and the other end of the seventeenth resistor R17 is connected to one end of a sixteenth resistor R16;
An eighteenth resistor R18, wherein one end of the eighteenth resistor R18 is connected with a seventh pin (OUTPUT) of the high-frequency switch chip U4, and the other end of the eighteenth resistor R18 is connected with the gate of the second field-effect transistor Q2;
a nineteenth resistor R19, the nineteenth resistor R19 being connected between the fourth pin (SD) of the high-frequency switch chip U4 and the ground terminal;
a twentieth resistor R20, wherein one end of the twentieth resistor R20 is connected with the first pin of the transformer T1, and the other end of the twentieth resistor R20 is connected with the third pin (Vin) of the high-frequency switch chip U4;
a twenty-first resistor R21, wherein one end of the twenty-first resistor R21 is connected with a first pin of the transformer T1, and the other end of the twenty-first resistor R21 is connected with an eighth pin (Vcc) of the high-frequency switch chip U4;
a twenty-second resistor R22, one end of the twenty-second resistor R22 is connected with a fourth pin of the transformer T1, and the other end of the twenty-second resistor R22 is connected with a second pin (Vsense) of the high-frequency switch chip U4;
a twenty-third resistor R23, wherein one end of the twenty-third resistor R23 is connected with the other end of the twenty-second resistor R22, and the other end of the twenty-third resistor R23 is grounded;
the first optocoupler RL1, a fourth pin of the first optocoupler RL1 is connected with a fourth pin (SD) of the high-frequency switch chip U4, a second pin of the first optocoupler RL1 is connected with the processing unit 10 (BL_CTRL), and a third pin of the first optocoupler RL1 is grounded;
One end of the twenty-fourth resistor R24 is connected with the first pin of the first optocoupler RL1, and the other end of the twenty-fourth resistor R24 is used for being externally connected with a +5V direct current power supply;
a twenty-fifth resistor R25, wherein one end of the twenty-fifth resistor R25 is connected with the second pin of the first optocoupler RL 1;
a fourth diode D4, where the fourth diode D4 may be a transient suppression diode, and one end of the fourth diode D4 is connected to the third pin of the transformer T1;
the anode of the fifth diode D5 is connected with the other end of the fourth diode D4, and the cathode of the fifth diode D5 is connected with the first pin of the transformer T1;
a sixth diode D6, the anode of the sixth diode D6 is connected to the fourth pin of the transformer T1, and the cathode of the sixth diode D6 is connected to the eighth pin (Vcc) of the high-frequency switch chip U4;
a seventh diode D7, wherein the anode of the seventh diode D7 is connected with the eighth pin of the transformer T1;
an eighth diode D8, the eighth diode D8 may be a schottky diode, the positive electrode of the eighth diode D8 is grounded, and the negative electrode of the eighth diode D8 is connected to an eighth pin (Vcc) of the high-frequency switch chip U4;
a ninth diode D9, an anode of the ninth diode D9 is connected to the other end of the twenty-fifth resistor R25, and a cathode of the ninth diode D9 is grounded;
An eighth capacitor C8, one end of the eighth capacitor C8 is connected to a sixth pin (Isense) of the high frequency switch chip U4, and the other end of the eighth capacitor C8 is grounded;
a ninth capacitor C9, one end of the ninth capacitor C9 is connected to the third pin (Vin) of the high-frequency switch chip U4, and the other end of the ninth capacitor C9 is grounded;
a tenth capacitor C10, one end of the tenth capacitor C10 is connected to an eighth pin (Vcc) of the high frequency switch chip U4, and the other end of the tenth capacitor C10 is grounded;
an eleventh capacitor C11, one end of the eleventh capacitor C11 is connected to the second pin (Vsense) of the high frequency switch chip U4, and the other end of the eleventh capacitor C11 is grounded;
the twelfth capacitor C12, the thirteenth capacitor C13, and the fourteenth capacitor C14 may be a capacitor having a polarity, and the anodes of the twelfth capacitor C12, the thirteenth capacitor C13, and the fourteenth capacitor C14 are connected to the cathode of the seventh diode D7, and the cathodes of the twelfth capacitor C12, the thirteenth capacitor C13, and the fourteenth capacitor C14 are connected to the tenth pin of the transformer T1;
the current sensor chip U5, the first pin (IP+) of the current sensor chip U5 is connected with the cathode of the seventh diode D7, the second pin (IP+) of the current sensor chip U5 is connected with the first pin (IP+) of the current sensor chip U5, the third pin (IP-) of the current sensor chip U5 is connected with the fourth pin (IP-) of the current sensor chip U5, the third pin of the current sensor chip is used for being connected with the anode (BIJ+) of the single battery, the fifth pin (GND) of the current sensor chip U5 is grounded (+5VGND), and the eighth pin (VCC) of the current sensor chip U5 is used for being externally connected with a +5V direct current power supply;
A fifteenth capacitor C15, one end of the fifteenth capacitor C15 is connected to the sixth pin (FILTER) of the current sensor chip U5, and the other end of the fifteenth capacitor C15 is connected to the fifth pin (GND) of the current sensor chip U5;
a sixteenth capacitor C16, one end of which is connected to the processing unit 10 (bl_current), and the other end of which is grounded;
one end of the twenty-sixth resistor R26 is connected to the processing unit 10 (bl_current), and the other end of the twenty-sixth resistor R26 is connected to the seventh pin (VIOUT) of the Current sensor chip U5.
In one embodiment of the present invention, as shown in fig. 4, the channel selection unit 20 may include:
the first end of the channel selection module 21 is connected with the other end of the equalization unit 30, and the second end of the channel selection module 21 is connected with the other end of the voltage acquisition unit 40;
and a relay switch 22, one end of the relay switch 22 is connected with the third end of the channel selection module 21, and the other end of the relay switch 22 is connected with the battery pack B.
In one embodiment of the present invention, as shown in fig. 8, the processing unit 10 may include a microprocessor, and the channel selection module 21 may include:
Multiple logic shift registers U6The eighth pin (GND) of each logic shift register U6 is grounded, and the tenth pin of each logic shift register U6An eleventh pin (SHCP) of each logic shift register U6 is connected with the SHCP port of the microprocessor, a twelfth pin (STCP) of each logic shift register U6 is connected with the STCP port of the microprocessor, and a thirteenth pin +.>The logic shift register U6 connected between the microprocessor and the logic shift register U6 is connected with the DS port of the microprocessor through a fourteenth pin (DS) of the logic shift register U6, and a fourteenth pin (DS) of the logic shift register U6 connected between the two logic shift registers U6 is connected with a ninth pin (Q7S) of the last logic shift register U6;
for the relay switch 22, in one example of the present invention, as shown in fig. 9, the relay switch 22 may include:
and the first pin of each second optocoupler RL2 is externally connected with a +5V direct current power supply through a twenty-seventh resistor R27, the second pin of the second optocoupler RL2 is used for receiving a control instruction of the processing unit 10 through the channel selection module 21, the third pin of the second optocoupler RL2 is connected with one end of a single battery of the battery pack, and the fourth pin of the second optocoupler RL2 is used for being connected with the other ends of the acquisition switch 42 and the equalizing switch 33 through the channel selection module 21. When detecting or equalizing the cell voltage of the cell, the processing unit 10 may output a low level to the second pin of the second optocoupler RL2 to make the light emitting diode of the second optocoupler RL2 emit light, and turn on the connection between the third pin and the fourth pin of the second optocoupler RL2, so that the collection switch 42 and the equalizing switch 33 are connected with one end of the cell connected with the second optocoupler RL 2. The processing unit 10 further controls the on-off of the collection switch 42 and the equalization switch 33 to realize the voltage collection and equalization operation of the voltage collection unit 40 and the equalization unit 30 on the single battery.
In another example of the present invention, as shown in fig. 10, each relay switch 22 may include: the optical coupler comprises at least one third optical coupler RL3 and at least one fourth optical coupler RL4, wherein the third optical coupler RL3 corresponds to the fourth optical coupler RL4 one by one;
the second pin of each third optocoupler RL3 is used for receiving the control instruction of the processing unit 10 through the channel selection module 21, the third pin of each third optocoupler RL3 is connected with one end of a single battery, the fourth pin of each third optocoupler RL3 is used for being connected with the other ends of the acquisition switch 42 and the equalization switch 33 through the channel selection module 21,
the first pin of each fourth optocoupler RL4 is externally connected with a +5v direct current power supply through a twenty-eighth resistor R28, the second pin of each fourth optocoupler RL4 is connected with the first pin of the corresponding third optocoupler RL3, the third pin of each fourth optocoupler RL4 is connected with the other end of the single battery, and the fourth pin of each fourth optocoupler RL4 is connected with the other ends of the acquisition switch 42 and the equalizing switch 33 through the channel selection module 21. When the single battery needs to be detected and balanced, the processing unit 10 can output a low level to the second pin of the third optocoupler RL3, so that the light emitting diodes of the third optocoupler RL3 and the fourth optocoupler RL4 emit light, and then the connection between the third pin and the fourth pin of the third optocoupler RL3 and the fourth optocoupler RL4 is conducted, and further the collection switch 42 and the balance switch 33 are connected with two ends of the single battery. The processing unit 10 can realize voltage collection and balancing operation of the voltage collection unit 40 and the balancing unit 30 on the unit cells by controlling the collection switch 42 and the balancing switch 33.
In one embodiment of the present invention, as shown in fig. 11, the temperature acquisition unit 50 may include:
the plurality of thermistors NTC1 are respectively arranged on the single batteries, and one end of each thermistor NTC1 is grounded;
the system comprises a plurality of twenty-ninth resistors R29, wherein one end of each twenty-ninth resistor R29 is used for being externally connected with a direct current power supply of +4.096V, and the other end of each twenty-ninth resistor R29 is connected with the other end of the thermistor NTC;
an analog channel multiplexer U7, wherein a plurality of input terminals (Y0 to Y7) of the analog channel multiplexer U7 are respectively connected to a node between each twenty-ninth resistor R29 and the thermistor NTC1, the positive electrode (VCC) of the power supply pin of the analog channel multiplexer U7 is used for externally connecting a +5v direct current power supply, the negative electrode (GND) of the power supply pin of the analog channel multiplexer U7 is grounded, the VEE pin of the analog channel multiplexer U7 is connected with the negative electrode of the power supply pin of the analog channel multiplexer U7, and the enable pin of the analog channel multiplexer U7The ninth pin (S2), tenth pin (S1), and eleventh pin (S0) are connected to the processing unit 10. The processing unit 10 can realize the individual detection of the temperature of each unit cell by outputting high and low levels to the ninth pin (S2), tenth pin (S1), and eleventh pin (S0) of the analog channel multiplexer U7, respectively, according to the encoding principle of the three-bit binary number.
The non-inverting input end of the third operational amplifier U8 is connected with the output pin of the analog channel multiplexer U7, and the inverting input end of the third operational amplifier U8 is connected with the output end of the third operational amplifier U8;
the output end of the third operational amplifier U8 is connected with the processing unit 10 through the thirty-first resistor R30.
Another aspect of the present invention also provides an active equalization circuit for a battery pack, which may include the active equalization circuit shown in fig. 3 to 11, which is controlled by the active equalization method shown in fig. 1 to achieve equalization of unit cells of the battery pack.
In this embodiment of the invention, each capacitor equalizes the non-polar capacitance except the noted polar capacitance. In addition, the specific structure of the circuit as shown in fig. 4 to 10 is limited to supplement and explain the present invention, and does not limit the scope of protection of the present invention. Under the same technical concept of the present invention, simple modifications to the specific structure of the circuit as shown in fig. 4 and 10 (for example, modification of the connection manner of the resistor) are all within the scope of the present invention.
Through the technical scheme, the active equalization method and the active equalization circuit for the battery pack can perform temperature compensation calculation on the detection value when detecting the single voltage of the battery pack according to the characteristic of non-uniform temperature of the battery pack, so that accurate detection of the single voltage of the battery pack is realized, and the battery pack is actively equalized according to the calculated equivalent voltage, so that the rationality of selection of the equalized battery pack is improved, and the equalization efficiency of the battery pack is improved.
The optional embodiments of the present invention have been described in detail above with reference to the accompanying drawings, but the embodiments of the present invention are not limited to the specific details of the foregoing embodiments, and various simple modifications may be made to the technical solutions of the embodiments of the present invention within the scope of the technical concept of the embodiments of the present invention, and all the simple modifications belong to the protection scope of the embodiments of the present invention.
In addition, the specific features described in the above embodiments may be combined in any suitable manner without contradiction. In order to avoid unnecessary repetition, the various possible combinations of embodiments of the invention are not described in detail.
Those skilled in the art will appreciate that all or part of the steps in implementing the methods of the embodiments described above may be implemented by a program stored in a storage medium, including instructions for causing a (which may be a single-chip microcomputer, a chip or the like) or processor (processor) to perform all or part of the steps of the methods of the embodiments described herein. And the aforementioned storage medium includes: a U-disk, a removable hard disk, a Read-Only Memory (ROM), a random access Memory (RAM, random Access Memory), a magnetic disk, or an optical disk, or other various media capable of storing program codes.
In addition, any combination of the various embodiments of the present invention may be made between the various embodiments, and should also be regarded as disclosed in the embodiments of the present invention as long as it does not deviate from the idea of the embodiments of the present invention.

Claims (10)

1. An active equalization circuit for a battery, the active equalization circuit comprising:
the temperature acquisition unit is used for acquiring the temperature of each single battery of the battery pack;
the voltage acquisition unit is used for acquiring the voltage of the single battery of the battery pack;
the equalization unit is used for performing equalization operation on the battery pack;
the first end of the channel selection unit is connected with the voltage acquisition unit, the second end of the channel selection unit is connected with the equalization unit, and the third end of the channel selection unit is connected with the battery pack;
the processing unit is respectively connected with the temperature acquisition unit, the voltage acquisition unit, the equalization unit and the channel selection unit and is used for:
the temperature of each single battery of the battery pack is respectively obtained through the temperature acquisition unit;
the channel selection unit is controlled to connect the voltage acquisition units to two ends of each single battery respectively so as to acquire the voltage of each single battery;
Performing compensation calculation according to the temperature and the voltage, and determining the equivalent voltage of each single battery;
judging whether the battery pack needs to be started for equalization or not according to each equivalent voltage;
under the condition that the battery pack is judged to need to be balanced, the channel selection unit is controlled to disconnect the connection between the voltage acquisition unit and the battery pack, and the channel selection unit is controlled to connect the balancing unit to the single battery with the lowest equivalent voltage in the battery pack so as to balance the single battery;
after balancing for a period of time, detecting the voltages of all the monomers again and judging the balancing condition, and stopping active balancing when the balancing is not required to be started.
2. The active equalization circuit of claim 1, wherein the voltage acquisition unit comprises:
the voltage acquisition module is connected with the processing unit at one end;
the system comprises a voltage acquisition module, a channel selection unit, an acquisition switch, a processing unit and a control end of the acquisition switch, wherein one end of the acquisition switch is connected with the other end of the voltage acquisition module, the other end of the acquisition switch is connected with the first end of the channel selection unit, and the control end of the acquisition switch is connected with the processing unit.
3. The active equalization circuit of claim 2, wherein the voltage acquisition module comprises:
the first resistor, one end of the first resistor and the other end of the first resistor are used for being connected with the positive electrode and the negative electrode of the single battery respectively;
one end of the second resistor is connected with one end of the first resistor;
one end of the third resistor is connected with the other end of the first resistor;
the inverting input end of the first operational amplifier is connected with the other end of the second resistor, the non-inverting input end of the first operational amplifier is connected with the other end of the third resistor, and the negative electrode of the power supply end of the first operational amplifier is grounded;
the positive electrode of the first diode is connected with the inverting input end of the first operational amplifier, and the negative electrode of the first diode is connected with the non-inverting input end of the first operational amplifier;
the positive electrode of the second diode is connected with the positive input end of the first operational amplifier, and the negative electrode of the second diode is connected with the negative input end of the first operational amplifier;
the fourth resistor is connected between the inverting input end of the first operational amplifier and the output end of the first operational amplifier;
The fifth resistor is connected between the positive input end of the first operational amplifier and the negative electrode of the power supply end of the first operational amplifier;
one end of the first inductor is used for being externally connected with a +5V direct current power supply, and the other end of the first inductor is connected with the positive electrode of the power supply end of the first operational amplifier;
the other end of the first inductor is grounded through the first capacitor and the second capacitor respectively;
the inverting input end of the second operational amplifier is connected with the output end of the second operational amplifier, the non-inverting input end of the second operational amplifier is connected with the output end of the first operational amplifier, and the output end of the second operational amplifier is connected with the processing unit.
4. The active equalization circuit of claim 1, wherein the equalization unit comprises:
a boost module;
the transformer step-down module is connected with the voltage boosting module at one end;
and one end of the equalizing switch is connected with the other end of the transformer step-down module, and the other end of the equalizing switch is connected with the second end of the channel selection unit.
5. The active equalization circuit of claim 4, wherein the boost module comprises:
One end of the sixth resistor is used for being externally connected with a +12V direct current power supply;
one end of the seventh resistor is connected with the other end of the sixth resistor, and the other end of the seventh resistor is grounded;
one end of the second inductor is connected with one end of the sixth resistor;
the positive electrode of the third diode is connected with the other end of the second inductor, and the negative electrode of the third diode is connected with the transformer step-down module;
the first pin and the sixth pin of the boost chip are grounded, and the seventh pin of the boost chip is connected with a node between the sixth resistor and the seventh resistor;
one end of the eighth resistor is connected with a ninth pin of the boost chip;
one end of the third capacitor is connected with the other end of the eighth resistor, and the other end of the third capacitor is connected with a tenth pin of the boost chip;
one end of the ninth resistor is connected with an eighth pin of the boost chip;
one end of the fourth capacitor is connected with the other end of the ninth resistor, and the other end of the fourth capacitor is connected with a sixth pin of the boost chip;
A tenth resistor, wherein one end of the tenth resistor is connected with a sixth pin of the boost chip;
an eleventh resistor, one end of which is connected with the other end of the ninth resistor, and the other end of which is connected with the other end of the tenth resistor;
the grid electrode of the first field effect tube is connected with a fifth pin of the boosting chip, the source electrode of the first field effect tube is connected with the other end of the tenth resistor, and the drain electrode of the first field effect tube is connected with a node between the second inductor and the third diode;
one end of the fifth capacitor is connected with a fourth pin of the boost chip, and the other end of the fifth capacitor is grounded;
the sixth capacitor is connected between the third pin of the second pin of the boost chip;
a twelfth resistor, wherein one end of the twelfth resistor is connected with the first pin of the boost chip, and the other end of the twelfth resistor is connected with one end of the second inductor;
a thirteenth resistor, one end of which is connected with a third pin of the boost chip;
one end of the seventh capacitor is connected with the other end of the thirteenth resistor, and the other end of the seventh capacitor is connected with the second pin of the boost chip;
A fourteenth resistor, one end of which is connected with the negative electrode of the third diode, and the other end of which is connected with the second pin of the boost chip;
and one end of the fifteenth resistor is connected with the other end of the fourteenth resistor, and the other end of the fifteenth resistor is grounded.
6. The active equalization circuit of claim 5, wherein the transformer step-down unit comprises:
the first pin of the transformer is connected with the boosting module, the fifth pin of the transformer is grounded, and the tenth pin of the transformer is used for being connected with the negative electrode of the single battery;
the drain electrode of the second field effect tube is connected with the third pin of the transformer;
a sixteenth resistor, wherein one end of the sixteenth resistor is connected with the source electrode of the second field effect transistor, and the other end of the sixteenth resistor is grounded;
the high-frequency switch chip is suspended in the air, and the fifth pin of the high-frequency switch chip is grounded;
a seventeenth resistor, one end of which is connected with a sixth pin of the high-frequency switch chip, and the other end of which is connected with one end of the sixteenth resistor;
An eighteenth resistor, wherein one end of the eighteenth resistor is connected with a seventh pin of the high-frequency switch chip, and the other end of the eighteenth resistor is connected with the grid electrode of the second field effect transistor;
a nineteenth resistor connected between a fourth pin of the high frequency switch chip and a ground terminal;
a twentieth resistor, wherein one end of the twentieth resistor is connected with a first pin of the transformer, and the other end of the twentieth resistor is connected with a third pin of the high-frequency switch chip;
a twenty-first resistor, one end of which is connected with a first pin of the transformer, and the other end of which is connected with an eighth pin of the high-frequency switch chip;
a twenty-second resistor, one end of which is connected with a fourth pin of the transformer, and the other end of which is connected with a second pin of the high-frequency switch chip;
one end of the twenty-third resistor is connected with the other end of the twenty-second resistor, and the other end of the twenty-third resistor is grounded;
the first optical coupler is connected with the fourth pin of the high-frequency switch chip, the second pin of the first optical coupler is connected with the processing unit, and the third pin of the first optical coupler is grounded;
One end of the twenty-fourth resistor is connected with the first pin of the first optocoupler, and the other end of the twenty-fourth resistor is used for being externally connected with a +5V direct current power supply;
one end of the twenty-fifth resistor is connected with the second pin of the first optocoupler;
one end of the fourth diode is connected with a third pin of the transformer;
the anode of the fifth diode is connected with the other end of the fourth diode, and the cathode of the fifth diode is connected with the first pin of the transformer;
a sixth diode, wherein the positive electrode of the sixth diode is connected with the fourth pin of the transformer, and the negative electrode of the sixth diode is connected with the eighth pin of the high-frequency switch chip;
a seventh diode, wherein the anode of the seventh diode is connected with an eighth pin of the transformer;
an eighth diode, wherein the positive electrode of the eighth diode is grounded, and the negative electrode of the eighth diode is connected with an eighth pin of the high-frequency switch chip;
a ninth diode, wherein the positive electrode of the ninth diode is connected with the other end of the twenty-fifth resistor, and the negative electrode of the ninth diode is grounded;
One end of the eighth capacitor is connected with a sixth pin of the high-frequency switch chip, and the other end of the eighth capacitor is grounded;
a ninth capacitor, one end of which is connected with the third pin of the high-frequency switch chip, and the other end of which is grounded;
a tenth capacitor, one end of which is connected with an eighth pin of the high-frequency switch chip, and the other end of which is grounded;
an eleventh capacitor, one end of which is connected with the second pin of the high-frequency switch chip, and the other end of which is grounded;
a twelfth capacitor, a thirteenth capacitor and a fourteenth capacitor, wherein the negative electrode of the seventh diode is connected with a tenth pin of the transformer through the twelfth capacitor, the thirteenth capacitor and the fourteenth capacitor respectively;
the first pin of the current sensor chip is connected with the negative electrode of the seventh diode, the second pin of the current sensor chip is connected with the first pin of the current sensor chip, the third pin of the current sensor chip is connected with the fourth pin of the current sensor chip, the third pin of the current sensor chip is used for being connected with the positive electrode of the single battery, the fifth pin of the current sensor chip is grounded, and the eighth pin of the current sensor chip is used for being externally connected with a +5V direct current power supply;
A fifteenth capacitor, one end of which is connected with a sixth pin of the current sensor chip, and the other end of which is connected with a fifth pin of the current sensor chip;
a sixteenth capacitor, one end of which is connected with the processing unit, and the other end of which is grounded;
and one end of the twenty-sixth resistor is connected with the processing unit, and the other end of the twenty-sixth resistor is connected with a seventh pin of the current sensor chip.
7. The active equalization circuit of claim 1, wherein the channel selection unit comprises:
the first end of the channel selection module is connected with the other end of the equalization unit, and the second end of the channel selection module is connected with the other end of the voltage acquisition unit;
and one end of the relay switch is connected with the third end of the channel selection module, and the other end of the relay switch is connected with the battery pack.
8. The active equalization circuit of claim 7, wherein the processing unit comprises a microprocessor, and the channel selection module comprises:
The system comprises a plurality of logic shift registers, a plurality of logic shift registers and a plurality of logic control circuits, wherein the eighth pin of each logic shift register is grounded, the tenth pin of each logic shift register is connected with an MR port of the microprocessor, the eleventh pin of each logic shift register is connected with an SHCP port of the microprocessor, the twelfth pin of each logic shift register is connected with an STCP port of the microprocessor, the thirteenth pin of each logic shift register is connected with an OE port of the microprocessor, the logic shift register connected with the microprocessor is connected with a DS port of the microprocessor through the fourteenth pin of the logic shift register, and the fourteenth pin of the logic shift register connected between two logic shift registers is connected with a ninth pin of the last logic shift register;
the relay switch includes:
the first pin of each second optocoupler is externally connected with a +5V direct current power supply through a twenty-seventh resistor, the second pin of the second optocoupler is used for receiving a control instruction of the processing unit through the channel selection module, the third pin of the second optocoupler is connected with one end of a single battery of the battery pack, and the fourth pin of the second optocoupler is used for being connected with the other ends of the acquisition switch and the equalizing switch through the channel selection module.
9. The active equalization circuit of claim 7, wherein the processing unit comprises a microprocessor, and the channel selection module comprises:
the system comprises a microprocessor, a plurality of logic shift registers and a plurality of logic control circuits, wherein an eighth pin of each logic shift register is grounded, a tenth pin of each logic shift register is connected with an MR port of the microprocessor, an eleventh pin of each logic shift register is connected with an SHCP port of the microprocessor, a twelfth pin of each logic shift register is connected with an STCP port of the microprocessor, a thirteenth pin of each logic shift register is connected with an OE port of the microprocessor, the logic shift register connected between the microprocessor and the logic shift registers is connected with a DS port of the microprocessor through a fourteenth pin of the logic shift register, and a fourteenth pin of the logic shift register connected between the two logic shift registers is connected with a ninth pin of the last logic shift register;
the relay switch includes: the optical coupler comprises at least one third optical coupler and at least one fourth optical coupler, wherein the third optical coupler corresponds to the fourth optical coupler one by one;
The second pin of each third optocoupler is used for receiving the control instruction of the processing unit through the channel selection module, the third pin of each third optocoupler is connected with one end of a single battery, the fourth pin of each third optocoupler is used for being connected with the other ends of the acquisition switch and the equalizing switch through the channel selection module,
the first pin of each fourth optocoupler is externally connected with a +5V direct current power supply through a twenty-eighth resistor, the second pin of each fourth optocoupler is connected with the corresponding first pin of the third optocoupler, the third pin of each fourth optocoupler is connected with the other end of the single battery, and the fourth pin of each fourth optocoupler is used for being connected with the other ends of the acquisition switch and the equalizing switch through the channel selection module.
10. The active equalization circuit of claim 1, wherein the temperature acquisition unit comprises:
the thermistors are respectively arranged on the single batteries, and one end of each thermistor is grounded;
a plurality of twenty-ninth resistors, wherein one end of each twenty-ninth resistor is used for externally connecting a reference voltage of +4.096V, and the other end of each twenty-ninth resistor is connected with the other end of the thermistor;
The input ends of the analog channel multiplexer are respectively connected to the node between each twenty-ninth resistor and the thermistor, the positive electrode of a power supply pin of the analog channel multiplexer is used for being externally connected with a direct current power supply of +5V, the negative electrode of the power supply pin of the analog channel multiplexer is grounded, the VEE pin of the analog channel multiplexer is connected with the negative electrode of the power supply pin of the analog channel multiplexer, and the enabling pin, the ninth pin, the tenth pin and the eleventh pin of the analog channel multiplexer are connected with the processing unit;
the non-inverting input end of the third operational amplifier is connected with the output pin of the analog channel multiplexer, and the inverting input end of the third operational amplifier is connected with the output end of the third operational amplifier;
and the output end of the third operational amplifier is connected with the processing unit through the thirty-first resistor.
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