CN108628731A - A kind of method and processing equipment of selection test instruction - Google Patents

Abstract

This application discloses a kind of method and processing equipment of selection test instruction, the time expended when causing emulator to test the test fragment to solve the problems, such as that multiple test fragments in the prior art due to screening are discrete is longer.This method includes：Instruction to be tested is split as multiple segments by processing equipment, and determines the number for including the instruction of each feature in each segment, and determines that each segment includes the average value of each feature instruction；And include the average value of each feature instruction according to number of each segment comprising the instruction of each feature and each segment, select N number of segment as test instruction in the M segment, wherein to include at least two continuous segments in N number of segment.The accuracy that can ensure the performance indicator for the instruction to be tested that the performance indicator subsequently through N number of segment determines in this way, reduces the number of emulator loading procedure, improves the testing efficiency of emulator.

Description

A method and processing device for selecting test instructions

technical field

The present application relates to the field of computer technology, in particular to a method and processing equipment for selecting test instructions.

Background technique

In the process of designing and developing a large-scale program, R&D personnel often need to test the designed program by running an emulator, and then collect performance indicators of the program. For example, when designing a processor architecture, R&D personnel test the programs of the designed processor architecture to collect instructions per clock cycle (InstructionPer Cycle, IPC), cache hit ratios at all levels, and energy consumption.

However, due to the design process of the program, it is necessary to conduct multiple tests on the emulator. And as we all know, when running the same program, the running time required by the emulator is much longer than that required by the hardware platform. Therefore, it may take weeks or months or even longer for the emulator to complete this repeated test operation, which seriously affects the program development process and efficiency.

Studies have shown that during the running of the program, various performance indicators can show obvious staged characteristics. Therefore, on the premise of ensuring the accuracy of the final performance indicators of the entire program as much as possible, the R&D personnel should streamline the test program. From the point of view, the performance indicators of the entire program are obtained by the following methods:

1), the processor obtains the instruction flow of the program to be tested, and determines the type of the basic block (BasicBlock, BB) contained in the instruction flow;

2), the processor divides the instruction stream into a plurality of fragments (Interval), and determines the number of each type of BB contained in each fragment, and obtains a basic block vector (Basic Block Vector, BBV) corresponding to each fragment;

3), the processor carries out K-means (K-Means) clustering process to the BBV of each segment obtained, divides the obtained BBV into multiple classes, and then screens out a BBV closest to the class center in each class , and finally determine the test fragments corresponding to the screened multiple BBVs;

4), the emulator sequentially tests a plurality of test segments determined to obtain the performance index of each test segment;

5), the processor determines the proportion of the segment corresponding to each type of BBV in the entire program, that is, determines the weight of the performance index of each test segment, and then calculates according to the determined weight of the performance index of each test segment The performance index of each test segment is weighted to obtain the performance index of the entire program.

In the above method, since the processor adopts the K-Means clustering method to filter and obtain the test fragments, the obtained test fragments are discrete, that is, when the emulator tests the multiple test fragments, the number of times of startup is the same as the number of test fragments obtained. The number of the above test fragments is the same; in addition, because the emulator takes a long time to load the test fragments (Loading) into the memory during each startup process, and the emulator takes less time to run each test fragment, in summary As mentioned above, it still takes a long time for the emulator to test the multiple test segments.

Contents of the invention

The present application provides a method and a processing device for selecting test instructions, which are used to solve the problem in the prior art that it takes a long time for an emulator to test the test segments due to the discreteness of multiple screened test segments.

In a first aspect, the present application provides a method for selecting a test instruction, the method comprising the following steps:

After the processing device divides the instruction to be tested into M fragments, it determines the number of each characteristic instruction contained in each of the M fragments, and then determines the number of each characteristic instruction contained in each of the M fragments. average value; finally, the processing device is based on the number of each feature instruction contained in each of the M segments, and the average value of each feature instruction contained in each of the M segments, in the N fragments including at least two consecutive fragments are selected from the M fragments as test instructions, wherein M is an integer greater than 1, and N is an integer greater than 1 and less than M.

Since in the above method, the processing device selects the N segments according to the average value of each feature instruction contained in each of the M segments, the processing device selected by the above method The distribution of the characteristic instructions in the N fragments (i.e., the test instructions) is consistent with the distribution of the characteristic instructions in the instructions to be tested, and then the performance index of the instruction to be tested determined by the performance indexes of the N fragments can be ensured. accuracy; and with respect to selecting N discrete test segments by traditional methods, since the N segments selected by the processor include at least two continuous segments, like this, in the subsequent testing process, the emulator The times of loading the program are reduced, therefore, the method can reduce the time for the emulator to test the N segments, and improve the test efficiency of the emulator. In summary, the method can guarantee the accuracy of the performance index of the instruction to be tested determined by the performance index of the N segments, and can reduce the time for the emulator to test the N segments and improve the performance of the emulator. Test efficiency.

In a possible design, the processing device may select the N segments from the M segments as the test instruction through the following steps:

The processing device selects the N segments whose running time is less than a preset first time threshold and satisfies a first condition as the test instruction from the M segments; the first condition includes: The N segments include at least two consecutive segments, and the difference between the weighted sum of the feature vectors of all segments in the N segments and the basic vector is less than a preset first threshold, wherein the feature vector of each segment is the The basic vector is a vector composed of the average value of each characteristic instruction contained in each of the M segments.

Through the above-mentioned method, the processing device can select the N segments whose feature vector distributions of the segments contained in the M segments are similar or consistent with the distribution of the feature vectors in the M segments, so that, The accuracy of the performance index of the instruction-to-be-test determined subsequently through the performance indexes of the N segments can be guaranteed.

In a possible design, the processing device selects the N segments whose running time is less than the first time threshold and satisfies the first condition among the M segments as the test instruction:

Step a: the processing device initializes the residual vector as the basic vector, and initializes the subspaces to be selected as all X-subspaces, wherein the X-subspaces are any consecutive X of the M segments A space composed of feature vectors of segments, where X is an integer greater than 1 and less than M;

Step b: the processing device selects the subspace with the smallest angle with the residual vector among the subspaces to be selected, determines the projection vector of the residual vector in the selected subspace, and converts the residual The difference between the difference vector and the projection vector is used as a new residual vector, and all subspaces after the subspace to be selected are removed from the selected subspace are used as new subspaces to be selected;

Step c: If the size of the residual vector is smaller than the first threshold or the sum of the running times of the segments corresponding to the feature vectors contained in all the selected subspaces is greater than the preset second time threshold, the processing device will select all The N segments corresponding to the feature vectors contained in the subspace are used as the test instructions; if the size of the residual vector is not less than the first threshold and the sum of the running times of the segments corresponding to the feature vectors contained in all selected subspaces is not greater than For the second time threshold, the processing device returns to perform step b; wherein, the second time threshold is smaller than the first time threshold.

Through the above method, the N segments selected by the processing device include at least one continuous X segment, so that in the subsequent test process, the number of times the emulator loads the program can be further reduced, and the emulator test is greatly reduced. The time of the N segments improves the test efficiency of the simulator.

In a possible design, the second time threshold satisfies any one of the following conditions:

The second time threshold is greater than the difference between the first time threshold and a maximum running time, and the maximum running time is the maximum value among the running times of the M segments;

The second time threshold is greater than the difference between the first time threshold and X times the minimum running time, and the minimum running time is the minimum value among the running times of the M segments;

The second time threshold is greater than the difference between the first time threshold and the minimum run time.

The second time threshold is set by the above method, and when the sum of the running times of the segments corresponding to the feature vectors contained in all selected subspaces of the processing device is greater than the second time threshold, the processing can be guaranteed The device cannot select a subspace again, and the process of selecting a subspace can be stopped. Because reselecting the subspace will result in the sum of the running times of the segments corresponding to the eigenvectors contained in all the selected subspaces being greater than the first time threshold, and the sum of the running times of the N segments that do not satisfy the requirement is less than the The condition for the first time threshold.

In a possible design, the processing device may also use the following steps to select, among the M segments, the N segments whose running time is less than the first time threshold and satisfy the first condition as the The above test command:

Step a1: The processing device initializes the residual vector as the basic vector, and initializes the subspaces to be selected as all X-subspaces, wherein the X-subspaces are any consecutive X of the M segments A space composed of feature vectors of segments, where X is an integer greater than 1 and less than M;

Step b1: the processing device selects a first subspace having the smallest angle with the residual vector among the subspaces to be selected;

Step c1: the processing device determines a second subspace with the second smallest angle with the residual vector among the subspaces to be selected;

Step d1: The processing device takes all subspaces except the selected first subspace in the candidate subspaces as new candidate subspaces, and updates the residual vector in the following manner:

The processing device has correlation coefficients between all vectors in the first subspace and the residual vector, and finds the target direction with the largest correlation coefficient; the processing device determines the target vector Y according to the determined direction, and the One endpoint of the target vector Y is at the bisector angle position of the first subspace and the second subspace, and the other endpoint is the intersection of the residual vector and the first subspace; the processing device will The difference between the residual vector and Y is used as a new residual vector;

Step e1: If the size of the residual vector is smaller than the first threshold or the sum of the running times of the segments corresponding to the feature vectors contained in all the selected subspaces is greater than the preset second time threshold, the processing device will select all The N segments corresponding to the feature vectors contained in the subspace are used as the test instructions; if the size of the residual vector is not less than the first threshold and the sum of the running times of the segments corresponding to the feature vectors contained in all selected subspaces is not greater than The second time threshold, the processing device returns to execute step b1; wherein, the second time threshold is less than the first time threshold and greater than the difference between the first time threshold and the maximum running time, the maximum The running time is the maximum value among the running times of the M segments.

Through the above method, the N segments selected by the processing device include at least one continuous X segment, so that in the subsequent test process, the number of times the emulator loads the program can be further reduced, and the emulator test is greatly reduced. The time of the N segments improves the test efficiency of the simulator.

In a possible design, the processing device may also select the N segments from the M segments as the test instruction through the following steps:

First, the processing device regards at least two consecutive segments among the M segments as a group, thereby determining S segment groups, wherein, S is an integer greater than 1 and less than M, and one of the M segments contained in one of the S segment groups; then, the processing device determines a target vector for each of the S segment groups, wherein the target of any one of the S segment groups The vector is a vector composed of the average value of each feature instruction contained in each segment in the segment group; finally, the processing device selects a difference between the target vector and the basic vector in the S segment groups that is smaller than the preset Set at least one fragment group of the second threshold, and use the N fragments contained in the at least one fragment group as the test instruction, and the basic vector is each of the M fragments contained in each Vector of mean values of feature directives.

In the above method, the target vector of any segment group can represent the distribution of the feature instructions in all the segments contained in the segment group, therefore, through the above method, each of the at least one segment group selected by the processing device The distribution of feature instructions in the segments included in the segment group is similar to or consistent with the distribution of feature vectors in the M segments. Therefore, selecting the N segments as test segments through the above method can not only improve the speed at which the processing device selects the test segments, but also ensure that the subsequent Test the accuracy of the performance metrics of the command.

In a possible design, the feature instruction is a basic block included in the M segments.

In a second aspect, the embodiment of the present application further provides a processing device, which has the function of implementing the processing device in the above method example. The functions described above may be implemented by hardware, or may be implemented by executing corresponding software on the hardware. The hardware or software includes one or more modules corresponding to the above functions.

In a possible design, the structure of the processing device includes a determination unit and a processing unit, and these units can perform corresponding functions in the above method examples. For details, refer to the detailed description in the method examples, and details are not repeated here.

In a possible design, the structure of the processing device includes a processor and a memory, and the processor is configured to support the processing device to perform corresponding functions in the above methods. The memory is coupled to the processor and holds program instructions and data necessary for the processor.

In the third aspect, the present application also provides a computer-readable storage medium, which is used to store computer software instructions for performing the functions of any one of the above-mentioned first aspect and the first aspect, which includes instructions for executing the above-mentioned first aspect. In one aspect, a program designed by any design method of the first aspect.

In the embodiment of the present application, the processing device divides the instruction to be tested into M fragments, and determines the number of each characteristic instruction contained in each fragment, thereby determining the average value of each characteristic instruction contained in each fragment; the processing device According to the number of each characteristic instruction contained in each of the M fragments and the average value of each characteristic instruction contained in each of the M fragments, N fragments are selected from the M fragments as a test Instructions, wherein the N segments include at least two consecutive segments. In the embodiment of the present application, since the processing device selects the N segments according to the average value of each feature instruction contained in each of the M segments, the N selected by the processing device The distribution of the characteristic instructions in the N fragments (i.e. the test instructions) is consistent with the distribution of the characteristic instructions in the instructions to be tested, thereby ensuring the accuracy of the performance index of the instruction to be tested determined by the performance indexes of the N fragments. and with respect to selecting N discrete test segments by traditional methods, since the N segments selected by the processor contain at least two continuous segments, like this, in the subsequent testing process, the emulator loads The number of programs is reduced. Therefore, the method provided by the embodiment of the present application can reduce the time for the emulator to test the N segments, and improve the test efficiency of the emulator. Obviously, the method provided by the embodiment of the present application can ensure the accuracy of the performance index of the instruction to be tested determined by the performance index of the N segments, and can reduce the time for the emulator to test the N segments and improve Simulator testing efficiency.

Description of drawings

Fig. 1 is a schematic diagram of a test system provided by the embodiment of the present application;

FIG. 2 is a flow chart of a method for selecting a test instruction provided in an embodiment of the present application;

FIG. 3 is a schematic diagram of a subspace provided by an embodiment of the present application;

FIG. 4 is a schematic diagram of a selection subspace provided by an embodiment of the present application;

FIG. 5 is a schematic diagram of a target direction with the largest correlation coefficient with the residual vector provided by the embodiment of the present application;

FIG. 6 is a schematic diagram of a target vector provided by an embodiment of the present application;

FIG. 7 is a structural diagram of a processing device provided in an embodiment of the present application;

FIG. 8 is a structural diagram of another processing device provided by an embodiment of the present application.

Detailed ways

In order to make the purpose, technical solution and advantages of the application clearer, the application will be further described in detail below in conjunction with the accompanying drawings.

The present application provides a method and a processing device for selecting test instructions, which are used to solve the problem in the prior art that it takes a long time for an emulator to test the test segments due to the discreteness of multiple screened test segments. Among them, the method and the device are based on the same inventive concept. Since the principles of the method and the device to solve problems are similar, the implementation of the device and the method can be referred to each other, and the repetition will not be repeated.

In the embodiment of the present application, the processing device divides the instruction to be tested into M fragments, and determines the number of each characteristic instruction contained in each fragment, thereby determining the average value of each characteristic instruction contained in each fragment; the processing device According to the number of each characteristic instruction contained in each of the M fragments and the average value of each characteristic instruction contained in each of the M fragments, N fragments are selected from the M fragments as a test Instructions, wherein the N segments include at least two consecutive segments. In the embodiment of the present application, since the processing device selects the N segments according to the average value of each feature instruction contained in each of the M segments, the N selected by the processing device The distribution of the characteristic instructions in the N fragments (i.e. the test instructions) is consistent with the distribution of the characteristic instructions in the instructions to be tested, thereby ensuring the accuracy of the performance index of the instruction to be tested determined by the performance indexes of the N fragments. and with respect to selecting N discrete test segments by traditional methods, since the N segments selected by the processor contain at least two continuous segments, like this, in the subsequent testing process, the emulator loads The number of programs is reduced. Therefore, the method provided by the embodiment of the present application can reduce the time for the emulator to test the N segments, and improve the test efficiency of the emulator. Obviously, the method provided by the embodiment of the present application can ensure the accuracy of the performance index of the instruction to be tested determined by the performance index of the N segments, and can reduce the time for the emulator to test the N segments and improve Simulator testing efficiency.

Hereinafter, some terms used in this application are explained to facilitate the understanding of those skilled in the art.

The instructions to be tested involved in the present application may also be called instruction streams, which are multiple instructions in the program running process, and the instructions are generally assembly instructions. Before the process of testing the program, it is necessary to acquire the to-be-tested instructions of the to-be-tested program; the emulator can run the to-be-tested instructions of the to-be-tested program, thereby obtaining various performance indicators of the to-be-tested program.

The characteristic instructions involved in this application are the instructions that have an impact on performance indicators among the instructions to be tested. Optionally, the characteristic instruction is a specific instruction in the instruction to be tested, such as a control instruction (such as a jump instruction, an interrupt instruction, etc.), or the characteristic instruction is composed of two adjacent control instructions and the The basic blocks and the like composed of all instructions are not limited in this application.

The performance index of the segment or the instruction to be tested involved in this application is the IPC of the device running the segment or the instruction to be tested, the cache hit rate of all levels (such as the second layer (L2) cache hit rate), or parameters such as energy consumption .

A plurality referred to in this application refers to two or more than two.

In addition, it should be understood that in the description of this application, words such as "first" and "second" are only used for the purpose of distinguishing descriptions, and cannot be understood as indicating or implying relative importance, nor can they be understood as indicating or imply order.

The solutions provided by the present application will be described in detail below in conjunction with the accompanying drawings.

FIG. 1 shows a test system to which the method for selecting a test instruction provided by an embodiment of the present application is applicable. Referring to FIG. 1 , the test system includes a processing device 101 and an emulator 102 .

In the process of the test system testing the instruction to be tested corresponding to the program to be tested, the processing device 101 is configured to split the instruction to be tested into M fragments, and determine each of the M fragments Include the number of each kind of characteristic instruction in, thereby determine the average value of each kind of characteristic instruction contained in each fragment in the said M fragments; And according to the number and the described Each of the M fragments contains the average value of each characteristic instruction, and N fragments are selected as test instructions among the M fragments; wherein, the N fragments contain at least two consecutive fragments M is greater than 1 is an integer, N is an integer greater than 1 and less than M;

The emulator 102 is configured to test the test instruction selected by the processing device, so as to obtain the performance index of the test instruction.

Optionally, the processing device 101 may also obtain the performance index of the instruction to be tested according to the performance index of the test instruction obtained by the simulator 102 .

Wherein, the processing device 101 may be a device such as a computer or an integrated circuit. The simulator 102 may be a simulator or a software simulator, which is not limited in this application.

In the test system provided in the embodiment of the present application, since the processing device 101 selects the N segments according to the average value of each feature instruction contained in each of the M segments, the The distribution of the characteristic instructions in the N segments (that is, the test instructions) selected by the processing device 101 is consistent with the distribution of the characteristic instructions in the instructions to be tested, thereby ensuring that the subsequent The accuracy of the performance index of the instruction to be tested; and compared to selecting N discrete test segments by traditional methods, since the N segments selected by the processor include at least two continuous segments, like this, in the subsequent During the test process, the number of times the emulator loads programs is reduced. Therefore, the method provided in the embodiment of the present application can reduce the time for the emulator to test the N segments and improve the test efficiency of the emulator. Obviously, the test system provided by the embodiment of the present application can ensure the accuracy of the performance index of the instruction to be tested determined by the performance index of the N fragments, and can reduce the time for the emulator to test the N fragments, improve Simulator testing efficiency.

The embodiment of the present application provides a method for selecting test instructions, which is applicable to the test system shown in FIG. 1 , and the processing device involved in the embodiment of the present application may be the processing device 101 in the test system. Referring to Fig. 2, the flow process of the method includes:

S201: The processing device splits the instruction to be tested into M fragments, where M is an integer greater than 1.

Optionally, the instruction to be tested may be stored in the form of multiple instruction stream files, that is, the instruction to be tested may be stored in multiple instruction stream files. Therefore, when the processing device executes S201, the instruction to be tested may be split in units of instruction stream files storing the instruction to be tested, that is, the instruction stored in each instruction stream file is regarded as a segment.

S202: The processing device determines the number of each characteristic instruction contained in each of the M segments.

Optionally, the characteristic instructions are various basic blocks contained in the M segments (or in the instructions to be tested), or various control instructions. In this embodiment of the present application, description is made by taking the feature instruction as a basic block as an example.

Optionally, the feature instruction may be preset by the tester, or determined by the processing device according to the instruction to be tested.

For example, the processing device determines various basic blocks according to the instruction to be tested by the following method:

The processing device determines all the basic blocks contained in the instruction to be tested, and classifies all the determined basic blocks by taking the same basic block as a class, so as to determine multiple kinds of basic blocks.

S203: The processing device determines that each of the M segments contains an average value of each characteristic instruction.

Example 1, the instruction to be tested is divided into 3 segments, and the instruction to be tested contains 5 types of characteristic instructions, and the processing device determines that each segment contains the number of the first to fifth type of characteristic instructions: Segment 1: {0,2,0,4,5}, segment 2: {1,3,5,4,0}, segment 3: {2,1,0,4,2}, then each of the 3 segments Fragments contain an average of {1, 2, 5/3, 4, 7/3} for each feature instruction.

Since the characteristic instruction has an impact on the performance index of the instruction to be tested, the distribution of each characteristic instruction in the M segments (that is, the instruction to be tested) can be used as a benchmark, thereby ensuring that the selected The distribution of each characteristic instruction among the M fragments is the most similar or consistent with the N fragments used as test instructions, thereby ensuring the accuracy of the performance index of the instruction to be tested determined by the performance index of the N fragments. . In this embodiment of the present application, the distribution of each characteristic instruction in the M segments may be represented by an average value of each characteristic instruction contained in each of the M segments.

S204: The processing device selects among the M segments according to the number of each type of characteristic instruction contained in each of the M segments and the average value of each type of characteristic instruction contained in each of the M segments. N fragments are used as test instructions, and the N fragments include at least two consecutive fragments, wherein N is an integer greater than 1 and less than M.

The processing device may select the N segments from the M segments through various methods, and ensure that the distribution of feature instructions in the N segments is consistent with the distribution of feature instructions in the M segments. Wherein, the distribution of the feature instructions in the M segments may be represented by a basic vector. The basic vector is composed of each of the M fragments containing the average value of each characteristic instruction, for example, each of the M fragments contains the average value of each characteristic instruction in Example 1 { 1,2,5/3,4,7/3}, then the basic vector is [1,2,5/3,4,7/3] or [1,2,5/3,4,7/ 3] ^T.

Optionally, the processing device may select the N segments from the M segments as the test instruction through the following method one, including:

The processing device selects, among the M segments, the N segments whose running time is less than a preset first time threshold and which meet the first condition as the test instruction;

The first condition includes: the N segments include at least two consecutive segments, and a difference between a weighted sum of feature vectors of all segments in the N segments and a basic vector is smaller than a preset first threshold.

Wherein, the feature vector of each segment is a vector composed of the number of each feature instruction contained in each segment. Taking segment 1 in Example 1 as an example, the number of each feature instruction contained in segment 1 is { 0,2,0,4,5}, then the feature vector of segment 1 is [0,2,0,4,5], or [0,2,0,4,5] ^T .

The first threshold is set according to a specific test scenario. When the value of the first threshold is smaller, the distribution of feature instructions in the N segments selected by the processing device in the above method is different from the M The distribution of feature instructions in each segment is more similar.

Optionally, the running time of each segment in the M segments may be predicted by the processing device. Optionally, the processing device may consider at least one item, such as the number of instructions in each segment, the characteristics of the instructions, and the performance of the emulator, to predict the running time of each segment, which is not made in this embodiment of the present application. limited.

In the above method, the distribution of feature instructions in the N segments may be represented by a weighted sum of feature vectors of all segments in the N segments. Since the difference between the weighted sum of the feature vectors of all the segments in the N segments and the basic vector is smaller than the first threshold, that is, the weighted sum of the feature vectors of all the segments in the N segments and the The basis vectors are fitted, so that the distribution of feature vectors in the N segments is similar or consistent with the distribution of feature vectors in the M segments. Therefore, selecting the N fragments as test fragments by the above method can ensure the accuracy of the performance index of the instruction to be tested which is subsequently determined through the performance indexes of the N fragments.

In the above method, as compared to selecting N discrete test segments by the traditional method, since the N segments selected by the processor contain at least two continuous segments, in this way, in the subsequent test process, the continuous The fragments of can be loaded into the emulator at one time. Due to the working characteristics of the emulator, the loading time used by the emulator to load one fragment at a time is similar to the loading time used to load multiple fragments at a time, but each load takes longer , so the method can reduce the number of times the emulator loads the program, thereby reducing the time for the emulator to test the N segments and improving the test efficiency of the emulator.

In addition, in this method, the sum of the running times of the N fragments selected by the processing device is less than the first time threshold, which can ensure that the simulator tests the N fragments within the Within the threshold range of the first time, avoid the phenomenon that the test time is too long.

In the first method above, the processing device selects the N fragments whose running time is less than the first time threshold and satisfies the first condition among the M fragments as the test instructions, that is, the The processing device selects said N segments comprising a weighted sum of the feature vectors of all segments fitted to said basis vector. Optionally, the processing device may select the N segments from the M segments by using a subspace regression algorithm.

Optionally, the present application provides a method for selecting the N segments using a subspace regression algorithm, which specifically includes the following steps:

Step a: the processing device initializes the residual vector as the basic vector, and initializes the subspaces to be selected as all X-subspaces, wherein the X-subspaces are any consecutive X of the M segments A space composed of feature vectors of segments, where X is an integer greater than 1 and less than M;

Step b: the processing device selects the subspace with the smallest angle with the residual vector among the subspaces to be selected, determines the projection vector of the residual vector in the selected subspace, and calculates the The difference between the residual vector and the projection vector is used as a new residual vector, and all subspaces after the subspace to be selected are removed from the selected subspace are used as new subspaces to be selected;

Step c: If the size of the residual vector is smaller than the first threshold or the sum of the running times of the segments corresponding to the feature vectors contained in all the selected subspaces is greater than the preset second time threshold, the processing device will select all The N segments corresponding to the feature vectors contained in the subspace are used as the test instructions; if the size of the residual vector is not less than the first threshold and the sum of the running times of the segments corresponding to the feature vectors contained in all selected subspaces is not greater than For the second time threshold, the processing device returns to perform step b; wherein, the second time threshold is smaller than the first time threshold.

Optionally, the second time threshold is greater than the difference between the first time threshold and a maximum running time, and the maximum running time is the maximum value among the running times of the M segments, or

The second time threshold is greater than the difference between the first time threshold and X times the minimum running time, the minimum running time being the minimum of the running times of the M segments, or

The second time threshold is greater than the difference between the first time threshold and the minimum run time.

The second time threshold is set by the above method, and when the sum of the running times of the segments corresponding to the feature vectors contained in all selected subspaces of the processing device is greater than the second time threshold, the processing can be guaranteed The device cannot select a subspace again, and the process of selecting a subspace can be stopped. Because reselecting the subspace will result in the sum of the running times of the segments corresponding to the eigenvectors contained in all the selected subspaces being greater than the first time threshold, and the sum of the running times of the N segments that do not satisfy the requirement is less than the The condition for the first time threshold.

According to the vector theory in the field of mathematics, it can be known that the projection vector on any subspace selected by the processing device is the weighted sum of the X feature vectors contained in the subspace, and in the above method, all the vectors selected by the processing device The sum of the projection vectors on the subspaces, and the magnitude of the difference between the basic vectors is less than the first threshold, that is, the X feature vectors (the feature vectors of the N segments) contained in all the subspaces selected by the processing device The difference between the weighted sum of ) and the basic vector is smaller than the first threshold.

Through the above method, the N segments selected by the processing device include at least one continuous X segment, so that in the subsequent test process, the number of times the emulator loads the program can be further reduced, and the emulator test is greatly reduced. The time of the N segments improves the test efficiency of the simulator.

Wherein, in the above method, X is the number of continuous segments, and X can be specifically set according to the requirements of specific test scenarios, which can improve the degree of freedom for the processing device to select continuous segments.

Optionally, before step a, the processing device may determine all X-subspaces through the following methods, including:

The processing device divides each consecutive X segments into one group among the M segments, and generates multiple groups of segments;

The processing device composes feature vectors of X segments contained in each group of segments into an X-subspace.

Since in the field of mathematics, a vector can be a directional line, and multiple vectors can determine a plane, therefore, in the embodiment of the present application, the X-subspace corresponding to a group of segments uses the plane determined by X eigenvectors express. As shown in Figure 3, a group of fragments contains two fragments, one of which has a eigenvector a1 and the other a2, so that these two vectors can determine a plane C ₁ , which is subspace.

Optionally, based on the same principle as the above method, the processing device may also select the N segments through the following steps:

Step 1: The processing device initializes the residual vector as the basic vector, and initializes the subspaces to be selected as all X-subspaces, wherein the X-subspaces are any consecutive X of the M segments A space composed of feature vectors of segments, where X is an integer greater than 1 and less than M;

Step 2: The processing device selects the subspace with the smallest angle with the residual vector among the subspaces to be selected, determines the projection vector of the residual vector in the selected subspace, and converts the The difference between the residual vector and the projection vector is used as a new residual vector, and all subspaces after the subspace to be selected are removed from the selected subspace are used as new subspaces to be selected;

Step 3: If the size of the residual vector is less than the first threshold, and the sum of the running times of the segments corresponding to the feature vectors contained in all selected subspaces is less than the first time threshold, the processing device returns to step 2 ; If the size of the residual vector is not less than the first threshold or the sum of the running times of the segments corresponding to the feature vectors contained in all selected subspaces is not less than the first time threshold, the processing device discards the selected In the subspace, the N segments corresponding to the feature vectors contained in all the subspaces selected before this time are used as the test instructions.

Example 2, the processing device initializes the residual vector R as the basic vector B, and initializes the subspaces to be selected as all 2-subspaces. Since the subspace can be understood as a plane, the vector can be understood as a straight line. When the processing device selects a subspace, as shown in Figure 4, the processing device first needs to determine the subspace that best fits R (that is, the subspace with the smallest angle with R), assuming that the subspace is C ₁ . At this time, the processing device may determine that the two segments corresponding to the two feature vectors contained in _C1 can be used as test segments, and continue to update the residual vector and the subspace to be selected, and continue to select a subspace, Until the size of the last updated residual vector is less than the first threshold, or the sum of the running times of the selected test segments is greater than the second time threshold. Wherein, after selecting C ₁ , the processing device updates the residual vector to RU, and updates the candidate subspaces to all subspaces except C ₁ in the candidate subspaces.

Optionally, the embodiment of the present application also provides another method for selecting the N segments using a subspace regression algorithm, which specifically includes the following steps:

Step a1: The processing device initializes the residual vector as the basic vector, and initializes the subspaces to be selected as all X-subspaces, wherein the X-subspaces are any consecutive X of the M segments A space composed of feature vectors of segments, where X is an integer greater than 1 and less than M;

Step b1: the processing device selects a first subspace having the smallest angle with the residual vector among the subspaces to be selected;

Step c1: the processing device determines a second subspace with the second smallest angle with the residual vector among the subspaces to be selected;

Step d1: The processing device takes all subspaces except the selected first subspace in the candidate subspaces as new candidate subspaces, and updates the residual vector in the following manner:

The correlation coefficient of all vectors in the first subspace and the residual vector by the processing device, and find the target direction with the largest correlation coefficient, as shown in Figure 5; according to the determined direction, the processing device determines Target vector Y, one endpoint of the target vector Y is at the bisector angle position U of the first subspace and the second subspace, and the other endpoint is the intersection of the residual vector and the first subspace point, as shown in Figure 6; the processing device uses the difference between the residual vector and Y as a new residual vector;

Step e1: If the size of the residual vector is smaller than the first threshold or the sum of the running times of the segments corresponding to the feature vectors contained in all the selected subspaces is greater than the preset second time threshold, the processing device will select all The N segments corresponding to the feature vectors contained in the subspace are used as the test instructions; if the size of the residual vector is not less than the first threshold and the sum of the running times of the segments corresponding to the feature vectors contained in all selected subspaces is not greater than For the second time threshold, the processing device returns to execute step b1; wherein, the setting of the second time threshold is the same as method 1, and will not be repeated here.

Through the above method, the processing device can also accurately select N segments that meet the above two conditions from the M segments.

According to the vector theory in the field of mathematics, it can be known that any vector on any subspace selected by the processing device is the weighted sum of the X feature vectors contained in the subspace, and in the above method, the selected by the processing device The difference between the sum of the target vectors on all subspaces and the basic vector is smaller than the first threshold, that is, the X feature vectors (features of N segments) contained in all subspaces selected by the processing device The difference between the weighted sum of the vector) and the basic vector is smaller than the first threshold.

Optionally, the processing device may select the N segments from the M segments as the test instruction through the following method two, including:

The processing device determines S segment groups among the M segments, wherein S is an integer greater than 1 and less than M, and each segment group in the S segment groups contains at least two consecutive segments, so One of the M segments is included in one of the S segment groups;

The processing device selects at least one segment group whose difference between the target vector and the basic vector is smaller than a preset second threshold value among the S segment groups, and selects the N segment groups contained in the at least one segment group Segment as the test instruction; wherein, the target vector of any segment group in the S segment groups is a vector composed of the average value of each feature instruction contained in each segment in the segment group, and the basic vector is A vector composed of average values of each feature instruction included in each of the M segments.

Wherein, the second threshold is set according to a specific test scenario. When the value of the second threshold is smaller, the distribution of the feature instructions in the N segments selected by the processing device in the above method is different from the The distribution of the feature instructions in the M segments is more similar.

In the above method, the target vector of any segment group can represent the distribution of the feature instructions in all the segments contained in the segment group, therefore, through the above method, each of the at least one segment group selected by the processing device The distribution of feature instructions in the segments included in the segment group is similar to or consistent with the distribution of feature vectors in the M segments. Therefore, selecting the N segments as test segments through the above method can not only improve the speed at which the processing device selects the test segments, but also ensure that the subsequent Test the accuracy of the performance metrics of the command.

The following uses a specific example to compare the simulation time of the test instructions selected by using the traditional method and the method provided by the embodiment of the present application.

Example 3, assuming that the loading time required for the emulator to load a test instruction (load a discrete fragment, or load several continuous fragments simultaneously) is 25 minutes, and the running time required to run a fragment to be tested is 1 minute.

In the scenario where the processing device adopts the K-Means clustering method, and the test instruction selected in multiple fragments contains 24 discrete test fragments, the total time required for the emulator to test the 24 discrete test fragments S=25*24+1*24=624 minutes;

In the scenario where the processing device adopts the method provided in the embodiment of the present application, and the test instruction selected among the plurality of fragments includes 6 groups of fragments, and the 6 groups of fragment groups contain 24 fragments, the emulator tests the The total time S=25*6+1*24=174 minutes required for 6 sets of segments.

It can be seen from the above comparison that, in the case that the processing device selects the same number of test segments through the two methods, using the method provided by the embodiment of the present application to select the test instruction can significantly reduce the cost of the emulator to test the test instruction. total time.

In the embodiment of the present application, since the processing device selects the N segments according to the average value of each feature instruction contained in each of the M segments, the N selected by the processing device The distribution of the characteristic instructions in the segments (i.e. the test instructions) is consistent with the distribution of the characteristic instructions in the instructions to be tested, thereby ensuring the accuracy of the performance indicators of the instructions to be tested determined by the performance indicators of the N segments. degree; and with respect to selecting N discrete test segments by traditional methods, since the N segments selected by the processor contain at least two continuous segments, like this, in the subsequent testing process, the emulator loads The number of programs is reduced. Therefore, the method provided by the embodiment of the present application can reduce the time for the emulator to test the N segments, and improve the test efficiency of the emulator. Obviously, the method provided by the embodiment of the present application can ensure the accuracy of the performance index of the instruction to be tested determined by the performance index of the N segments, and can reduce the time for the emulator to test the N segments and improve Simulator testing efficiency.

After the processing device adopts the method in the above embodiment and selects the N segments from the M segments as test instructions, the emulator can perform Q tests on the selected N segments, each time The test requires the emulator to load a discrete fragment or a group of fragments (comprising at least two continuous fragments) into the memory and run it, so as to obtain the performance index of the N fragments (each discrete fragment in the N fragments and the performance index of each group of fragments); wherein, Q is an integer greater than 1 and less than N.

Optionally, the processing device may also obtain the performance index of the instruction to be tested according to the performance index of each discrete segment and each group of segments in the N segments, but not limited to the following methods:

The processing device may obtain the weight of each discrete segment in the N segments and the performance index of each group of segments, and then multiply the performance index of each discrete segment in the N segments by the corresponding weight, And multiplying the performance index of each group of fragments in the N fragments by the corresponding weight, and adding the obtained calculation results as the performance index of the instruction to be tested; or

The processing device determines the quotient of M and N, and determines the sum of the performance indicators of all discrete segments and all group segments in the N segments, and uses the product of the sum and the quotient as the to-be-tested The performance metrics of the directive.

Wherein, the weight of each discrete segment in the N segments and the performance index of each group of segments may be set by the tester or determined by the processing device, which is not limited in the present application.

Through the above method, the processing device can accurately obtain the performance index of the instruction to be tested according to the selected performance indexes of the N fragments.

Based on the same inventive concept as the method embodiment, the present application also provides a processing device, which is used to implement the method for selecting a test instruction shown in FIG. 2 . As shown in FIG. 7 , the processing device 700 includes: The determining unit 701 and the processing unit 702, wherein,

A determining unit 701, configured to divide the instruction to be tested into M segments, where M is an integer greater than 1; and

determining the number of each feature instruction included in each of the M segments; and

Determine the average value of each feature instruction contained in each of the M segments;

The processing unit 702 is configured to, according to the number of each type of characteristic instructions contained in each of the M segments and the average value of each type of characteristic instructions contained in each of the M segments, in the M segments N fragments are selected as test instructions, and the N fragments include at least two consecutive fragments, where N is an integer greater than 1 and less than M.

Optionally, the processing unit 702 is specifically configured to:

Selecting the N segments whose sum of running time is less than a preset first time threshold and satisfying the first condition from among the M segments is used as the test instruction;

The first condition includes: the N segments include at least two consecutive segments, and the difference between the weighted sum of the feature vectors of all segments in the N segments and the basic vector is less than a preset first threshold, wherein, The feature vector of each segment is a vector composed of the number of each type of feature instruction contained in each segment, and the basic vector is a vector composed of the average value of each type of feature instruction contained in each segment of the M segments .

Optionally, when the processing unit 702 selects the N segments whose running time is less than the first time threshold and satisfies the first condition among the M segments as the test instruction, specifically use To execute the steps:

Step a: Initialize the residual vector as the basic vector, and initialize the subspaces to be selected as all X-subspaces, where the X-subspaces are the feature vectors of any consecutive X segments among the M segments The space formed, where X is an integer greater than 1 and less than M;

Step b: In the subspace to be selected, select the subspace with the smallest angle with the residual vector, determine the projection vector of the residual vector in the selected subspace, and combine the residual vector with the The difference of the projection vector is used as a new residual vector, and all subspaces after the subspace to be selected are removed from the selected subspace are used as new subspaces to be selected;

Step c: If the size of the residual vector is smaller than the first threshold or the sum of the running times of the segments corresponding to the feature vectors contained in all selected subspaces is greater than the preset second time threshold, the selected subspaces contained in The N segments corresponding to the feature vectors are used as the test instructions; if the size of the residual vector is not less than the first threshold and the sum of the running times of the segments corresponding to the feature vectors contained in all selected subspaces is not greater than the second Time threshold, return to step b; wherein, the second time threshold is smaller than the first time threshold.

Optionally, the processing unit 702 is specifically configured to:

Among the M fragments, S fragment groups are determined, wherein S is an integer greater than 1 and less than M, and each fragment group in the S fragment groups contains at least two consecutive fragments, and the M fragments One of the fragments is included in one of the S fragment groups;

Among the S segment groups, select at least one segment group whose difference between the target vector and the basic vector is less than a preset second threshold, and use the N segments contained in the at least one segment group as the A test instruction; wherein, the target vector of any segment group in the S segment groups is a vector composed of the average value of each feature instruction contained in each segment in the segment group, and the basic vector is the M Vector of average values of each feature instruction contained in each fragment in the fragment.

Optionally, the feature instruction is a basic block contained in the M segments.

In the embodiment of the present application, since the processing device selects the N segments according to the average value of each feature instruction contained in each of the M segments, the N selected by the processing device The distribution of the characteristic instructions in the N fragments (i.e. the test instructions) is consistent with the distribution of the characteristic instructions in the instructions to be tested, thereby ensuring the accuracy of the performance index of the instruction to be tested determined by the performance indexes of the N fragments. and with respect to selecting N discrete test segments by traditional methods, since the N segments selected by the processor contain at least two continuous segments, like this, in the subsequent testing process, the emulator loads The number of programs is reduced. Therefore, the processing device provided in the embodiment of the present application can reduce the time for the emulator to test the N segments, and improve the test efficiency of the emulator. Apparently, the processing device provided in the embodiment of the present application can ensure the accuracy of the performance index of the instruction to be tested determined by the performance index of the N segments, and can reduce the time required for the emulator to test the N segments. Time, improve the test efficiency of the emulator.

The division of modules in the embodiments of the present application is schematic, and is only a logical function division. There may be other division methods in actual implementation. In addition, each functional module in each embodiment of the present application can be integrated into a processing In the controller, it can also be physically present separately, or two or more modules can be integrated into one module. The above-mentioned integrated modules can be implemented in the form of hardware or in the form of software function modules.

Wherein, when the integrated modules are implemented in the form of hardware, as shown in FIG. 8 , the processing device 800 may include a processor 801 and a memory 802 . Physical hardware corresponding to the foregoing modules may be the processor 801 . The processor 801 may be a central processing unit (Central Processing Unit, CPU), or a digital processing module or the like. The memory 802 is configured to store programs executed by the processor 801 . The memory 802 may be a non-volatile memory, such as a hard disk (Hard Disk Drive, HDD) or a solid-state disk (Solid-State Drive, SSD), etc., or a volatile memory (volatile memory), such as a random access memory (Random-Access Memory, RAM). The memory 802 may also be any other medium that can be used to carry or store program codes in the form of instructions or data structures and can be accessed by a computer, but is not limited thereto.

The processor 801 is configured to execute the program codes stored in the memory 802, and is specifically configured to execute the method described in the embodiment shown in FIG. 2 . Reference may be made to the method described in the embodiment shown in FIG. 2 , which will not be repeated here in this application.

Optionally, the processing device 800 provided in the embodiment of the present application may further include a communication interface 803, where the communication interface 803 is used to communicate with other devices (such as an emulator).

A specific connection medium among the communication interface 803, the processor 801, and the memory 802 is not limited in this embodiment of the present application. In the embodiment of the present application, in FIG. 8, the processor 801, the memory 802, and the communication interface 803 are connected through a bus 804. The bus 804 is represented by a thick line in FIG. It is for illustrative purposes only, and is not intended to be limiting. The bus 804 can be divided into address bus, data bus, control bus and so on. For ease of representation, only one thick line is used in FIG. 8 , but it does not mean that there is only one bus or one type of bus.

An embodiment of the present invention also provides a computer-readable storage medium for storing computer software instructions to be executed for executing the above-mentioned processor, which includes a program for executing the above-mentioned processor.

Those skilled in the art should understand that the embodiments of the present application may be provided as methods, systems, or computer program products. Accordingly, the present application may take the form of an entirely hardware embodiment, an entirely software embodiment, or an embodiment combining software and hardware aspects. Furthermore, the present application may take the form of a computer program product embodied on one or more computer-usable storage media (including but not limited to disk storage, CD-ROM, optical storage, etc.) having computer-usable program code embodied therein.

The present application is described with reference to flowchart illustrations and/or block diagrams of methods, apparatus (systems), and computer program products according to the present application. It should be understood that each procedure and/or block in the flowchart and/or block diagram, and a combination of procedures and/or blocks in the flowchart and/or block diagram can be realized by computer program instructions. These computer program instructions may be provided to a general purpose computer, special purpose computer, embedded processor, or processor of other programmable data processing equipment to produce a machine such that the instructions executed by the processor of the computer or other programmable data processing equipment produce a An apparatus for realizing the functions specified in one or more procedures of the flowchart and/or one or more blocks of the block diagram.

These computer program instructions may also be stored in a computer-readable memory capable of directing a computer or other programmable data processing apparatus to operate in a specific manner, such that the instructions stored in the computer-readable memory produce an article of manufacture comprising instruction means, the instructions The device realizes the function specified in one or more procedures of the flowchart and/or one or more blocks of the block diagram.

These computer program instructions can also be loaded onto a computer or other programmable data processing device, causing a series of operational steps to be performed on the computer or other programmable device to produce a computer-implemented process, thereby The instructions provide steps for implementing the functions specified in the flow chart or blocks of the flowchart and/or the block or blocks of the block diagrams.

Obviously, those skilled in the art can make various changes and modifications to the application without departing from the spirit and scope of the application. In this way, if these modifications and variations of the present application fall within the scope of the claims of the present application and their equivalent technologies, the present application is also intended to include these modifications and variations.

Claims (11)

1. a kind of method of selection test instruction, which is characterized in that the method includes：

Instruction to be tested is divided into M segment by processing equipment, wherein M is the integer more than 1；

The processing equipment determines the number for each feature instruction that each segment includes in the M segment；

The processing equipment determines the average value for each feature instruction that each segment includes in the M segment；

Number and the M piece of the processing equipment according to each feature instruction that each segment includes in the M segment The average value for each feature instruction that each segment includes in section, selects N number of segment to refer to as test in the M segment It enables, N number of segment includes at least two continuous segments, wherein N is the integer more than 1 and less than M.

2. according to the method described in claim 1, it is characterized in that, the processing equipment is according to each piece in the M segment The average value for each feature instruction that each segment includes in the number and the M segment of each feature instruction that section includes, N number of segment is selected to be instructed as the test in the M segment, including：

The processing equipment selects the sum of run time to be less than preset first time threshold in the M segment, and meets N number of segment of first condition is instructed as the test；

The first condition includes：N number of segment includes at least two continuous fragments, and all segments in N number of segment Feature vector weighted sum and basis vector between difference be less than preset first threshold value, wherein the feature vector of each segment The vector of the number composition for each feature instruction for including for each segment, the basis vector are in the M segment The vector of the average value composition for each feature instruction that each segment includes.

3. method according to claim 2, which is characterized in that when the processing equipment selects operation in the M segment Between be less than the first time threshold, and the N number of segment for meeting the first condition is instructed as the test, including：

Step a：The processing equipment initialization residual vector is the basis vector, and it is all X- to initialize subspace to be selected Subspace, wherein the subspaces X- are the space of the feature vector composition of X segment of arbitrary continuation in the M segment, Wherein X is the integer for being less than M more than 1；

Step b：In subspace to be selected, the subspace of selection and the residual vector angle minimum determines the processing equipment Projection vector of the residual vector in the subspace selected, and the difference of the residual vector and the projection vector is made For new residual vector, all subspaces after subspace to be selected is removed the subspace selected are as new subspace to be selected；

Step c：If the size of residual vector is less than the feature vector that all subspaces of the first threshold or selection include The sum of run time of corresponding segment is more than preset second time threshold, and the processing equipment is by all subspaces of selection Including the corresponding N number of segment of feature vector instructed as the test；If the size of residual vector is not less than described first When the sum of run time of the corresponding segment of feature vector that all subspaces of threshold value and selection include is not more than described second Between threshold value, the processing equipment returns to step b；Wherein, the second time threshold is less than the first time threshold.

4. according to the method described in claim 1, it is characterized in that, the processing equipment is according to each piece in the M segment The average value for each feature instruction that each segment includes in the number and the M segment of each feature instruction that section includes, N number of segment is selected to be instructed as the test in the M segment, including：

The processing equipment determines S segment group in the M segment, wherein S is the integer more than 1 and less than M, described Each segment group includes at least two continuous segments in S segment group, and a segment is contained in the S in the M segment In a segment group in a segment group；

The processing equipment is in the S segment group, and difference is less than default second between selection target vector and basis vector At least one segment group of threshold value, and refer to the N number of segment for including at least one segment group as the test It enables；Wherein, the object vector of any of described S segment group segment group be in the segment group each segment include each The vector of the average value composition of feature instruction, the basis vector are each feature that each segment includes in the M segment The vector of the average value composition of instruction.

5. according to claim 1-4 any one of them methods, which is characterized in that the feature instruction is in the M segment Including basic block.

6. a kind of processing equipment, which is characterized in that including：

Determination unit, for instruction to be tested to be divided into M segment, wherein M is the integer more than 1；And

Determine the number for each feature instruction that each segment includes in the M segment；And

Determine the average value for each feature instruction that each segment includes in the M segment；

Processing unit, the number for being instructed according to each feature that each segment includes in the M segment and the M piece The average value for each feature instruction that each segment includes in section, selects N number of segment to refer to as test in the M segment It enables, N number of segment includes at least two continuous segments, and wherein N is the integer more than 1 and less than M.

7. processing equipment according to claim 6, which is characterized in that the processing unit is specifically used for：

It selects the sum of run time to be less than preset first time threshold in the M segment, and meets the institute of first condition N number of segment is stated to instruct as the test；

The first condition includes：N number of segment includes at least two continuous fragments, and all segments in N number of segment Feature vector weighted sum and basis vector between difference be less than preset first threshold value, wherein the feature vector of each segment The vector of the number composition for each feature instruction for including for each segment, the basis vector are in the M segment The vector of the average value composition for each feature instruction that each segment includes.

8. processing equipment according to claim 7, which is characterized in that the processing unit selects fortune in the M segment The row time is less than the first time threshold, and when the N number of segment for meeting the first condition is instructed as the test, Specifically for executing step：

Step a：Initialization residual vector is the basis vector, and it is all subspaces X- to initialize subspace to be selected, wherein The subspaces X- are the space of the feature vector composition of X segment of arbitrary continuation in the M segment, and wherein X is more than 1 Integer less than M；

Step b：In subspace to be selected, the subspace of selection and the residual vector angle minimum determines the residual vector Projection vector in the subspace selected, and using the difference of the residual vector and the projection vector as new residual error to Amount, all subspaces after subspace to be selected is removed the subspace selected are as new subspace to be selected；

Step c：If the size of residual vector is less than the feature vector that all subspaces of the first threshold or selection include The sum of run time of corresponding segment be more than preset second time threshold, the feature for including by all subspaces of selection to Corresponding N number of segment is measured to instruct as the test；If the size of residual vector not less than the first threshold and selection The sum of run time for the corresponding segment of feature vector that all subspaces include is not more than the second time threshold, and return is held Row step b；Wherein, the second time threshold is less than the first time threshold.

9. processing equipment according to claim 6, which is characterized in that the processing unit is specifically used for：

In the M segment, S segment group is determined, wherein S is the integer more than 1 and less than M, in the S segment group Each segment group includes at least two continuous segments, and a segment is contained in one in S segment group in the M segment In segment group；

In the S segment group, difference is less than at least the one of default second threshold between selection target vector and basis vector A segment group, and the N number of segment for including at least one segment group is instructed as the test；Wherein, the S The object vector of any of a segment group segment group is the flat of each feature instruction that each segment includes in the segment group The vector of mean value composition, the basis vector are the average value for each feature instruction that each segment includes in the M segment The vector of composition.

10. according to claim 6-9 any one of them processing equipments, which is characterized in that the feature instruction is the M piece The basic block for including in section.

11. a kind of processing equipment, which is characterized in that the processing equipment includes：Processor, bus and memory, feature It is,

The memory is connected with the memory by the bus；

The processor calls the instruction being stored in the memory, perform claim to require 1-5 any one of them methods.