CN108538800A - Package structure - Google Patents
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- CN108538800A CN108538800A CN201710223076.4A CN201710223076A CN108538800A CN 108538800 A CN108538800 A CN 108538800A CN 201710223076 A CN201710223076 A CN 201710223076A CN 108538800 A CN108538800 A CN 108538800A
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Abstract
本发明提供一种封装结构,其包括封装基板、电子元件、多个导电胶及封装胶体。封装基板包括载板、多个接垫及绝缘层。接垫与绝缘层配置于载板上,绝缘层具有多个开口以暴露出接垫,且各接垫包括连接部及突起部。电子元件设置于封装基板上。各接垫的突起部由连接部往电子元件的方向延伸。导电胶设置于绝缘层的开口内。电子元件藉导电胶与突起部电性连接。封装胶体包覆电子元件、导电胶与封装基板。封装胶体填入电子元件与封装基板之间。电子元件与封装基板之间具有间隙,介于30微米至110微米之间。封装胶体填入间隙。
The invention provides a packaging structure, which includes a packaging substrate, electronic components, a plurality of conductive glues and packaging colloids. The packaging substrate includes a carrier board, multiple pads and an insulating layer. The pads and the insulating layer are arranged on the carrier board. The insulating layer has a plurality of openings to expose the pads, and each pad includes a connecting portion and a protruding portion. The electronic components are arranged on the packaging substrate. The protruding portion of each pad extends from the connecting portion toward the direction of the electronic component. The conductive glue is arranged in the opening of the insulating layer. The electronic components are electrically connected to the protrusions through conductive glue. Packaging colloid covers electronic components, conductive adhesive and packaging substrates. The encapsulating colloid is filled between the electronic components and the packaging substrate. There is a gap between the electronic component and the packaging substrate, ranging from 30 microns to 110 microns. The encapsulating colloid fills the gap.
Description
技术领域technical field
本发明涉及一种半导体元件,尤其涉及一种封装结构。The invention relates to a semiconductor element, in particular to a packaging structure.
背景技术Background technique
系统级封装(System-in-Package,SiP)是指将一个系统或子系统的全部或大部分电子元件接合于线路载板上。此外,在将电子元件组装于线路载板之后,还须清洗残留于线路载板上的助焊剂(flux),以避免影响封装结构的可靠度。然而,由于电子元件与线路载板之间的间隙甚小,在进行回焊(reflow)时,焊料可能会流入电子元件与线路载板之间的间隙并相互连接,造成接垫之间发生短路,而导致桥接(solder bridge)问题。另外,在进行回焊制程之后,也无法有效地清除残留于所述间隙中的助焊剂,导致进行信赖度测试时,容易产生分离(delamination)的情形,影响产品的良率。System-in-Package (SiP) refers to the bonding of all or most of the electronic components of a system or subsystem on a circuit carrier. In addition, after the electronic components are assembled on the circuit carrier, the flux remaining on the circuit carrier must be cleaned to avoid affecting the reliability of the packaging structure. However, since the gap between the electronic component and the circuit carrier is very small, during reflow, the solder may flow into the gap between the electronic component and the circuit carrier and connect with each other, causing a short circuit between the pads , resulting in bridge (solder bridge) problems. In addition, after the reflow process, the solder flux remaining in the gap cannot be effectively removed, resulting in easy delamination during the reliability test, which affects the yield of the product.
发明内容Contents of the invention
本发明的实施例提供一种封装结构,其可增加封装基板与电子元件之间的间隙,以利于后续制程并增加产品良率。Embodiments of the present invention provide a packaging structure, which can increase the gap between the packaging substrate and the electronic components, so as to facilitate subsequent manufacturing processes and increase product yield.
本发明的实施例提供的一种封装结构,其包括封装基板、电子元件、多个导电胶以及封装胶体。封装基板包括载板、多个接垫以及绝缘层。接垫与绝缘层配置于载板上,绝缘层具有多个开口以暴露出接垫,且各个接垫包括连接部以及突起部。电子元件设置于封装基板上。各个接垫的突起部由连接部往电子元件的方向延伸。导电胶设置于绝缘层的开口内。电子元件通过导电胶与突起部电性连接。封装胶体包覆电子元件、导电胶与封装基板。封装胶体填入电子元件与封装基板之间。An embodiment of the present invention provides a packaging structure, which includes a packaging substrate, electronic components, a plurality of conductive glues, and packaging glue. The packaging substrate includes a carrier board, a plurality of pads and an insulating layer. The pads and the insulating layer are disposed on the carrier board, the insulating layer has a plurality of openings to expose the pads, and each pad includes a connecting portion and a protruding portion. The electronic components are arranged on the packaging substrate. The protruding portion of each pad extends from the connecting portion to the direction of the electronic component. The conductive adhesive is disposed in the opening of the insulating layer. The electronic component is electrically connected to the protruding part through the conductive glue. The packaging colloid covers the electronic components, conductive adhesive and packaging substrate. The encapsulant is filled between the electronic component and the encapsulation substrate.
本发明的实施例提供的一种封装结构,其包括封装基板、电子元件以及封装胶体。封装基板包括载板以及多个接垫。接垫配置于载板上。各个接垫包括连接部以及突起部。电子元件设置于封装基板上。各个接垫的突起部由连接部往电子元件的方向延伸。电子元件通过接垫的突起部与封装基板电性连接。封装胶体包覆电子元件与封装基板。电子元件与封装基板之间具有间隙,介于30微米至110微米之间。封装胶体填入间隙。An embodiment of the present invention provides a packaging structure, which includes a packaging substrate, electronic components, and packaging glue. The packaging substrate includes a carrier board and a plurality of pads. The pads are configured on the carrier board. Each pad includes a connecting portion and a protruding portion. The electronic components are arranged on the packaging substrate. The protruding portion of each pad extends from the connecting portion to the direction of the electronic component. The electronic component is electrically connected to the package substrate through the protruding portion of the pad. The encapsulant encapsulates the electronic components and the encapsulation substrate. There is a gap between the electronic component and the packaging substrate, which is between 30 microns and 110 microns. Encapsulation gel fills the gap.
基于上述,在本发明的实施例的封装结构中,接垫的突起部能够支撑电子元件,以增加电子元件与封装基板之间的间隙。因此,能够有效地清除间隙中的助焊剂,以避免影响封装结构的可靠度,并且能够避免在进行回焊制程时,焊料流入间隙而导致桥接问题,进而增加产品的良率。Based on the above, in the package structure of the embodiment of the present invention, the protruding portion of the pad can support the electronic component, so as to increase the gap between the electronic component and the package substrate. Therefore, the solder flux in the gap can be effectively removed to avoid affecting the reliability of the packaging structure, and the bridging problem caused by solder flowing into the gap during the reflow process can be avoided, thereby increasing the yield rate of the product.
为让本发明的上述特征和优点能更明显易懂,下文特举实施例,并配合附图作详细说明如下。In order to make the above-mentioned features and advantages of the present invention more comprehensible, the following specific embodiments are described in detail with reference to the accompanying drawings.
附图说明Description of drawings
图1A至图1C是依照本发明一实施例的一种封装结构的制造流程剖面示意图。1A to 1C are schematic cross-sectional views of a manufacturing process of a packaging structure according to an embodiment of the present invention.
图2是图1A的封装结构的俯视示意图。FIG. 2 is a schematic top view of the package structure in FIG. 1A .
图3A至图3C是依照本发明另一实施例的一种封装结构的制造流程剖面示意图。3A to 3C are schematic cross-sectional views of a manufacturing process of a packaging structure according to another embodiment of the present invention.
图4是图3A的封装结构的俯视示意图。FIG. 4 is a schematic top view of the package structure in FIG. 3A .
附图标记说明Explanation of reference signs
100、200:封装结构100, 200: package structure
110、210:封装基板110, 210: package substrate
110a、210a:第一表面110a, 210a: first surface
110b、210b:第二表面110b, 210b: second surface
112、212:载板112, 212: carrier board
114、214:接垫114, 214: pad
114a、214a:连接部114a, 214a: connection part
114b、214b:突起部114b, 214b: protrusions
116、216:绝缘层116, 216: insulating layer
116a、216a:开口116a, 216a: openings
120、220:电子元件120, 220: electronic components
122、222:导电端子122, 222: conductive terminal
130、230:导电胶130, 230: Conductive adhesive
140、240:封装胶体140, 240: encapsulation colloid
217:导电图案217: Conductive pattern
218:导电通孔218: Conductive Via
219:导电接点219: Conductive contact
A:区域A: area
C:间隙C: Clearance
D:深度D: Depth
H:高度H: height
具体实施方式Detailed ways
图1A至图1C是依照本发明一实施例的一种封装结构的制造流程剖面示意图,图2是图1A的封装结构的俯视示意图。请参照图1A至图2,首先,提供一封装基板110。封装基板110包括一载板112、多个接垫114以及一绝缘层116。接垫114以及绝缘层116设置于载板112上。此外,绝缘层116具有多个开口116a,以暴露出接垫114。各个接垫114具有一连接部114a与一突起部114b。封装基板110具有一第一表面110a与相对于第一表面110a的一第二表面110b。各个接垫114的突起部114b由封装基板110的第二表面110b往封装基板110的第一表面110a延伸。在本实施例中,绝缘层116也可以设置于相邻的两个接垫114之间的一区域A中。在其他实施例中,绝缘层116也可以不设置于区域A中,以暴露载板112,而关于此类型的封装基板110的细节会在后述的实施例中描述。1A to 1C are schematic cross-sectional views of a manufacturing process of a package structure according to an embodiment of the present invention, and FIG. 2 is a schematic top view of the package structure in FIG. 1A . Referring to FIG. 1A to FIG. 2 , firstly, a packaging substrate 110 is provided. The packaging substrate 110 includes a carrier 112 , a plurality of pads 114 and an insulating layer 116 . The pads 114 and the insulating layer 116 are disposed on the carrier 112 . In addition, the insulation layer 116 has a plurality of openings 116 a to expose the pads 114 . Each pad 114 has a connecting portion 114a and a protruding portion 114b. The packaging substrate 110 has a first surface 110a and a second surface 110b opposite to the first surface 110a. The protruding portion 114b of each pad 114 extends from the second surface 110b of the packaging substrate 110 to the first surface 110a of the packaging substrate 110 . In this embodiment, the insulating layer 116 can also be disposed in a region A between two adjacent pads 114 . In other embodiments, the insulating layer 116 may not be disposed in the region A to expose the carrier 112 , and details about this type of package substrate 110 will be described in the following embodiments.
举例来说,载板112可以是玻璃基板、聚亚酰胺(Polyimide)树脂或其他类似的聚合物所形成的芯层。然而,本发明不限于此,其他合适的芯层材料也可以作为载板112只要所述材料能够承载在其之上所形成的封装结构,并且能够承受后续的制程即可。另外,在一实施例中,载板112也可以具有导电通孔,以电性连接设置于载板112第一表面110a的接垫114与设置于第二表面110b的外部端子,而关于此类型的封装基板110的细节会在后述的实施例中描述。再者,接垫114例如是通过导电金属,如铝、铜、铝合金或与铜合金而制成,惟本发明不以此为限。For example, the carrier 112 may be a core layer formed of a glass substrate, polyimide resin or other similar polymers. However, the present invention is not limited thereto, and other suitable core layer materials can also be used as the carrier 112 as long as the material can carry the package structure formed thereon and withstand subsequent manufacturing processes. In addition, in one embodiment, the carrier board 112 may also have conductive vias to electrically connect the pads 114 disposed on the first surface 110a of the carrier board 112 with the external terminals disposed on the second surface 110b. The details of the packaging substrate 110 will be described in the embodiments described later. Moreover, the contact pad 114 is made of conductive metal, such as aluminum, copper, aluminum alloy or alloy with copper, for example, but the invention is not limited thereto.
此外,在本实施例中,接垫114的突起部114b例如是多个导电柱,通过电镀(electroplating)、蒸镀(evaporation)或沉积(deposition)等方式制成。以电镀为例,在进行黄光制程(lithography)后,利用图案化薄膜定义出突起部114b的预定位置,再经由电镀制程在所述的预定位置上制作导电柱。突起部114b例如是方块状、圆柱状、细柱状或其他图案,其材质例如是单一金属或是合成金属,惟本发明并不限于此。各个接垫114的突起部114b可以具有相同的材质、高度与外型。因此,突起部114b在制程中可以同时形成,以节省制造成本。可以理解的是,各个接垫114的突起部114b也可以具有不同的材质、高度与外型,视设计需求而定,惟本发明并不限于此。另外,突起部114b可以由其他可能的形式呈现或为其他可能的形状,而关于其他类型的突起部114b的细节会在后述的实施例中描述。In addition, in this embodiment, the protruding portion 114b of the pad 114 is, for example, a plurality of conductive pillars, which are made by electroplating, evaporation or deposition. Taking electroplating as an example, after the lithography is performed, the patterned film is used to define the predetermined position of the protruding portion 114b, and then the conductive pillar is fabricated on the predetermined position through the electroplating process. The protruding portion 114b is, for example, a square shape, a column shape, a thin column shape or other patterns, and its material is, for example, a single metal or a composite metal, but the present invention is not limited thereto. The protrusions 114b of each pad 114 may have the same material, height and shape. Therefore, the protruding portion 114b can be formed simultaneously during the manufacturing process to save manufacturing cost. It can be understood that the protruding portion 114b of each pad 114 may also have different materials, heights and shapes, depending on design requirements, but the present invention is not limited thereto. In addition, the protruding portion 114b can be presented in other possible forms or be in other possible shapes, and details about other types of protruding portion 114b will be described in the embodiments described later.
在本实施例中,绝缘层116例如包括环氧树脂(epoxy resin)或感光树脂,利用涂布或网版印刷等方式形成于载板112上,以绝缘保护载板112并防止内部导线外露而造成短路。然而,本发明并不限制绝缘层116的材质与形成的方式。另外,各个接垫114的突起部114b的高度H可以是大于绝缘层116的开口116a的深度D。举例来说,开口116a可以利用光阻(photoresist)包覆于绝缘层116上,再进行曝光、显影与蚀刻等方式加以图案化而形成。然而,本发明并不限于此。In this embodiment, the insulating layer 116 includes, for example, epoxy resin or photosensitive resin, and is formed on the carrier 112 by coating or screen printing to insulate and protect the carrier 112 and prevent internal wires from being exposed. cause a short circuit. However, the present invention does not limit the material and formation method of the insulating layer 116 . In addition, the height H of the protruding portion 114 b of each pad 114 may be greater than the depth D of the opening 116 a of the insulating layer 116 . For example, the opening 116 a can be formed by coating the insulating layer 116 with a photoresist, and then performing patterning by exposing, developing, and etching. However, the present invention is not limited thereto.
接着,将多个导电胶130设置于绝缘层116的开口116a内,并将电子元件120设置于封装基板110上,进行回焊(reflow)制程。电子元件120通过导电胶130与封装基板110电性连接。详细来说,导电胶130包覆接垫114的突起部114b,电子元件120则通过导电胶130与接垫114的突起部114b电性连接。另外,在本实施例中,导电胶130部分地包覆封装基板110的绝缘层116与电子元件120的导电端子122。导电胶130例如是焊料(solder paste),经由焊接的方式接合并电性连接于封装基板110与电子元件120之间,进而防止电子元件120在后续制程中产生位移。然而,导电胶也可以是其他导电粘着材料,其形成方式与材质并不限于此。Next, a plurality of conductive adhesives 130 are disposed in the openings 116 a of the insulating layer 116 , and the electronic components 120 are disposed on the packaging substrate 110 to perform a reflow process. The electronic component 120 is electrically connected to the packaging substrate 110 through the conductive glue 130 . In detail, the conductive glue 130 covers the protruding portion 114 b of the pad 114 , and the electronic component 120 is electrically connected to the protruding portion 114 b of the pad 114 through the conductive glue 130 . In addition, in this embodiment, the conductive adhesive 130 partially covers the insulating layer 116 of the packaging substrate 110 and the conductive terminals 122 of the electronic component 120 . The conductive glue 130 is, for example, solder paste, which is bonded and electrically connected between the packaging substrate 110 and the electronic component 120 by soldering, thereby preventing the electronic component 120 from being displaced in subsequent manufacturing processes. However, the conductive adhesive can also be other conductive adhesive materials, and its forming method and material are not limited thereto.
此外,根据电性及性能上的需求,电子元件120例如是主动元件、被动元件或其组合者。举例来说,主动元件可以是集成电路、光电元件或是微机电元件等。被动元件例如为电容器、电阻器或是电感器等。然而,本发明并不限于此。另外,电子元件120与封装基板110之间具有一间隙C。In addition, according to electrical and performance requirements, the electronic component 120 is, for example, an active component, a passive component or a combination thereof. For example, the active element can be an integrated circuit, an optoelectronic element, or a micro-electromechanical element. The passive element is, for example, a capacitor, a resistor, or an inductor. However, the present invention is not limited thereto. In addition, there is a gap C between the electronic component 120 and the packaging substrate 110 .
进一步来说,电子元件120具有多个导电端子122。导电端子122分别对应于接垫114的其中之一。接垫114的突起部114b的数量为至少三个,以支撑导电端子122。举例来说,对应于导电端子122的接垫114中,一者可以是具有单一导电柱,另一者可以是具有一对导电柱。也就是说,对应于导电端子122的接垫114一共具有三个导电柱,以最少的导电柱数量来支撑导电端子122,且这些导电柱不共线而是排列为三角形,以达到三点平衡的条件进而稳固地支撑电子元件120,并使电子元件120能够保持平衡不致倾倒。接垫114的突起部114b面对导电端子122的表面是位于同一平面上,由连接部114a往电子元件120的导电端子122方向延伸,以支撑导电端子122。可以理解的是,图式示出为一对导电端子及一对接垫,且各个接垫具有三个导电柱,但本发明并不以此为限。举例来说,这些导电柱的尺寸至少是30微米。可以理解的是,导电柱的尺寸越大,越能稳固地支撑电子元件120,也能够减少导电柱的数量。然而,本发明并不限制导电柱的数量或是排列方式,只要突起部114b能够支撑电子元件120,以使电子元件120与封装基板110之间具有间隙C即可。Furthermore, the electronic component 120 has a plurality of conductive terminals 122 . The conductive terminals 122 respectively correspond to one of the pads 114 . The number of the protrusions 114 b of the pad 114 is at least three to support the conductive terminals 122 . For example, one of the pads 114 corresponding to the conductive terminal 122 may have a single conductive column, and the other may have a pair of conductive columns. That is to say, the pad 114 corresponding to the conductive terminal 122 has a total of three conductive posts to support the conductive terminal 122 with the minimum number of conductive posts, and these conductive posts are not collinear but arranged in a triangle to achieve a three-point balance. The condition further supports the electronic component 120 stably, and enables the electronic component 120 to maintain balance without falling over. The surface of the protruding portion 114b of the pad 114 facing the conductive terminal 122 is located on the same plane, and extends from the connecting portion 114a toward the conductive terminal 122 of the electronic component 120 to support the conductive terminal 122 . It can be understood that the figure shows a pair of conductive terminals and a pair of pads, and each pad has three conductive columns, but the invention is not limited thereto. For example, the size of the conductive pillars is at least 30 microns. It can be understood that the larger the size of the conductive pillars, the more firmly the electronic component 120 can be supported, and the number of the conductive pillars can also be reduced. However, the present invention does not limit the number or arrangement of the conductive posts, as long as the protruding portion 114 b can support the electronic component 120 so that there is a gap C between the electronic component 120 and the packaging substrate 110 .
最后,将封装胶体140包覆电子元件120、导电胶130以及封装基板110,并将封装胶体140填入电子元件120与封装基板110之间,以形成封装结构100。也就是说,将封装胶体140填入间隙C中形成绝缘屏障,以避免接垫114之间产生桥接(solder bridge)问题而影响产品的良率。此外,填入间隙C中的封装胶体140的厚度介于30微米至110微米之间。举例来说,封装胶体140可以是非导电性的材料,如环氧树脂、环氧模封化合物(epoxy moldingcompound,EMC)或其他聚合物的模封材料,利用模压(molding)、层压(lamination)或其他适当的方式形成于电子元件120及封装基板110上,以保护电子元件120及封装基板110。然而,本发明并不限制封装胶体140的材质与形成方式。Finally, the encapsulant 140 is used to cover the electronic component 120 , the conductive adhesive 130 and the packaging substrate 110 , and the encapsulant 140 is filled between the electronic component 120 and the packaging substrate 110 to form the packaging structure 100 . That is to say, the encapsulant 140 is filled into the gap C to form an insulating barrier, so as to prevent the solder bridge problem between the pads 114 from affecting the yield of the product. In addition, the thickness of the encapsulant 140 filled in the gap C is between 30 microns and 110 microns. For example, the encapsulant 140 can be a non-conductive material, such as epoxy resin, epoxy molding compound (EMC) or other polymer molding materials, using molding (molding), lamination (lamination) Or formed on the electronic component 120 and the packaging substrate 110 in other appropriate ways to protect the electronic component 120 and the packaging substrate 110 . However, the present invention does not limit the material and forming method of the encapsulant 140 .
图3A至图3C是依照本发明另一实施例的一种封装结构的制造流程剖面示意图、图4是图3A的封装结构的俯视示意图。请参照图3A至图4,本实施例的封装结构200的制造流程类似于封装结构100的制造流程,其中相同或相似的元件采用相同或相似的标号,在此不再赘述。封装结构200与封装结构100之间的差异例如在于,接垫214的突起部214b可以是图钉状。举例来说,通过打线(wire bonding)的方式在连接部214a上形成打线凸块(stud bump)或是焊球凸块作为突起部214b。然而,本发明的实施例并不限制突起部214b的制作方式、材质与外型,只要突起部214b能够在电子元件220与封装基板210之间发挥良好的间隔维持作用即可。再者,在封装结构200中,突起部214b的高度H小于或等于绝缘层216的开口216a的深度D。此外,电子元件220可以是经由导电胶230而与接垫214的突起部214b连接。举例来说,在进行回焊制程时,可视所需导电胶的高度而调整导电胶的熔融程度,并藉此调整电子元件220与封装基板210之间的间隙C,以使电子元件220设置于封装基板210上。3A to 3C are schematic cross-sectional views of a manufacturing process of a packaging structure according to another embodiment of the present invention, and FIG. 4 is a schematic top view of the packaging structure of FIG. 3A . Referring to FIG. 3A to FIG. 4 , the manufacturing process of the packaging structure 200 of this embodiment is similar to the manufacturing process of the packaging structure 100 , wherein the same or similar components use the same or similar reference numerals, which will not be repeated here. The difference between the package structure 200 and the package structure 100 is, for example, that the protruding portion 214b of the pad 214 may be in the shape of a thumbtack. For example, stud bumps or solder ball bumps are formed on the connecting portion 214a by wire bonding as the protruding portion 214b. However, the embodiment of the present invention does not limit the manufacturing method, material and shape of the protruding portion 214 b, as long as the protruding portion 214 b can maintain a good distance between the electronic component 220 and the packaging substrate 210 . Furthermore, in the package structure 200 , the height H of the protruding portion 214 b is smaller than or equal to the depth D of the opening 216 a of the insulating layer 216 . In addition, the electronic component 220 may be connected to the protruding portion 214 b of the pad 214 via the conductive glue 230 . For example, during the reflow process, the degree of melting of the conductive adhesive can be adjusted depending on the height of the required conductive adhesive, thereby adjusting the gap C between the electronic component 220 and the package substrate 210, so that the electronic component 220 is set on the package substrate 210 .
此外,在封装结构200中,在对应于电子元件220的接垫214之间的一区域A,暴露载板212。也就是说,在区域A中不设置绝缘层216,以增加在区域A中,电子元件220与封装基板210之间的间隙C。另外,封装结构200还可以在封装基板210的第二表面210b设置绝缘层216以及导电图案217。在封装基板210的第一表面210a的接垫214以及第二表面210b的导电图案217彼此相互对应,并且利用载板212的导电通孔218电性连接位于第一表面210a的接垫214与第二表面210b的导电图案217。再者,封装基板210的第二表面210b还设置多个导电接点219。导电接点219例如是导电球体(如焊球、铜球或镍球等),利用植球(ball placement)制程与回焊制程接合于导电图案217,惟本发明并不限于此。通过在封装基板210的第二表面210b上形成导电图案217以及导电接点219,以增加封装结构产品的变化性。In addition, in the package structure 200 , the carrier 212 is exposed at an area A corresponding to the pads 214 of the electronic component 220 . That is to say, the insulating layer 216 is not provided in the region A, so as to increase the gap C between the electronic component 220 and the package substrate 210 in the region A. Referring to FIG. In addition, the packaging structure 200 can also provide an insulating layer 216 and a conductive pattern 217 on the second surface 210 b of the packaging substrate 210 . The pads 214 on the first surface 210a of the package substrate 210 and the conductive patterns 217 on the second surface 210b correspond to each other, and the pads 214 on the first surface 210a and the second surface 210b are electrically connected by the conductive vias 218 of the carrier 212 . The conductive pattern 217 on the two surfaces 210b. Furthermore, the second surface 210 b of the packaging substrate 210 is further provided with a plurality of conductive contacts 219 . The conductive contacts 219 are, for example, conductive balls (such as solder balls, copper balls, or nickel balls, etc.), which are bonded to the conductive pattern 217 by using a ball placement process and a reflow process, but the invention is not limited thereto. By forming the conductive pattern 217 and the conductive contact 219 on the second surface 210 b of the package substrate 210 , the variability of the package structure product is increased.
综上所述,本发明通过接垫的突起部支撑电子元件,以增加封装基板与电子元件之间的间隙。藉此,能够有效地清除间隙中的助焊剂,以避免影响封装结构的可靠度,并且能够避免桥接问题。另外,增加封装基板与电子元件之间的间隙能够容易地将封装胶体填入间隙中,以减少电子元件与封装基板之间因热膨胀差异所产生的热应力而导致分离(delamination)的问题。此外,通过在对应于电子元件的接垫之间的区域中,不设置绝缘层,进一步增加填入封装基板与电子元件之间的封装胶体的最大厚度,以避免接垫之间产生不当的电性桥接,进而增加产品的良率。To sum up, the present invention supports the electronic components through the protrusions of the pads, so as to increase the gap between the package substrate and the electronic components. Thereby, the solder flux in the gap can be effectively removed to avoid affecting the reliability of the package structure, and the bridging problem can be avoided. In addition, increasing the gap between the packaging substrate and the electronic component can easily fill the gap with encapsulant, so as to reduce the problem of delamination caused by the thermal stress generated by the thermal expansion difference between the electronic component and the packaging substrate. In addition, by not disposing an insulating layer in the area between the pads corresponding to the electronic components, the maximum thickness of the encapsulant filled between the packaging substrate and the electronic components is further increased to avoid undue electrical contact between the pads. Sexual bridging, thereby increasing the yield of the product.
虽然本发明已以实施例揭示如上,然其并非用以限定本发明,任何所属技术领域中技术人员,在不脱离本发明的精神和范围内,当可作些许的更动与润饰,故本发明的保护范围当视权利要求所界定者为准。Although the present invention has been disclosed above with the embodiments, it is not intended to limit the present invention. Any person skilled in the art can make some changes and modifications without departing from the spirit and scope of the present invention. Therefore, this The scope of protection of the invention should be defined by the claims.
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| CN1873970A (en) * | 2005-06-03 | 2006-12-06 | 新光电气工业株式会社 | Electronic device and method of manufacturing the same |
| CN102931109A (en) * | 2012-11-08 | 2013-02-13 | 南通富士通微电子股份有限公司 | Method for forming semiconductor devices |
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| JP3741553B2 (en) * | 1998-11-20 | 2006-02-01 | シャープ株式会社 | Semiconductor device connection structure and connection method, and semiconductor device package using the same |
| SG93191A1 (en) * | 1999-01-28 | 2002-12-17 | United Microelectronics Corp | Multi-chip chip-scale integrated circuit package |
| JP2002134541A (en) * | 2000-10-23 | 2002-05-10 | Citizen Watch Co Ltd | Semiconductor device, manufacturing method thereof, and mounting structure of semiconductor device |
| JP2005117093A (en) * | 2003-10-02 | 2005-04-28 | Toyo Commun Equip Co Ltd | Temperature control circuit and highly stable crystal oscillator using it |
| KR102005235B1 (en) * | 2013-03-06 | 2019-07-30 | 삼성전자주식회사 | Light Emitting diode package having flip-chip bonding structure |
| KR101947251B1 (en) * | 2014-03-28 | 2019-02-12 | 인텔 코포레이션 | Method, electronic assembly and apparatus for emib chip interconnections |
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| JP2002076587A (en) * | 2000-08-24 | 2002-03-15 | Citizen Watch Co Ltd | Method for manufacturing semiconductor device and method for mounting the same |
| CN1873970A (en) * | 2005-06-03 | 2006-12-06 | 新光电气工业株式会社 | Electronic device and method of manufacturing the same |
| CN102931109A (en) * | 2012-11-08 | 2013-02-13 | 南通富士通微电子股份有限公司 | Method for forming semiconductor devices |
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