CN108428703A - Three-dimensional storage and its manufacturing method - Google Patents

Abstract

The invention relates to the technical field of semiconductor manufacturing, in particular to a three-dimensional memory and a manufacturing method thereof. The three-dimensional memory includes: a substrate; a stacked structure located on the substrate, the stacked structure includes several layers of word lines arranged in sequence along a direction perpendicular to the substrate, and the word lines have The thickened portion protruding from the substrate in the direction of the stack structure, the thickened portion is located at the end of the word line, the end of the word line is connected to one end of the plug, the other end of the plug One end is used to connect with the interconnection structure. In the process of realizing the connection between the end of the word line and the plug, the invention does not cause the breakdown of the word line because the thickness of the word line is too thin, and improves the yield rate of three-dimensional memory manufacturing.

Description

Three-dimensional memory and its manufacturing method

technical field

The invention relates to the technical field of semiconductor manufacturing, in particular to a three-dimensional memory and a manufacturing method thereof.

Background technique

As technology develops, the semiconductor industry is constantly seeking new ways to produce a greater number of memory cells per memory die in a memory device. In non-volatile memory, such as NAND memory, one way to increase the memory density is by using vertical memory arrays, that is, 3D NAND (three-dimensional NAND) memory; 32 layers developed to 64 layers, or even higher layers.

CTF (Charge Trap Flash, Charge Trap Flash) 3D NAND memory is currently a relatively cutting-edge memory technology with great development potential. FIG. 1A is a partial structural diagram of a CTF-type 3D NAND memory in an ideal state in the prior art. As shown in FIG. 1A, a 3D NAND memory includes a stacked layer structure in which word lines (Word Line, WL) 11 and interlayer insulating layers 12 are alternately stacked, and step plugs (Contact) 13 implement word lines in the step region of the stacked layer structure. The wire 11 is electrically connected to an interconnection structure (not marked) for reading and writing of corresponding programs.

FIG. 1B is a partial structural diagram of a CTF 3D NAND memory in an actual state in the prior art. In the actual manufacturing process of the 3D NAND memory, in order to achieve good electrical connection with all the word lines 11 in the stacked layer structure, the step plugs 13 in the memory should have different depths. The ideal connection mode is shown in the area A in FIG. 1B , that is, the stepped plug 13 and the word line 11 have a suitable connection depth. However, due to the relatively thin thickness of the word line 11 in the prior art, there are the following two problems: on the one hand, the etching too shallow may cause poor electrical contact between the word line and the plug; on the other hand, during the etching process It is very easy to cause the breakdown of a certain layer of word lines and/or the adjacent interlayer insulating layer 12 due to over-etching, as shown in the B area in Figure 1B, which will affect the performance of the entire memory, and even lead to memory obsolescence.

Therefore, how to avoid the breakdown phenomenon in the step region of the word line in the 3D NAND memory during the process of etching to form the plug and ensure the performance of the 3D NAND memory product is a technical problem to be solved urgently.

Contents of the invention

The invention provides a three-dimensional memory and a manufacturing method thereof, which are used to solve the problem that word line breakdown is prone to occur in the existing three-dimensional memory in the process of etching the step region of the word line to form a plug, so as to ensure the performance of the three-dimensional memory product.

In order to solve the above problems, the present invention provides a three-dimensional memory, comprising:

Substrate;

A stacked structure on the substrate, the stacked structure includes several layers of word lines arranged in sequence along a direction perpendicular to the substrate, and the word lines protrude in a direction from the substrate to the stacked structure A thickened portion, the thickened portion is located at the end of the word line, the end of the word line is connected to one end of the plug, and the other end of the plug is used to connect to the interconnection structure.

Preferably, the word line also has a word line body part with a uniform thickness, and the thickened part is located on the word line body;

The edge of the thickened portion protrudes beyond the edge of the word line body portion in the horizontal direction.

Preferably, the word lines in the stacked structure are sequentially arranged along a direction perpendicular to the substrate;

Among the word lines in two adjacent odd-numbered layers, the edge of the word line closer to the substrate protrudes horizontally from the edge of the word line in the other layer, and is different from the edge of the word line in the odd-numbered layer. The plugs connected to the word lines are arranged along the first direction.

Preferably, among the word lines in two adjacent even-numbered layers, the edge of the word line closer to the substrate protrudes horizontally from the edge of the word line in the other layer, and the The plugs connected to the word lines of the even-numbered layer are arranged along the second direction;

The first direction and the second direction form a set angle.

Preferably, the set angle is 90 degrees.

Preferably, it further includes: an interlayer insulating layer filled between two adjacent layers of the word lines.

Preferably, the material of the word line includes tungsten.

Preferably, the three-dimensional memory is a 3D NAND memory.

In order to solve the above problems, the present invention also provides a method for manufacturing a three-dimensional memory, comprising the following steps:

providing a substrate;

A stacked structure is formed on the substrate, the stacked structure includes several layers of word lines arranged in sequence along a direction perpendicular to the substrate, and the word lines protrude in a direction from the substrate to the stacked structure. A thickened portion, the thickened portion is located at the end of the word line, the end of the word line is connected to one end of the plug, and the other end of the plug is used to connect to the interconnection structure.

Preferably, the specific steps of forming a stacked structure on the substrate include:

forming a stacked layer, the stacked layer including interlayer insulating layers and sacrificial layers alternately stacked in a direction perpendicular to the substrate, the end of the stacked layer is formed with a stepped structure, and the stepped structure includes several layers of steps;

removing the interlayer insulating layer on the surface of the step, exposing the sacrificial layer on the step;

depositing a sacrificial layer material on the exposed surface of the sacrificial layer, increasing the thickness of the sacrificial layer at the ends;

removing the sacrificial layer in the layer stack to form a void region;

Filling the conductive layer in the void area to form the word line.

Preferably, the following steps are also included before removing the interlayer insulating layer located on the surface of the step:

removing the end of the sacrificial layer to form a groove between adjacent interlayer insulating layers;

An interlayer insulating material layer is formed, the interlayer insulating material layer filling at least the groove.

Preferably, the specific steps of depositing the sacrificial layer material on the exposed surface of the sacrificial layer include:

depositing a sacrificial layer material on the exposed sacrificial layer, interlayer insulating layer, and said stepped surface of the interlayer insulating material layer;

The sacrificial layer material deposited on the sidewall surface of the step is removed.

Preferably, the word lines in the stacked structure are sequentially arranged along a direction perpendicular to the substrate;

Among the word lines in two adjacent odd-numbered layers, the edge of the word line closer to the substrate protrudes horizontally from the edge of the word line in the other layer, and is different from the edge of the word line in the odd-numbered layer. The plugs connected to the word lines are arranged along the first direction.

Preferably, among the word lines in two adjacent even-numbered layers, the edge of the word line closer to the substrate protrudes horizontally from the edge of the word line in the other layer, and the The plugs connected to the word lines of the even-numbered layer are arranged along the second direction;

The first direction and the second direction form a set angle.

Preferably, the set angle is 90 degrees.

Preferably, the three-dimensional memory is a 3D NAND memory.

In the three-dimensional memory and its manufacturing method provided by the present invention, a thickened portion protruding from the substrate to the stack structure is provided at the end of the word line, so that the end of the word line is connected to the plug During the process, the breakdown of the word line will not be caused due to the thickness of the word line being too thin, which improves the yield rate of the three-dimensional memory manufacturing and ensures the performance of the three-dimensional memory product.

Description of drawings

Accompanying drawing 1A is the partial structure diagram of the CTF 3D NAND memory under the ideal state in the prior art;

Accompanying drawing 1B is the partial structure diagram of the CTF 3D NAND memory under the actual state in the prior art;

Accompanying drawing 2 is a partial structural schematic diagram of a three-dimensional memory in a specific embodiment of the present invention;

Accompanying drawing 3 is the flow chart of the manufacturing method of three-dimensional memory in the specific embodiment of the present invention;

4A-4G are cross-sectional views of the three-dimensional memory in different manufacturing stages in the specific embodiment of the present invention.

Detailed ways

The specific implementation of the three-dimensional memory and its manufacturing method provided by the present invention will be described in detail below in conjunction with the accompanying drawings.

This specific embodiment provides a three-dimensional memory, and FIG. 2 is a partial structural diagram of the three-dimensional memory in the specific embodiment of the present invention. The three-dimensional memory described in this specific embodiment is preferably a 3D NAND memory, more preferably a CTF 3D NAND memory.

As shown in FIG. 2 , the three-dimensional memory provided in this embodiment includes: a substrate 20 and a stack structure on the substrate 20 . The stacked structure includes several layers of word lines 21 arranged in sequence along a direction perpendicular to the substrate 20, and the word lines 21 have a thickened portion 212 protruding from the substrate 20 to the stacked structure, so The thickened part 212 is located at the end of the word line 21, and the end of the word line 21 is connected to one end of the plug 23, and the other end of the plug 23 is used to connect to the interconnection structure.

The three-dimensional memory includes a plurality of storage units (not shown in the figure) arranged in an array, and the storage units are used for storing information. A bit line (Bit Line) serving as a voltage signal input line transmits a voltage signal to the corresponding word line 21 through the plug 23 to control whether the memory cells electrically connected to the word line 21 are turned on or not. The material of the word line 21 is conductive material, preferably tungsten.

In this specific embodiment, by setting the thickened part at the end of the word line, in the process of etching the word line 21 to realize its electrical connection with the plug 23, on the one hand, due to the thickening The arrangement of the portion 212 will not cause the breakdown of the word line 21 , on the other hand, it also simplifies the difficulty of the manufacturing process of the three-dimensional memory and facilitates the good electrical connection between the plug 23 and the word line 21 .

Preferably, the word line 21 also has a word line body portion 211 with a uniform thickness, the thickened portion 212 is located on the word line body portion 211; The edge of the word line body portion 211. Specifically, the thickness of the word line body portion 211 is preferably 15 nm˜35 nm, and the total thickness of the word line body portion 211 and the thickened portion 212 is 20 nm˜60 nm.

Wherein, the material of the word line body part 211 and the thickened part 212 are preferably the same material, so as to simplify the manufacturing process of the three-dimensional memory. By protruding the edge of the thickened part 212 from the edge of the word line body part 211 in the horizontal direction, the overall length of the word line 21 of each layer is increased, thereby increasing the use of the word line 21 for engraving. The window range of the eclipse reduces the difficulty of alignment and further improves the production efficiency and yield of the three-dimensional memory.

Preferably, the three-dimensional memory further includes an interlayer insulating layer 22 filled between two adjacent layers of the word lines 21 . That is, the stack structure is formed by alternately stacking the word lines 21 and the interlayer insulating layers 22 along a direction perpendicular to the substrate 20 . The number of stacked layers of the stacked structure can be 32 layers, 64 layers or other layers, which can be set by those skilled in the art according to actual needs. Generally speaking, the more stacked layers, the higher the integration degree of the three-dimensional memory.

A stepped structure is formed at the end of the stacked structure, and the stepped structure includes several layers of steps. In the stacked structure, an adjacent insulating layer 22 and a word line 21 form an insulating/word line layer pair. The ladder structure includes several layers of steps arranged in a direction perpendicular to the substrate 20, each layer of steps has one insulating/word line layer pair or a plurality of insulating/word line layer pairs, and the insulating/word line layer pairs in the lower steps The line layer pair protrudes horizontally beyond the insulation/word line layer pair in the upper step. Adjacent steps are isolated from each other by side walls 24 made of insulating material. The side wall 24 is also used to support the portion of the thickened portion 212 protruding from the word line body portion 211 , and at the same time realize electrical insulation between adjacent steps.

In order to realize the connection between each word line and bit line, and to avoid electrical signal interference between adjacent plugs, preferably, the word lines 21 in the stacked structure are sequentially arranged along a direction perpendicular to the substrate 20 Sorting; among the word lines 21 of two adjacent odd-numbered layers, the edge of the word line 21 closer to the substrate 20 protrudes horizontally from the edge of the word line 21 of the other layer, and The plugs connected to the word lines 21 of the odd-numbered layer are arranged along a first direction.

More preferably, among the word lines 21 of two adjacent even-numbered layers, the edge of the word line 21 closer to the substrate 20 protrudes from the edge of the word line 21 of the other layer in the horizontal direction. At the edge, the plugs connected to the word lines 21 of the even-numbered layer are arranged along a second direction; the first direction and the second direction form a set angle. In order to minimize the mutual interference between the plugs respectively connected to the two adjacent word lines, preferably, the set angle is 90 degrees.

Specifically, the plugs connected to the word lines of each odd-numbered layer are perpendicular to the substrate 20, and the plugs connected to the word lines of multiple odd-numbered layers are in the extending along a first direction in a plane parallel to the substrate 20; the plugs connected to the word lines of each even-numbered layer are also perpendicular to the substrate 20, and are connected to a plurality of even-numbered layers. The plurality of plugs connected to the word line of the layer extend in a second direction in a plane parallel to the substrate 20 . The first direction and the second direction form a set angle to avoid signal interference between word lines of adjacent layers.

In order to solve the above problems, this specific embodiment also provides a method for manufacturing a three-dimensional memory, and accompanying drawing 3 is a flow chart of a manufacturing method for a three-dimensional memory in a specific embodiment of the present invention. The cross-sectional views of the three-dimensional memory at different manufacturing stages, the structure of the three-dimensional memory formed in this specific embodiment can be seen in FIG. 2 . The three-dimensional memory described in this specific embodiment is preferably a 3D NAND memory. As shown in Figures 3 and 4A-4G, the method for manufacturing a three-dimensional memory provided in this specific embodiment includes the following steps:

Step S31 , providing a substrate 20 . The substrate 20 may be a Si substrate, a Ge substrate, a SiGe substrate, SOI (Silicon On Insulator, silicon on insulator) or GOI (Germanium On Insulator, germanium on insulator) and the like. In this specific embodiment, the substrate 20 is preferably a silicon substrate for supporting device structures thereon.

Step S32, forming a stacked structure on the substrate 20, the stacked structure includes several layers of word lines 21 arranged in sequence along a direction perpendicular to the substrate 20, and the word lines 21 have 20 points to the thickened part 212 protruding in the direction of the stack structure, the thickened part 212 is located at the end of the word line 21, the end of the word line 21 is connected to one end of the plug 23, the plug The other end of the plug 23 is used to connect with the interconnect structure.

Specifically, the specific steps of forming a stacked structure on the substrate 20 include:

As shown in FIG. 4A , a stacked layer is formed, the stacked layer includes interlayer insulating layers 22 and sacrificial layers 41 alternately stacked along a direction perpendicular to the substrate 20, and a stepped structure is formed at the end of the stacked layer, The step structure includes several layers of steps.

In the stacked layers, an adjacent insulating layer 22 and a sacrificial layer 41 form an insulating/sacrificing layer pair. The step structure includes several layers of steps stacked in a direction perpendicular to the substrate 20, each step has one insulation/sacrifice layer pair or a plurality of insulation/sacrifice layer pairs, and the insulation/sacrifice layer pair in the lower step Insulator/sacrificial layer pair protruding horizontally into the upper step. The material of the interlayer insulating layer 22 may be but not limited to oxide, and the material of the sacrificial layer 41 may be but not limited to nitride.

As shown in FIG. 4D , the interlayer insulating layer 22 on the surface of the step is removed to expose the sacrificial layer 41 on the step. Wherein, the specific method for removing the interlayer insulating layer 22 on the surface of the step may be wet etching or dry etching.

As shown in FIG. 4F , a sacrificial layer material is deposited on the exposed surface of the sacrificial layer 41 to increase the thickness of the sacrificial layer 41 at the end. Wherein, chemical vapor deposition, physical vapor deposition or atomic layer deposition may be used to deposit the sacrificial layer material on the exposed surface of the sacrificial layer 41 .

The sacrificial layer material deposited in this step is used to form the subsequent thickening portion 212, so the specific thickness of the deposited sacrificial layer material should not be too large, otherwise the overall resistance of the word line will increase and affect the electrical signal. transmission; the specific thickness of the deposited sacrificial layer material should not be too small, otherwise the breakdown of the word line cannot be effectively prevented. Therefore, preferably, the thickness of the deposited sacrificial layer material is 5nm-25nm; after depositing the sacrificial layer material, the total thickness of the sacrificial layer 41 at the end is 20nm-60nm.

The sacrificial layer in the layer stack is removed to form a void region.

As shown in FIG. 4G , a conductive layer is filled in the void area to form the word line 21 . Wherein, the material of the conductive layer is preferably tungsten.

In order not to change the position of the plug, the existing process window can be used to etch the plug channel. Preferably, the following steps are also included before removing the interlayer insulating layer 22 located on the surface of the step:

a) As shown in FIG. 4B , the end of the sacrificial layer 41 is removed to form a groove 43 between adjacent interlayer insulating layers 22 . The length L of the groove 43 can be set by those skilled in the art according to actual needs, and the depth D of the groove 43 is preferably equal to the thickness of the corresponding sacrificial layer 41, so as to further improve the performance of the three-dimensional memory. electrical properties.

b) As shown in FIG. 4C , an interlayer insulating material layer is formed, and the interlayer insulating material layer is at least filled in the groove 43 . That is, an interlayer insulating layer is formed by depositing an insulating material in the groove 43 . In order to avoid signal interference between the word lines of each layer, preferably, the interlayer insulating material layer is filled in the groove 43 and the surface of the step to form the side wall 24 .

Preferably, the specific steps of depositing the sacrificial layer material on the exposed surface of the sacrificial layer include:

As shown in FIG. 4E , depositing a sacrificial layer material on the stepped surface of the exposed sacrificial layer 41 , the interlayer insulating layer 22 and the interlayer insulating material layer;

As shown in FIG. 4F , the sacrificial layer material deposited on the surface of the side wall 24 of the step is removed. Specifically, when the sacrificial layer material is deposited on the surface of the step, the sacrificial layer material will cover the horizontal surface 241 and the vertical surface 242 of the side wall 24 . Removing the sacrificial layer material deposited on the surface of the side wall 24 of the step is mainly to remove the material of the sacrificial layer deposited on the vertical surface 242 of the side wall 24 of the step, and retain the horizontal surface 241 deposited on the side wall 24 The material of the sacrificial layer on top of the sacrificial layer material, so that the edge of the sacrificial layer material deposited in this step protrudes beyond the edge of the sacrificial layer 41 in the horizontal direction.

By removing the material of the sacrificial layer deposited on the surface of the side wall 24 of the step, the connection of the sacrificial layer between adjacent steps is cut off, and signal interference between word lines of various layers formed subsequently is avoided.

Preferably, the word lines in the stacked structure are sequentially arranged along a direction perpendicular to the substrate;

Among the word lines 21 of two adjacent odd-numbered layers, the edge of the word line 21 closer to the substrate 20 protrudes in the horizontal direction than the edge of the word line 21 of the other layer, which is different from the edge of the word line 21 of the second layer. The plugs 23 connected to the word lines 21 of odd layers are arranged along the first direction.

More preferably, among the word lines 21 of two adjacent even-numbered layers, the edge of the word line 21 closer to the substrate 20 protrudes from the edge of the word line 21 of the other layer in the horizontal direction. At the edge, the plugs 23 connected to the word lines 21 of the even-numbered layer are arranged along a second direction; the first direction and the second direction form a set angle. Preferably, the set angle is 90 degrees.

Specifically, the plugs connected to the word lines of each odd-numbered layer are perpendicular to the substrate 20, and the plugs connected to the word lines of multiple odd-numbered layers are in the extending along a first direction in a plane parallel to the substrate 20; the plugs connected to the word lines of each even-numbered layer are also perpendicular to the substrate 20, and are connected to a plurality of even-numbered layers. The plurality of plugs connected to the word line of the layer extend in a second direction in a plane parallel to the substrate 20 . The first direction and the second direction form a set angle to avoid signal interference between word lines of adjacent layers.

In the three-dimensional memory and its manufacturing method provided in this specific embodiment, a thickened portion protruding from the substrate to the stack structure is provided at the end of the word line, so that the connection between the end of the word line and the interposer is realized. In the process of plug connection, the breakdown of the word line will not be caused due to the thickness of the word line being too thin, which improves the yield rate of the three-dimensional memory manufacturing and ensures the performance of the three-dimensional memory product.

The above is only a preferred embodiment of the present invention, it should be pointed out that for those of ordinary skill in the art, without departing from the principle of the present invention, some improvements and modifications can also be made, and these improvements and modifications should also be considered Be the protection scope of the present invention.

Claims (16)

1. A three-dimensional memory, characterized in that, comprising: Substrate; A stacked structure on the substrate, the stacked structure includes several layers of word lines arranged in sequence along a direction perpendicular to the substrate, and the word lines protrude in a direction from the substrate to the stacked structure A thickened portion, the thickened portion is located at the end of the word line, the end of the word line is connected to one end of the plug, and the other end of the plug is used to connect to the interconnection structure. 2. The three-dimensional memory according to claim 1, wherein the word line further has a word line body part with uniform thickness, and the thickened part is located on the word line body; The edge of the thickened portion protrudes beyond the edge of the word line body portion in the horizontal direction. 3. The three-dimensional memory according to claim 1, wherein the word lines in the stacked structure are sequentially arranged along a direction perpendicular to the substrate; Among the word lines in two adjacent odd-numbered layers, the edge of the word line closer to the substrate protrudes horizontally from the edge of the word line in the other layer, and is different from the edge of the word line in the odd-numbered layer. The plugs connected to the word lines are arranged along the first direction. 4. The three-dimensional memory according to claim 3, wherein, among the word lines of two adjacent even-numbered layers, the edge of the word line closer to the substrate protrudes beyond the said substrate along the horizontal direction. On the edge of the word lines in another layer, the plugs connected to the word lines in the even-numbered layer are arranged along a second direction; the first direction and the second direction form a set angle. 5. The three-dimensional memory according to claim 4, wherein the set angle is 90 degrees. 6. The three-dimensional memory according to any one of claims 1 to 5, further comprising: an interlayer insulating layer filled between two adjacent layers of the word lines. 7. The three-dimensional memory according to any one of claims 1 to 5, wherein the material of the word line comprises tungsten. 8. The three-dimensional memory according to any one of claims 1 to 5, wherein the three-dimensional memory is a 3D NAND memory. 9. A method for manufacturing a three-dimensional memory, comprising the steps of: providing a substrate; A stacked structure is formed on the substrate, the stacked structure includes several layers of word lines arranged in sequence along a direction perpendicular to the substrate, and the word lines protrude in a direction from the substrate to the stacked structure. A thickened portion, the thickened portion is located at the end of the word line, the end of the word line is connected to one end of the plug, and the other end of the plug is used to connect to the interconnection structure. 10. The manufacturing method of a three-dimensional memory according to claim 9, wherein the specific step of forming a stack structure on the substrate comprises: forming a stacked layer, the stacked layer including interlayer insulating layers and sacrificial layers alternately stacked in a direction perpendicular to the substrate, the end of the stacked layer is formed with a stepped structure, and the stepped structure includes several layers of steps; removing the interlayer insulating layer on the surface of the step, exposing the sacrificial layer on the step; depositing a sacrificial layer material on the exposed surface of the sacrificial layer, increasing the thickness of the sacrificial layer at the end; removing the sacrificial layer in the stacked layers to form a void region; Filling the conductive layer in the void area to form the word line. 11. The method for manufacturing a three-dimensional memory according to claim 10, further comprising the following steps before removing the interlayer insulating layer on the step surface: removing the end of the sacrificial layer to form a groove between adjacent interlayer insulating layers; An interlayer insulating material layer is formed, the interlayer insulating material layer filling at least the groove. 12. The manufacturing method of a three-dimensional memory according to claim 11, wherein the specific step of depositing a sacrificial layer material on the exposed surface of the sacrificial layer comprises: depositing a sacrificial layer material on the exposed sacrificial layer, interlayer insulating layer, and said stepped surface of the interlayer insulating material layer; The sacrificial layer material deposited on the sidewall surface of the step is removed. 13. The method for manufacturing a three-dimensional memory according to claim 12, wherein the word lines in the stacked structure are sequentially arranged along a direction perpendicular to the substrate; Among the word lines in two adjacent odd-numbered layers, the edge of the word line closer to the substrate protrudes horizontally from the edge of the word line in the other layer, and is different from the edge of the word line in the odd-numbered layer. The plugs connected to the word lines are arranged along the first direction. 14. The manufacturing method of a three-dimensional memory according to claim 13, wherein, among the word lines in two adjacent even-numbered layers, the edge of the word line closer to the substrate protrudes in the horizontal direction On the edge of the word lines in the other layer, plugs connected to the word lines in the even-numbered layer are arranged along a second direction; The first direction and the second direction form a set angle. 15. The manufacturing method of a three-dimensional memory according to claim 14, wherein the set angle is 90 degrees. 16. The method for manufacturing a three-dimensional memory according to any one of claims 9-15, wherein the three-dimensional memory is a 3D NAND memory.