CN108381042A - Chip processing system and wafer processing method - Google Patents

Abstract

The invention discloses a wafer processing system and a wafer processing method. The wafer processing system includes a wafer and a laser scribing device. The wafer includes a semiconductor substrate and several components. The upper and lower surfaces of the wafer are respectively provided with symmetrical first processing lines. , the second processing line, the laser scribing device includes a first laser head and a second laser head, and the two laser heads respectively emit laser beams moving along the corresponding processing line to form grooves, and the processing system also includes a laser for etching the first A plasma etching device for a groove; the wafer processing method includes installing a first laser head and a second laser head on the upper and lower sides of the wafer, and the first laser head emits a first laser beam moving along a first processing line to form a first groove, the second laser head emits a second laser beam moving along the second processing line to form a second groove, and the first groove is etched by a plasma etching device. The invention can improve wafer processing speed and production efficiency, and is beneficial to large-scale production of semiconductor chips.

Description

Wafer processing system and wafer processing method

technical field

The invention relates to a wafer processing system and a wafer processing method.

Background technique

In the manufacturing process of a semiconductor wafer, the plurality of optical devices on its surface are individually separated by a plurality of processing lines, and the semiconductor wafer can be decomposed into a plurality of semiconductor chips by cutting along the processing lines. In the prior art, the cutting blade on the dicing machine is usually used to cut the semiconductor wafer along the processing line. Since the cutting blade itself has a certain thickness, the area ratio of the processing line to the semiconductor chip is relatively high, which is not conducive to large-scale semiconductor chips. Production, low economic benefit; at the same time, in order to ensure the integrity of the semiconductor chip after cutting, the cutting amount of the cutting blade should not be too large each time, so multiple cuttings are required to complete the cutting and processing operation of the semiconductor wafer, which is cumbersome to operate and low in production efficiency .

Contents of the invention

The technical problem solved by the invention is to provide a wafer processing system and a wafer processing method.

The technical solution of the present invention is: a wafer processing system, including a wafer and a laser scribing device for laser processing the wafer, the wafer includes a semiconductor substrate and several components arranged on the upper surface of the semiconductor substrate, the The upper surface of the wafer is provided with a first processing line for separating several components, the lower surface of the wafer is provided with a second processing line symmetrical up and down with the first processing line, and the laser scribing device includes respectively arranged The first laser head and the second laser head on the upper and lower sides of the wafer, the first laser head emits the first laser beam moving along the first processing line on the upper surface of the wafer to form the first groove, so The second laser head emits a second laser beam moving along the second processing line on the lower surface of the wafer to form a second groove, and the processing system further includes a plasma etching device for etching the first groove to remove the semiconductor substrate between the first trench and the second trench.

Further, in the present invention, the first laser head and the second laser head are symmetrically distributed up and down with respect to the wafer.

Further, the wafer in the present invention further includes a protective layer and a metal layer respectively provided on the upper and lower surfaces of the semiconductor substrate.

Further, in the present invention, the first groove penetrates the protective layer and the upper surface of the semiconductor substrate, and the second groove penetrates the metal layer and the lower surface of the semiconductor substrate.

Further, the metal layer in the present invention is a copper layer.

Further, the semiconductor substrate in the present invention is a silicon substrate.

Further, in the present invention, the first laser beam is a picosecond pulse laser, and the second laser beam is a nanosecond pulse laser.

Another technical problem solved by the present invention is to provide a wafer processing method based on any one of the wafer processing systems described above, including: 1) installing a first laser head and a second laser head on the upper and lower sides of the wafer respectively , the first laser head emits the first laser beam on the upper surface of the wafer, and the second laser head emits the second laser beam on the lower surface of the wafer; 2) The first laser beam moves along the first processing line to form the first groove, and the second The laser beam moves along the second processing line to form a second groove; 3) the first groove penetrates the protective layer and the upper surface of the semiconductor substrate, and the second groove penetrates the metal layer and the lower surface of the semiconductor substrate ; 4) Etching the semiconductor substrate exposed at the first groove by using a plasma etching device until all the semiconductor substrate between the first groove and the second groove is removed, and the wafer can be processed along the first processing line, The second processing line is broken down.

Further, the first laser head and the second laser head described in step 1) of the present invention are symmetrically distributed up and down with respect to the wafer and move synchronously.

Further, the first groove and the second groove described in step 2) of the present invention are formed simultaneously.

Compared with the prior art, the present invention has the following advantages:

1) In the present invention, the picosecond pulsed laser emitted by the first laser head is used to form the first groove on the upper surface of the wafer, and the nanosecond pulsed laser emitted by the second laser head is used to form the second groove on the lower surface of the wafer Grooves, the positions of the first groove and the second groove respectively correspond to the first processing line and the second processing line which are symmetrical up and down, and are all formed in the semiconductor substrate according to a certain depth, so that the semiconductor substrate is exposed so that the wafer can be better Decomposing, and then etching the semiconductor substrate exposed at the first groove by means of a plasma etching device, thereby greatly improving the processing speed of the wafer, which is conducive to large-scale and rapid production of semiconductor chips, and the production efficiency is rapidly improved.

2) In the present invention, the first groove formed by picosecond pulsed laser has a relatively flat bottom surface, and the semiconductor substrate is etched on the basis of the first groove, which greatly improves the processing quality of the wafer.

3) In the present invention, the nanosecond pulsed laser has a relatively high power so that it can remove the metal layer on the lower surface of the wafer in the fastest time, further improving the processing speed of the wafer.

Description of drawings

The present invention will be further described below in conjunction with accompanying drawing and embodiment:

Fig. 1 is the schematic diagram of the three-dimensional structure of the laser scribing device in the present invention;

Fig. 2 is the top view of wafer among the present invention;

Fig. 3 is the side sectional view of wafer among the present invention;

Fig. 4 is the processing schematic diagram utilizing laser scribing device to process on wafer in the present invention;

Fig. 5 is a side sectional view after processing in Fig. 4;

Fig. 6 is a processing schematic diagram of utilizing a plasma etching device to process on a wafer in the present invention;

Fig. 7 is a side sectional view of Fig. 6 after processing.

Among them: 1. Wafer; 11. Semiconductor substrate; 12. Components; 13. Protective layer; 14. Metal layer; P1, first processing line; P2, second processing line; 2. Laser scribing device; 21. Second processing line A laser head; 22, a second laser head; L1, a first laser beam; L2, a second laser beam; G1, a first groove; G2, a second groove; 3, a plasma etching device.

Detailed ways

Example:

Shown in conjunction with the accompanying drawings is a specific embodiment of a wafer processing system and a wafer processing method of the present invention. First, the wafer processing system includes a wafer 1 and a laser scribing device 2 for laser processing the wafer 1, as shown in FIG. 2. As shown in FIG. 3, the wafer 1 includes a semiconductor substrate 11 and several components 12 arranged on the upper surface of the semiconductor substrate 11, and also includes a protective layer 13 and a protective layer respectively arranged on the upper and lower surfaces of the semiconductor substrate 11. A metal layer 14, wherein the semiconductor substrate 11 is a silicon substrate, and the metal layer 14 is a copper layer.

As shown in Figure 1, the upper surface of the wafer 1 is provided with a first processing line P1 for separating several components 12, and the lower surface of the wafer 1 is provided with a second processing line P1 that is vertically symmetrical with the first processing line P1. Processing line P2. For convenience, in this embodiment, only one processing line is provided on the upper and lower surfaces of the wafer 1. In fact, in order to divide the components 12, the first processing line P1 exists in plural form among several components 12, and the second Corresponding to the first processing line P1, the second processing line P2 also exists in a plural form.

The laser scribing device 2 includes a first laser head 21 and a second laser head 22 respectively arranged on the upper and lower sides of the wafer 1, and the first laser head 21 and the second laser head 22 are symmetrical about the wafer 1 up and down. distributed. 4 and 5, the first laser head 21 emits the first laser beam L1 moving along the first processing line P1 on the upper surface of the wafer 1 to form the first groove G1, the first groove The groove G1 penetrates the upper surface of the protective layer 13 and the semiconductor substrate 11, and the second laser head 22 emits a second laser beam L2 moving along the second processing line P2 on the lower surface of the wafer 1 to form a second groove G2 , the second groove G2 penetrates the metal layer 14 and the lower surface of the semiconductor substrate 11 .

In this embodiment, the first laser beam L1 is a picosecond pulse laser, the second laser beam L2 is a nanosecond pulse laser, and the first groove G1 formed by the picosecond pulse laser has a relatively flat bottom surface. Etching the semiconductor substrate 11 on the basis of the first groove G1 can greatly improve the processing quality of the wafer 1, and the nanosecond pulse laser has a relatively high power so that it can remove the metal layer on the lower surface of the wafer 1 in the fastest time , is conducive to improving the processing speed of the wafer 1.

As shown in Figure 6, the processing system further includes a plasma etching device 3 for etching the first groove G1 to remove the semiconductor substrate 11 between the first groove G1 and the second groove G2, after decomposition The wafer 1 is shown in FIG. 7 .

Secondly, the wafer processing method mainly includes the following steps:

Step 1): Install the first laser head 21 and the second laser head 22 on the upper and lower sides of the wafer 1 respectively. The first laser head 21 and the second laser head 22 are symmetrically distributed up and down with respect to the wafer 1 and move synchronously. The laser head 21 emits a picosecond pulse laser on the upper surface of the wafer 1, and the second laser head 22 emits a nanosecond pulse laser on the lower surface of the wafer 1;

Step 2): The picosecond pulse laser moves along the first processing line P1 to form the first groove G1, the nanosecond pulse laser moves along the second processing line P2 to form the second groove G2, and the first groove G1 formed simultaneously with the second trench G2;

Step 3): the first groove G1 penetrates the protective layer 13 and the upper surface of the semiconductor substrate 11 , and the second groove G2 penetrates the metal layer 14 and the lower surface of the semiconductor substrate 11 ;

Step 4): Etching the semiconductor substrate 11 exposed at the first groove G1 by using the plasma etching device 3 until the semiconductor substrate 11 between the first groove G1 and the second groove G2 is completely removed, and the wafer 1 is It can be decomposed along the first processing line P1 and the second processing line P2.

In this embodiment, the picosecond pulse laser emitted by the first laser head 21 is used to form the first groove G1 on the upper surface of the wafer 1, while the nanosecond pulse laser emitted by the second laser head 22 is used to form the first groove G1 on the lower surface of the wafer 1. Forming the second groove G2, the positions of the first groove G1 and the second groove G2 respectively correspond to the vertically symmetrical first processing line P1 and the second processing line P2, and are all formed in the semiconductor substrate 11 according to a certain depth, so that Expose the semiconductor substrate 11 so that the wafer 1 is better decomposed, and then etch the exposed semiconductor substrate 11 at the first groove G1 by means of the plasma etching device 3, thereby greatly improving the processing speed of the wafer 1, which is beneficial to semiconductor Large-scale and rapid production of chips has rapidly improved production efficiency.

Of course, the above-mentioned embodiments are only to illustrate the technical conception and characteristics of the present invention, and its purpose is to enable those skilled in the art to understand the content of the present invention and implement it accordingly, and not to limit the protection scope of the present invention. All modifications made according to the spirit of the main technical solutions of the present invention shall fall within the protection scope of the present invention.

Claims (10)

1. a kind of chip processing system, including chip（1）With to the chip（1）The laser scribe apparatus laser machined （2）, the chip（1）Including semiconductor substrate（11）With set on the semiconductor substrate（11）Several components of upper surface （12）, the chip（1）Upper surface be equipped with for separating several components（12）The first processing line（P1）, feature exists In：The chip（1）Lower surface be equipped with and first processing line（P1）Second processing line symmetrical above and below（P2）, described to swash Light lineation device（2）Including being respectively arranged in the chip（1）The first laser head of upper and lower both sides（21）With second laser head （22）, the first laser head（21）In chip（1）Upper surface is emitted along first processing line（P1）The first laser of movement Beam（L1）To form first groove（G1）, the second laser head（22）In chip（1）Lower surface outgoing is along second processing Line（P2）The second laser beam of movement（L2）To form second groove（G2）, the system of processing further includes for etching described One groove（G1）Plasma etching apparatus（3）To remove first groove（G1）With second groove（G2）Between semiconductor substrate （11）.

2. chip processing system according to claim 1, it is characterised in that：The first laser head（21）With second laser Head（22）About chip（1）Distribution symmetrical above and below.

3. chip processing system according to claim 1, it is characterised in that：The chip（1）Further include being respectively arranged on institute State semiconductor substrate（11）Protective layer upper and lower surfaces of（13）And metal layer（14）.

4. chip processing system according to claim 3, it is characterised in that：The first groove（G1）Pierce through the protection layer （13）And semiconductor substrate（11）Upper surface, the second groove（G2）Penetrate metal layer（14）And semiconductor substrate（11）'s Lower surface.

5. chip processing system according to claim 3, it is characterised in that：The metal layer（14）For layers of copper.

6. chip processing system according to claim 1, it is characterised in that：The semiconductor substrate（11）For silicon substrate.

7. chip processing system according to claim 1, it is characterised in that：The first laser beam（L1）For picosecond pulse Laser, the second laser beam（L2）For ps pulsed laser and ns pulsed laser.

8. the wafer processing method based on chip processing system described in claim 1, which is characterized in that including：

1）In chip（1）Upper and lower both sides first laser head is installed respectively（21）With second laser head（22）, first laser head （21）In chip（1）Upper surface is emitted first laser beam（L1）, second laser head（22）In chip（1）Lower surface outgoing second swashs Light beam（L2）；

2）First laser beam（L1）Along the first processing line（P1）Movement forms first groove（G1）, second laser beam（L2）Along Second processing line（P2）Movement forms second groove（G2）；

3）The first groove（G1）Pierce through the protection layer（13）And semiconductor substrate（11）Upper surface, the second groove（G2） Penetrate metal layer（14）And semiconductor substrate（11）Lower surface；

4）Utilize plasma etching apparatus（3）To first groove（G1）Locate exposed semiconductor substrate（11）It performs etching, until First groove（G1）With second groove（G2）Between semiconductor substrate（11）All until removal, chip（1）It can be along One processing line（P1）, the second processing line（P2）It is decomposed.

9. wafer processing method according to claim 8, it is characterised in that：Step 1）Described in first laser head（21）With Second laser head（22）About chip（1）It is symmetrical above and below to be distributed and move synchronously.

10. wafer processing method according to claim 8, it is characterised in that：Step 2）Described in first groove（G1）With Second groove（G2）It is formed simultaneously.