CN108269818B - A kind of CMOS type imaging sensor and preparation method thereof - Google Patents
A kind of CMOS type imaging sensor and preparation method thereof Download PDFInfo
- Publication number
- CN108269818B CN108269818B CN201810090280.8A CN201810090280A CN108269818B CN 108269818 B CN108269818 B CN 108269818B CN 201810090280 A CN201810090280 A CN 201810090280A CN 108269818 B CN108269818 B CN 108269818B
- Authority
- CN
- China
- Prior art keywords
- substrate
- layer
- groove
- oxide layer
- thin film
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
- H10F39/00—Integrated devices, or assemblies of multiple devices, comprising at least one element covered by group H10F30/00, e.g. radiation detectors comprising photodiode arrays
- H10F39/10—Integrated devices
- H10F39/12—Image sensors
- H10F39/18—Complementary metal-oxide-semiconductor [CMOS] image sensors; Photodiode array image sensors
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
- H10F39/00—Integrated devices, or assemblies of multiple devices, comprising at least one element covered by group H10F30/00, e.g. radiation detectors comprising photodiode arrays
- H10F39/011—Manufacture or treatment of image sensors covered by group H10F39/12
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
- H10F39/00—Integrated devices, or assemblies of multiple devices, comprising at least one element covered by group H10F30/00, e.g. radiation detectors comprising photodiode arrays
- H10F39/80—Constructional details of image sensors
- H10F39/807—Pixel isolation structures
Landscapes
- Solid State Image Pick-Up Elements (AREA)
Abstract
本发明提供一种CMOS型图像传感器及其制作方法，包括第二氧化层和位于该氧化层上一侧的基底，基底的一侧形成向下凹陷至第二氧化层的第一沟槽，在基底和第一沟槽上由下至上依次设有HIK层和第一氧化层，在设有高介电薄膜层和第一氧化层的第一沟槽上形成贯穿第一氧化层、高介电薄膜层和部分第二氧化层的接线槽，在第一氧化层上以及接线槽内设有第一金属层，在接线槽的第一金属层上设有铝接线板，铝接线板通过接线槽内的第一金属层和接线槽侧壁裸露出的高介电薄膜层电连接，以在铝接线板上施加电压时为高介电薄膜层提供电压，使高介电薄膜层和基底之间产生更大的电势差，使基底对电子的束缚能力更强，从而更好地减小白点和暗电流。
The present invention provides a CMOS image sensor and a manufacturing method thereof, comprising a second oxide layer and a substrate located on one side of the oxide layer, a first trench recessed downward to the second oxide layer is formed on one side of the substrate, and a substrate is formed on one side of the substrate. A HIK layer and a first oxide layer are arranged on the substrate and the first trench in sequence from bottom to top, and a first oxide layer and a high dielectric layer are formed on the first trench provided with the high dielectric film layer and the first oxide layer. The wiring slot of the thin film layer and part of the second oxide layer is provided with a first metal layer on the first oxide layer and in the wiring slot, and an aluminum wiring board is arranged on the first metal layer of the wiring slot, and the aluminum wiring board passes through the wiring slot. The first metal layer inside is electrically connected to the exposed high-dielectric film layer on the sidewall of the wiring slot, so as to provide voltage for the high-dielectric film layer when a voltage is applied on the aluminum wiring board, so that the gap between the high-dielectric film layer and the substrate is A larger potential difference is generated, making the substrate more capable of binding electrons, thereby better reducing white spot and dark current.
Description
Technical field
The present invention relates to technical field of semiconductors, and in particular to a kind of CMOS type imaging sensor and preparation method thereof.
Background technique
With the higher and higher demand of small size, the high pixel to camera, correspondingly the optical property of sensor is wanted
Ask also more harsh.Traditional handicraft is by taking HiK technique that the electronics of silicon face is strapped in surface and obstructing extraneous electronics
Injection is no longer satisfied height in the method that this provides the optical property (White pixel, Dark current, etc.) of product
The demand of client is held, Fig. 1 show traditional CMOS type imaging sensor.
Conventional method increases high dielectric thin film layer (HiK layers) to improve the optical property of sensor.
In order to promote the optical property and electric property of CMOS type imaging sensor, in the pixel of CMOS type imaging sensor
Cellular zone introduces deep trench isolation (DTI) technique, forms the second groove for pixel unit isolation, and production method includes:
As depicted in figs. 1 and 2, the second oxide layer 101 below a silicon base 102 and silicon base 102, the silicon base in figure are provided
Right side on 102 forms the second groove 105 for pixel unit isolation, in the silicon base 102 for being formed with second groove 105
It is sequentially formed with high dielectric thin film layer 103 and the first oxide layer 104 from the bottom to top, as shown in Figure 1；Again in silicon base 102
Left side etches first oxide layer 104, high dielectric thin film layer 103, silicon base 102 and the second oxide layer of part 101 and forms the
One groove 106, and continue to etch the formation of the second oxide layer 101 connecting groove 107, al wiring at the first groove 106
Plates 108 etc. are arranged at the connecting groove 106, as shown in Figure 2.
As shown in figure 3, its cardinal principle is the electricity for being flooded with 102 surface of charge and silicon base in itself using HiK layer 103
Lotus forms built in field, and extra electron is strapped in silicon face and inject external charge can not in silicon by the potential difference of generation.Cause
This reduces white point (White Pixel) and dark current (Dark current), improves the optics of CMOS type imaging sensor
Performance.But due between the limitation of HiK material itself causes in this potential difference it is limited, the ability of bound electron is also limited.No
It is able to satisfy the demand of higher optical property.
Summary of the invention
For the defects in the prior art, the embodiment of the invention provides CMOS type imaging sensors and preparation method thereof.
In a first aspect, the embodiment of the present invention provides a kind of CMOS type imaging sensor, comprising: the second oxide layer and be located at institute
State the substrate in the second oxide layer；
The substrate is located at the side of second oxide layer, and the side of the substrate, which is formed, is recessed to downwards described second
The first groove of oxide layer is successively arranged high dielectric thin film layer and first in the substrate and the first groove from the bottom to top
Oxide layer is formed in the first groove for being equipped with high dielectric thin film layer and the first oxide layer through first oxide layer, described
The connecting groove of high dielectric thin film layer and part second oxide layer, sets in first oxide layer and in the connecting groove
There is the first metal layer, aluminum wiring board is equipped on the first metal layer of the connecting groove, the aluminum wiring board passes through described
The high dielectric thin film layer electrical connection that the first metal layer and the wiring groove sidewall in connecting groove expose, in the aluminium
Voltage is provided when applying voltage on terminal plate for the high dielectric thin film layer.
Preferably, it is also formed with the second groove for being isolated between pixel unit on the substrate.
Preferably, there is pre-determined distance between the bottom of the second groove and the bottom surface of the substrate.
Preferably, including at least four second grooves, every four institutes at least four second groove
It states second groove and forms a rectangular area, each rectangular area surrounds a pixel unit wherein.
Preferably, the first metal layer is tungsten layer.
It preferably, further include the second metal layer being formed in second oxide layer；
The aluminum wiring board is electrically connected by the first metal layer and the second metal layer.
Second aspect, the present invention also provides the production methods of the CMOS type imaging sensor described in one kind, comprising:
The second oxide layer below one substrate and the substrate is provided；
Photoresist is coated in the upper surface of described substrate, the photoresist in the substrate is exposed using a mask plate aobvious
Shadow, to form the first pattern on the photoresist of the substrate；
The substrate is performed etching according to the first pattern formed on the photoresist of the substrate, is removed in the substrate
Photoresist, form first groove on the substrate, the first groove is through second oxidation of the substrate and part
Layer；
It is sequentially depositing high dielectric thin film layer and the first oxide layer from the bottom to top in the substrate and the first groove；
It is formed in the first groove for being deposited with the high dielectric thin film layer and the first oxide layer through first oxidation
The connecting groove of layer, the high dielectric thin film layer and part second oxide layer；
The first metal layer is deposited in first oxide layer and in the connecting groove, first in the connecting groove
Deposited aluminum layer on metal layer, forms aluminum wiring board, and the aluminum wiring board passes through the first metal layer in the connecting groove and described
The high dielectric thin film layer electrical connection that wiring groove sidewall exposes.
Preferably, it after the second oxide layer below a substrate and the substrate is provided, is applied in the upper surface of described substrate
Photoresist is covered, before being exposed development to the photoresist in the substrate using a mask plate, the method also includes:
Second metal layer is formed in second oxide layer；
Then, the method also includes:
The aluminum wiring board is electrically connected by the first metal layer and the second metal layer.
The third aspect, the present invention also provides the production methods of the CMOS type imaging sensor described in one kind, comprising:
The second oxide layer below one substrate and the substrate is provided；
Photoresist is coated in the upper surface of described substrate, the photoresist in the substrate is exposed using a mask plate aobvious
Shadow, to form first pattern and the second pattern on the photoresist of the substrate；The area of first pattern is greater than described the
The area of two patterns；
The substrate is performed etching according to the first pattern and the second pattern formed on the photoresist of the substrate, is removed
Photoresist in the substrate, forms first groove and second groove on the substrate, and the first groove runs through the base
Bottom and part second oxide layer have pre-determined distance between the bottom of the second groove and the bottom surface of the substrate；
It is sequentially depositing high dielectric thin film layer and the first oxidation from the bottom to top in the upper surface of the substrate and the first groove
Layer；
It is formed in the first groove for being deposited with the high dielectric thin film layer and the first oxide layer through first oxidation
The connecting groove of layer, the high dielectric thin film layer and part second oxide layer；
The first metal layer is deposited in first oxide layer and in the connecting groove, first in the connecting groove
Deposited aluminum layer on metal layer, forms aluminum wiring board, and the aluminum wiring board passes through the first metal layer in the connecting groove and described
The high dielectric thin film layer electrical connection that wiring groove sidewall exposes.
Preferably, the second groove is the second groove for being isolated between pixel unit；
Then, the method also includes:
Etch the first metal layer, first oxide layer and the high dielectric thin film between the second groove
Layer is formed between the metal grate for making light enter the entering light area of pixel unit with forming metal grate.
Preferably, the method also includes:
It is sequentially depositing high dielectric thin film layer and the first oxidation from the bottom to top in the upper surface of the substrate and the first groove
While layer, it is sequentially depositing high dielectric thin film layer and the first oxide layer from the bottom to top in the upper surface of described second groove.
Preferably, it after the second oxide layer below a substrate and the substrate is provided, is applied in the upper surface of described substrate
Photoresist is covered, before being exposed development to the photoresist in the substrate using a mask plate, the method also includes:
Second metal layer is formed in second oxide layer；
Then, the method also includes:
The aluminum wiring board is electrically connected by the first metal layer and the second metal layer.
The present invention is sequentially depositing height in the substrate and the first groove due to being initially formed first groove from the bottom to top
Dielectric film layers and the first oxide layer are formed in the first groove for being deposited with the high dielectric thin film layer and the first oxide layer and are passed through
The connecting groove for wearing first oxide layer, the high dielectric thin film layer and part second oxide layer, in first oxidation
The first metal layer is deposited on layer and in the connecting groove, the deposited aluminum layer on the first metal layer in the connecting groove is formed
Aluminum wiring board remains high dielectric thin film layer at first groove, so that aluminum wiring board be allow to pass through in the connecting groove
The high dielectric thin film layer electrical connection that the first metal layer and the wiring groove sidewall expose, and then on the aluminum wiring board
Voltage can be provided for the high dielectric thin film layer when applying voltage, make to generate between the high dielectric thin film layer and the substrate high
Potential difference when only using high dielectric thin film layer, keeps the substrate stronger to the constraint ability of electronics, thus preferably will be additional
Electronics is strapped in the surface of the substrate, can not be injected into silicon, to preferably reduce white point and dark current, light is substantially improved
Learn performance.
Detailed description of the invention
In order to more clearly explain the embodiment of the invention or the technical proposal in the existing technology, to embodiment or will show below
There is attached drawing needed in technical description to be briefly described, it should be apparent that, the accompanying drawings in the following description is this hair
Bright some embodiments for those of ordinary skill in the art without creative efforts, can be with root
Other attached drawings are obtained according to these attached drawings.
Fig. 1 is the structural schematic diagram that traditional CMOS type imaging sensor is simply formed with second groove；
Fig. 2 is the structural schematic diagram for foring first groove again on the basis of Fig. 1；
Fig. 3 is the schematic diagram that traditional CMOS type imaging sensor realizes electronics constraint；
Fig. 4 is the structural schematic diagram for the CMOS type imaging sensor that one embodiment of the invention provides；
Fig. 5 is the flow chart of the production method for the CMOS type imaging sensor that one embodiment of the invention provides；
Fig. 6 be another embodiment of the present invention provides CMOS type imaging sensor production method flow chart.
Specific embodiment
In order to make the object, technical scheme and advantages of the embodiment of the invention clearer, below in conjunction with the embodiment of the present invention
Attached drawing, the technical solution of the embodiment of the present invention is clearly and completely described.Obviously, described embodiment is this hair
Bright a part of the embodiment, instead of all the embodiments.Based on described the embodiment of the present invention, ordinary skill
Personnel's every other embodiment obtained under the premise of being not necessarily to creative work, shall fall within the protection scope of the present invention.
Unless otherwise defined, the technical term or scientific term that the disclosure uses should be tool in fields of the present invention
The ordinary meaning for thering is the personage of general technical ability to be understood." first ", " second " used in the disclosure and similar word are simultaneously
Any sequence, quantity or importance are not indicated, and are used only to distinguish different component parts.Equally, "one", " one " or
The similar word such as person's "the" does not indicate that quantity limits yet, but indicates that there are at least one." comprising " or "comprising" etc. are similar
Word mean to occur element or object before the word cover the element for appearing in the word presented hereinafter or object and its
It is equivalent, and it is not excluded for other elements or object.The similar word such as " connection " or " connected " be not limited to physics or
The connection of person's machinery, but may include electrical connection, it is either direct or indirect."upper", "lower", " left side ",
" right side " etc. is only used for indicating relative positional relationship, after the absolute position for being described object changes, then the relative positional relationship
May correspondingly it change.
Fig. 4 is the structural schematic diagram for the CMOS type imaging sensor that one embodiment of the invention provides.
A kind of CMOS type imaging sensor as shown in Figure 4, comprising: the second oxide layer 401 and be located at it is described second oxidation
Substrate 402 on layer 401, the substrate 402 are located at the side of second oxide layer 401, and the side of the substrate 402 is formed
It is recessed to the first groove 406 of second oxide layer 401 downwards, in the substrate 402 and the first groove 406 under
It is supreme to be successively arranged high dielectric thin film layer 403 and the first oxide layer 404, it is being equipped with high dielectric thin film layer 403 and the first oxide layer
It is formed in 404 first groove 406 and runs through first oxide layer 404, the high dielectric thin film layer 403 and part described second
The connecting groove 410 of oxide layer 401 is equipped with the first metal layer in first oxide layer 404 and in the connecting groove 410
405, aluminum wiring board 408 is equipped on the first metal layer 405 of the connecting groove 410, the aluminum wiring board 408 passes through institute
State 403 electricity of the high dielectric thin film layer that 410 side wall of the first metal layer 405 and the connecting groove in connecting groove 410 exposes
Connection provides voltage when voltage to apply on the aluminum wiring board 408 for the high dielectric thin film layer 403.
In a specific embodiment, the first metal layer 405 can be tungsten layer.The light-proofness of tungsten is good, prevent light into
Enter non-pixel areas.Certainly, the metal that the first metal layer 405 can also be good for other light-proofness, the present invention are without limitation.
The embodiment of the present invention aluminum wiring board 408 passes through the first metal layer 405 in the connecting groove 410 and the wiring
The high dielectric thin film layer 403 that 410 side wall of slot exposes is electrically connected, and can be when applying voltage on the aluminum wiring board 408
The high dielectric thin film layer 403 provides voltage, makes to generate between the high dielectric thin film layer 403 and the substrate 402 higher than only
Potential difference when with high dielectric thin film layer keeps the substrate 402 stronger to the constraint ability of electronics, thus preferably by additional electric
Beamlet is tied to the surface of the substrate 402, can not be injected into silicon, to preferably reduce white point and dark current, is substantially improved
Optical property.
As a kind of preferred embodiment, second for being isolated between pixel unit is also formed in the substrate 402
Groove 407.Further, there is pre-determined distance between the bottom of the second groove 407 and the bottom surface of the substrate 402.?
In a kind of specific embodiment, including at least four second grooves 407, at least four second groove 407
Every four second grooves 407 form a rectangular area, and a pixel unit is enclosed in it by each rectangular area
In.
The present embodiment can prevent electronics between adjacent pixel unit by being isolated between 407 pixel unit of second groove
Crosstalk, to promote the optical property and electric property of CMOS type imaging sensor.
Certainly, the quantity of the corresponding second groove 407 of each pixel unit is not limited to four, can also be more,
Such as five, six, the present embodiment is without limitation.
It is worth noting that the buffer action of second groove 407 because the substance difference filled in second groove 407 without
Together, the isolation, which can be divided into, is optically isolated and electrical isolation, and lighttight metal is filled in second groove 407 can be used for optics
Isolation, nonconducting silica is filled in second groove 407 can be used for electrical isolation.
In a specific embodiment, the width range of the second groove 407 is 70-150nm, the second groove
407 depth bounds are 1500-2500nm.The width and depth of second groove 407 can be specifically arranged as needed, the present invention couple
This is with no restrictions.
It further include the second metal layer 409 being formed in second oxide layer 401 as a kind of preferred embodiment；
The aluminum wiring board 408 is electrically connected by the first metal layer 405 and the second metal layer 409.
It is worth noting that the substrate can be silicon base.
Fig. 5 is the flow chart of the production method for the CMOS type imaging sensor that one embodiment of the invention provides.
The production method of CMOS type imaging sensor as shown in Figure 5, comprising:
The second oxide layer 401 below S501, one substrate 402 of offer and the substrate 402；
S502, photoresist is coated in the upper surface of described substrate 402, using a mask plate to the photoetching in the substrate 402
Glue is exposed development, to form the first pattern on the photoresist of the substrate 402；
It is worth noting that having the first mask pattern corresponding with the first pattern on the mask plate；
The first pattern formed on S503, the photoresist according to the substrate 402 performs etching the substrate 402, removes
The photoresist in the substrate 402 is removed, forms first groove 406 in the substrate 402, the first groove 406 runs through institute
State substrate 402 and part second oxide layer 401；
S504, it is sequentially depositing high dielectric thin film layer 403 from the bottom to top in the substrate 402 and the first groove 406
With the first oxide layer 404, formed in the first groove 406 for being deposited with the high dielectric thin film layer 403 and the first oxide layer 404
Through the connecting groove 410 of first oxide layer 404, the high dielectric thin film layer 403 and part second oxide layer 401；
The prior art can be used in the forming method of the connecting groove, is formed by exposure, development, etching, the present embodiment is not
It is described in detail again.
S505, the first metal layer 405 is deposited in first oxide layer 404 and in the connecting groove 410, described
Deposited aluminum layer on the first metal layer 405 in connecting groove 410, forms aluminum wiring board 408, and the aluminum wiring board 408 passes through described
The high dielectric thin film layer 403 that the first metal layer 405 and 410 side wall of the connecting groove in connecting groove 410 expose is electrically connected
It connects.
It is worth noting that existing method, this implementation can be used in the specific method of the step S501-S505 in the present embodiment
Example is no longer described in detail.
The production method of the CMOS type imaging sensor of the present embodiment, is initially formed first groove 406, in the substrate 402
With high dielectric thin film layer 403 and the first oxide layer 404 are sequentially depositing in the first groove 406 from the bottom to top, deposition
It states and is formed in the first groove 406 of high dielectric thin film layer 403 and the first oxide layer 404 through first oxide layer 404, described
The connecting groove 410 of high dielectric thin film layer 403 and part second oxide layer 401, in first oxide layer 404 and institute
It states and deposits the first metal layer 405, the deposited aluminum layer on the first metal layer 405 in the connecting groove 410, shape in connecting groove 410
At aluminum wiring board 408, high dielectric thin film layer 403 is remained at first groove 406, so that aluminum wiring board 408 be allow to pass through
The high dielectric thin film layer 403 that the first metal layer 405 and 410 side wall of the connecting groove in the connecting groove 410 expose
Electrical connection, and then voltage can be provided for the high dielectric thin film layer 403 when applying voltage on the aluminum wiring board 408, make institute
The potential difference generated when being higher than only with high dielectric thin film layer between high dielectric thin film layer 403 and the substrate 402 is stated, the base is made
Bottom 402 is stronger to the constraint ability of electronics, so that extra electron to be preferably strapped in the surface of the substrate 402, can not infuse
Enter into silicon, to preferably reduce white point and dark current, optical property is substantially improved.
As a kind of preferred embodiment, after the step S501, before the step S502, the method also includes:
Second metal layer 409 is formed in second oxide layer 401；
Then, the method also includes:
The aluminum wiring board 408 is electrically connected by the first metal layer 405 and the second metal layer 409.
It is worth noting that the substrate can be silicon base.
Fig. 6 be another embodiment of the present invention provides CMOS type imaging sensor production method flow chart.
The production method of CMOS type imaging sensor as shown in FIG. 6, comprising:
The second oxide layer 401 below S601, one substrate 402 of offer and the substrate 402；
S602, photoresist is coated in the upper surface of described substrate 402, using a mask plate to the photoetching in the substrate 402
Glue is exposed development, to form first pattern and the second pattern on the photoresist of the substrate 402；First pattern
Area is greater than the area of second pattern；
It is worth noting that on the mask plate have the first mask pattern corresponding with the first pattern and with the second pattern
Corresponding second mask pattern.
The first pattern and the second pattern formed on S603, the photoresist according to the substrate 402 to the substrate 402 into
Row etching, removes the photoresist in the substrate 402, and first groove 406 and second groove 407 are formed in the substrate 402,
The first groove 406 run through the substrate 402 and part second oxide layer 401, the bottom of the second groove 407 with
There is pre-determined distance between the bottom surface of the substrate 402；
S604, it is sequentially depositing high dielectric thin film layer from the bottom to top in the upper surface of the substrate 402 and the first groove 406
403 and first oxide layer 404, in the first groove 406 for being deposited with the high dielectric thin film layer 403 and the first oxide layer 404
Form the connecting groove through first oxide layer 404, the high dielectric thin film layer 403 and part second oxide layer 401
410；
In this step, one layer of high dielectric thin film layer 403, the first oxide layer can be also deposited in the second groove 407
404 enter in second groove 407, but cannot fill up, and there are gaps for meeting.
The prior art can be used in the forming method of the connecting groove, is formed by exposure, development, etching, the present embodiment is not
It is described in detail again.
S605, the first metal layer 405 is deposited in first oxide layer 404 and in the connecting groove 410, described
Deposited aluminum layer on the first metal layer 405 in connecting groove 410, forms aluminum wiring board 408, and the aluminum wiring board 408 passes through described
The high dielectric thin film layer 403 that the first metal layer 405 and 410 side wall of the connecting groove in connecting groove 410 expose is electrically connected
It connects.
In this step, the first metal layer 405 enters in the above-mentioned gap of second groove 407, and second groove 407 is filled out
It is full.
Existing method can be used in the specific method of step S601-S605 in the present embodiment, and the present embodiment is no longer described in detail.
The production method of the CMOS type imaging sensor of the present embodiment, is initially formed first groove 406, in the substrate 402
With high dielectric thin film layer 403 and the first oxide layer 404 are sequentially depositing in the first groove 406 from the bottom to top, deposition
It states and is formed in the first groove 406 of high dielectric thin film layer 403 and the first oxide layer 404 through first oxide layer 404, described
The connecting groove 410 of high dielectric thin film layer 403 and part second oxide layer 401, in first oxide layer 404 and institute
It states and deposits the first metal layer 405, the deposited aluminum layer on the first metal layer 405 in the connecting groove 410, shape in connecting groove 410
At aluminum wiring board 408, high dielectric thin film layer 403 is remained at first groove 406, so that aluminum wiring board 408 be allow to pass through
The high dielectric thin film layer 403 that the first metal layer 405 and 410 side wall of the connecting groove in the connecting groove 410 expose
Electrical connection, and then voltage can be provided for the high dielectric thin film layer 403 when applying voltage on the aluminum wiring board 408, make institute
The potential difference generated when being higher than only with high dielectric thin film layer between high dielectric thin film layer 403 and the substrate 402 is stated, the base is made
Bottom 402 is stronger to the constraint ability of electronics, so that extra electron to be preferably strapped in the surface of the substrate 402, can not infuse
Enter into silicon, to preferably reduce white point and dark current, optical property is substantially improved.And the present embodiment is according to etching
Loading effect phenomenon (load effect, because etch rate and Etching profile are related with dimension of picture and density and generate
Etching relevant to depth-to-width ratio or micro loading effect, i.e. pattern area is bigger, and the groove for etching formation is deeper, and pattern area is got over
Small, the groove for etching formation is more shallow), it is different using the first mask pattern and the second mask pattern area, on a mask plate
There is the first mask pattern and the second mask pattern simultaneously, form the different first groove of depth with single exposure, development, etching
406 and second groove 407, technique is simplified, is reduced costs.
As a kind of preferred embodiment, the second groove 407 is the second groove for being isolated between pixel unit
407；
Then, the method also includes:
Etch the first metal layer 405, first oxide layer 404 and the height between the second groove 407
Dielectric film layers 403 are formed between the metal grate for making light enter the entering light of pixel unit with forming metal grate
Area 411.
The present embodiment can make light enter pixel region by the entering light area 411 between metal grate.
It is worth noting that the buffer action of second groove 407 because the substance difference filled in second groove 407 without
Together, the isolation, which can be divided into, is optically isolated and electrical isolation, and lighttight metal is filled in second groove 407 can be used for optics
Isolation, nonconducting silica is filled in second groove 407 can be used for electrical isolation.
As a kind of preferred embodiment, the method also includes:
It is sequentially depositing 403 He of high dielectric thin film layer from the bottom to top in the upper surface of the substrate 402 and the first groove 406
While first oxide layer 404, it is sequentially depositing 403 He of high dielectric thin film layer from the bottom to top in the upper surface of described second groove 407
First oxide layer 404.
It is sequentially depositing high dielectric thin film layer 403 and the first oxide layer from the bottom to top in the upper surface of described second groove 407
404, convenient for the needs of subsequent technique.
As a kind of preferred embodiment, after the step S601, before the step S602, the method also includes:
Second metal layer 409 is formed in second oxide layer 401；
The method also includes:
The aluminum wiring board 408 is electrically connected by the first metal layer 405 and the second metal layer 409.
It is worth noting that the substrate can be silicon base.
The present invention is initially formed first groove, is sequentially depositing high dielectric from the bottom to top in the substrate and the first groove
Film layer and the first oxide layer form in the first groove for being deposited with the high dielectric thin film layer and the first oxide layer and run through institute
The connecting groove for stating the first oxide layer, the high dielectric thin film layer and part second oxide layer, in first oxide layer
And the first metal layer is deposited in the connecting groove, the deposited aluminum layer on the first metal layer in the connecting groove forms aluminium and connects
Line plate remains high dielectric thin film layer at first groove, so that aluminum wiring board be allow to pass through first in the connecting groove
The high dielectric thin film layer electrical connection that metal layer and the wiring groove sidewall expose, and then apply on the aluminum wiring board
Voltage can be provided for the high dielectric thin film layer when voltage, make to generate between the high dielectric thin film layer and the substrate higher than only
Potential difference when with high dielectric thin film layer keeps the substrate stronger to the constraint ability of electronics, thus preferably by extra electron
It is strapped in the surface of the substrate, can not be injected into silicon, to preferably reduce white point and dark current, is substantially improved optical
Energy.
The above description is merely a specific embodiment, and still, protection scope of the present invention is not limited to this, appoints
What those familiar with the art in the technical scope disclosed by the present invention, the variation or substitution that can be readily occurred in, all
It is covered by the protection scope of the present invention.Therefore, protection scope of the present invention should be with the scope of protection of the claims
Subject to.
Claims (12)
1. a kind of CMOS type imaging sensor characterized by comprising the second oxide layer (401) and be located at it is described second oxidation
Substrate (402) on layer (401)；
The substrate (402) is located at the side of second oxide layer (401), has on the substrate (402) and is recessed to downwards
The first groove (406) of second oxide layer (401), in the substrate (402) and the first groove (406) by down toward
On be successively arranged high dielectric thin film layer (403) and the first oxide layer (404), be equipped with high dielectric thin film layer (403) and the first oxygen
Change layer (404) first groove (406) on formed through first oxide layer (404), the high dielectric thin film layer (403) and
The connecting groove (410) of part second oxide layer (401), on first oxide layer (404) and the connecting groove
(410) the first metal layer (405) are equipped in, al wiring is equipped on the first metal layer (405) of the connecting groove (410)
Plate (408), the aluminum wiring board (408) pass through the first metal layer (405) and the connecting groove in the connecting groove (410)
(410) the high dielectric thin film layer (403) electrical connection that side wall exposes, to apply voltage on the aluminum wiring board (408)
When for the high dielectric thin film layer (403) provide voltage.
2. CMOS type imaging sensor according to claim 1, which is characterized in that also formed on the substrate (402)
There is the second groove (407) for being isolated between pixel unit.
3. CMOS type imaging sensor according to claim 2, which is characterized in that the bottom of the second groove (407)
There is pre-determined distance between the bottom surface of the substrate (402).
4. the CMOS type imaging sensor according to any one of claim 2-3, which is characterized in that including at least four institutes
It states second groove (407), second groove (407) composition of every four at least four second groove (407)
One rectangular area, each rectangular area surround a pixel unit wherein.
5. CMOS type imaging sensor according to claim 1, which is characterized in that the first metal layer (405) is tungsten
Layer.
6. CMOS type imaging sensor according to claim 1, which is characterized in that further include being formed in second oxidation
Second metal layer (409) in layer (401)；
The aluminum wiring board (408) is electrically connected by the first metal layer (405) and the second metal layer (409).
7. a kind of production method of CMOS type imaging sensor characterized by comprising
The second oxide layer (401) of one substrate (402) and the substrate (402) below is provided；
Photoresist is coated in the upper surface of described substrate (402), the photoresist on the substrate (402) is carried out using a mask plate
Exposure development, to form the first pattern on the photoresist of the substrate (402)；
The substrate (402) is performed etching according to the first pattern formed on the photoresist of the substrate (402), described in removing
Photoresist in substrate (402) is formed first groove (406) on the substrate (402), and the first groove (406) is run through
The substrate (402) and part second oxide layer (401)；
It is sequentially depositing high dielectric thin film layer (403) and from the bottom to top in the substrate (402) and the first groove (406)
One oxide layer (404)；
It is formed in the first groove (406) for being deposited with the high dielectric thin film layer (403) and the first oxide layer (404) and runs through institute
State the connecting groove of the first oxide layer (404), the high dielectric thin film layer (403) and part second oxide layer (401)
(410)；
The first metal layer (405) are deposited on first oxide layer (404) and in the connecting groove (410), are connect described
Deposited aluminum layer on the first metal layer (405) in wire casing (410) is formed aluminum wiring board (408), and the aluminum wiring board (408) is logical
The high dielectric that the first metal layer (405) and the connecting groove (410) side wall crossed in the connecting groove (410) expose is thin
Film layer (403) electrical connection.
8. the method according to the description of claim 7 is characterized in that providing a substrate (402) and the substrate (402) below
The second oxide layer (401) after, the upper surface of described substrate (402) coat photoresist, using a mask plate to the substrate
(402) photoresist on is exposed before development, the method also includes:
Second metal layer (409) are formed in second oxide layer (401)；
Then, the method also includes:
The aluminum wiring board (408) is electrically connected by the first metal layer (405) with the second metal layer (409).
9. a kind of production method of CMOS type imaging sensor characterized by comprising
The second oxide layer (401) of one substrate (402) and the substrate (402) below is provided；
Photoresist is coated in the upper surface of described substrate (402), the photoresist on the substrate (402) is carried out using a mask plate
Exposure development, to form first pattern and the second pattern on the photoresist of the substrate (402)；The area of first pattern
Greater than the area of second pattern；
The substrate (402) is carved according to the first pattern and the second pattern formed on the photoresist of the substrate (402)
Erosion, removes the photoresist on the substrate (402), forms first groove (406) and second groove on the substrate (402)
(407), the first groove (406) runs through the substrate (402) and part second oxide layer (401), second ditch
There is pre-determined distance between the bottom of slot (407) and the bottom surface of the substrate (402)；
It is sequentially depositing high dielectric thin film layer (403) from the bottom to top in the upper surface of the substrate (402) and the first groove (406)
With the first oxide layer (404)；
It is formed in the first groove (406) for being deposited with the high dielectric thin film layer (403) and the first oxide layer (404) and runs through institute
State the connecting groove of the first oxide layer (404), the high dielectric thin film layer (403) and part second oxide layer (401)
(410)；
The first metal layer (405) are deposited on first oxide layer (404) and in the connecting groove (410), are connect described
Deposited aluminum layer on the first metal layer (405) in wire casing (410) is formed aluminum wiring board (408), and the aluminum wiring board (408) is logical
The high dielectric that the first metal layer (405) and the connecting groove (410) side wall crossed in the connecting groove (410) expose is thin
Film layer (403) electrical connection.
10. according to the method described in claim 9, it is characterized in that, the second groove (407) is between pixel unit
The second groove (407) of isolation；
Then, the method also includes:
Etch the first metal layer (405) between the second groove (407), first oxide layer (404) and described
High dielectric thin film layer (403) is formed between the metal grate for making light enter pixel unit with forming metal grate
Entering light area.
11. according to the method described in claim 9, it is characterized in that, the method also includes:
It is sequentially depositing high dielectric thin film layer (403) from the bottom to top in the upper surface of the substrate (402) and the first groove (406)
While with the first oxide layer (404), it is sequentially depositing high dielectric thin film layer from the bottom to top in the upper surface of described second groove (407)
(403) and the first oxide layer (404).
12. according to the method described in claim 9, it is characterized in that it provides under a substrate (402) and the substrate (402)
After second oxide layer (401) in face, photoresist is coated in the upper surface of described substrate (402), using a mask plate to the base
Photoresist on bottom (402) is exposed before development, the method also includes:
Second metal layer (409) are formed in second oxide layer (401)；
Then, the method also includes:
The aluminum wiring board (408) is electrically connected by the first metal layer (405) and the second metal layer (409).
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201810090280.8A CN108269818B (en) | 2018-01-30 | 2018-01-30 | A kind of CMOS type imaging sensor and preparation method thereof |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201810090280.8A CN108269818B (en) | 2018-01-30 | 2018-01-30 | A kind of CMOS type imaging sensor and preparation method thereof |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN108269818A CN108269818A (en) | 2018-07-10 |
| CN108269818B true CN108269818B (en) | 2019-01-18 |
Family
ID=62777100
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201810090280.8A Active CN108269818B (en) | 2018-01-30 | 2018-01-30 | A kind of CMOS type imaging sensor and preparation method thereof |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN108269818B (en) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110634898A (en) * | 2019-09-23 | 2019-12-31 | 上海华力微电子有限公司 | A deep silicon trench for backside illuminated image sensor and method of forming the same |
Family Cites Families (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR100884903B1 (en) * | 2007-09-06 | 2009-02-19 | 주식회사 동부하이텍 | Image sensor and its manufacturing method |
| KR100997299B1 (en) * | 2007-09-07 | 2010-11-29 | 주식회사 동부하이텍 | Image sensor and manufacturing method |
| JP2014120627A (en) * | 2012-12-17 | 2014-06-30 | Rohm Co Ltd | Photoelectric conversion device and method of manufacturing the same |
| JP2015177155A (en) * | 2014-03-18 | 2015-10-05 | セイコーエプソン株式会社 | Photoelectric conversion device and electronic apparatus |
| CN103972257B (en) * | 2014-05-29 | 2017-01-04 | 豪威科技(上海)有限公司 | Preparation method of stacked image sensor |
-
2018
- 2018-01-30 CN CN201810090280.8A patent/CN108269818B/en active Active
Also Published As
| Publication number | Publication date |
|---|---|
| CN108269818A (en) | 2018-07-10 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN105405856B (en) | Solid-state imaging device, manufacturing method of solid-state imaging device, and electronic device | |
| CN106057832B (en) | Stacked grid for more consistent light input | |
| CN106252323B (en) | Flat pad structure for integrated CMOS (CMOS) image sensor process | |
| CN108962924A (en) | The method for forming the influx and translocation structure of imaging sensor | |
| CN109427832A (en) | Image sensor integrated chip | |
| CN109037289A (en) | Display base plate and preparation method thereof, display panel | |
| CN111029357B (en) | Semiconductor structure and preparation method thereof | |
| CN119050123B (en) | Method for preparing multi-size grooves, method for preparing back-illuminated image sensor | |
| CN108269818B (en) | A kind of CMOS type imaging sensor and preparation method thereof | |
| CN105914216B (en) | A kind of image sensor structure and preparation method thereof | |
| CN106298829A (en) | A kind of forming method of metal grate | |
| JP4863214B2 (en) | Manufacturing method of electronic chip made of thinned silicon | |
| JP2015041711A (en) | Manufacturing method of semiconductor device | |
| CN109585481A (en) | Image sensor structure and preparation method thereof | |
| JP6141065B2 (en) | Solid-state imaging device and imaging system | |
| CN115458545A (en) | Back-illuminated CMOS image sensor and manufacturing method thereof | |
| CN105097858B (en) | Back-illuminated type chromatic image sensor and its manufacture method | |
| CN110137198A (en) | A color polarization CMOS image sensor and its manufacturing method | |
| US9455297B2 (en) | Preparation process of image sensors | |
| CN100530596C (en) | Semiconductor device with microlens and method for manufacturing the same | |
| US20120018831A1 (en) | Light pipe fabrication with improved sensitivity | |
| CN117096164A (en) | Image sensor and method for manufacturing the same | |
| JP7055902B2 (en) | Photoelectric detector and its manufacturing method, image sensor | |
| CN101308815A (en) | Image sensor structure and manufacturing method thereof | |
| CN223415221U (en) | Miniature LED structure and display device |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant | ||
| CP03 | Change of name, title or address |
Address after: 430205 No. 18, Gaoxin 4th Road, Donghu high tech Development Zone, Wuhan City, Hubei Province Patentee after: Wuhan Xinxin Integrated Circuit Co.,Ltd. Country or region after: China Address before: 430205 No. 18, Gaoxin 4th Road, Donghu high tech Development Zone, Wuhan City, Hubei Province Patentee before: Wuhan Xinxin Semiconductor Manufacturing Co.,Ltd. Country or region before: China |
|
| CP03 | Change of name, title or address |