CN108259804B - Video output system and related video signal compensation method - Google Patents
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- H04N5/00—Details of television systems
- H04N5/76—Television signal recording
- H04N5/91—Television signal processing therefor
- H04N5/92—Transformation of the television signal for recording, e.g. modulation, frequency changing; Inverse transformation for playback
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- H—ELECTRICITY
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- H04N5/00—Details of television systems
- H04N5/76—Television signal recording
- H04N5/91—Television signal processing therefor
- H04N5/93—Regeneration of the television signal or of selected parts thereof
- H04N5/932—Regeneration of analogue synchronisation signals
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N5/00—Details of television systems
- H04N5/76—Television signal recording
- H04N5/91—Television signal processing therefor
- H04N5/93—Regeneration of the television signal or of selected parts thereof
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Abstract
一种视频输出系统，连接至一电视。此视频输出系统，包括：一控制电路、一数字‑模拟转换器与一比较电路。该控制电路根据一增益值将一第一数字视频信号补偿为一第二数字视频信号。数字‑模拟转换器接收该第二数字视频信号并产生一模拟视频信号。比较电路于一校正程序时比较一参考电压与该模拟视频信号，并产生一比较结果信号至该控制电路。于该校正程序时，该控制电路根据该比较结果信号将该第二数字视频信号由一预设数字码变化至一目标数字码，并根据该预设数字码与该目标数字码来获得该增益值。
A video output system connected to a television. The video output system includes: a control circuit, a digital-to-analog converter and a comparison circuit. The control circuit compensates a first digital video signal to a second digital video signal according to a gain value. The digital-to-analog converter receives the second digital video signal and generates an analog video signal. The comparison circuit compares a reference voltage with the analog video signal during a calibration procedure, and generates a comparison result signal to the control circuit. During the calibration process, the control circuit changes the second digital video signal from a preset digital code to a target digital code according to the comparison result signal, and obtains the gain according to the preset digital code and the target digital code value.
Description
Technical Field
The present invention relates to a video output system and a related method, and more particularly, to a video output system with compensation function and a related video signal compensation method.
Background
Generally, a video output system of a multimedia device is configured with signal output interfaces of various specifications. According to the signal input interface on the television, a signal line (cable) is connected to the signal output interface of the video output system. In the case of a video output system, a variety of analog video signals are provided, including: composite Video Broadcast Signal (CVBS), Separate Video Signal (S-Video), and bright color component Signal (YUV) or red, green and blue component Signal (RGB).
As described above, the video output system performs processing in a digital format, but a general television performs playback and display in an analog format. Therefore, the video output system needs to convert the signal format first; in the prior art, a Digital-to-Analog Converter (DAC) is designed to convert a Digital video signal (Digital video signal) into an Analog video signal (Analog video signal).
Referring to fig. 1, a conventional video output system is shown. The video output system 100 is connected to a television 150 with a signal line 120. The video output system 100 includes a control circuit 102, a digital-to-analog converter 104, and a composite video signal output impedance 106. The digital-to-analog converter 104 is connected between the control circuit 102 and the output terminal a of the video output system 100. The composite video signal output impedance 106 is connected between the output terminal a of the video output system 100 and ground. One end of the signal line 120 is connected to the output terminal a of the video output system 100, and the other end of the signal line 120 is connected to the composite video signal input impedance 152 of the television 150.
When the video output system 200 operates normally, the control circuit 102 generates the digital video signal Sd to the digital-to-analog converter 104. And the digital-to-analog converter 104 converts the digital video signal Sd into an analog video signal Sa and delivers it to the output terminal a of the video output system 100. Finally, the analog video signal Sa is transferred to the composite video signal input impedance 152 of the television 150 via the signal line 120, so that the television 150 restores the analog video signal Sa according to the voltage across the composite video signal input impedance 152. The analog Video signal Sa may be one of a Composite Video Broadcast Signal (CVBS), a color-and-brightness separation signal (S-Video), a color-and-brightness component signal (YUV), or a red, green, and blue component signal (RGB).
For optimal impedance matching, the composite video signal output impedance 106 of the video output system 100 and the composite video signal input impedance 152 of the television 150 have the same impedance, e.g., both 75 ohms.
However, since the output accuracy of the digital-to-analog converter 104 is affected by the process deviation (variation), when the digital-to-analog converter 104 is manufactured, it is not possible to determine whether the digital-to-analog converter 104 has the accurate (cure) output capability. If the dac 104 has no accurate output capability, it will cause an error of the analog video signal Sa, and when the analog video signal Sa is displayed on the screen of the television 150, the picture quality will be degraded, which may affect the visual appearance. Therefore, to ensure picture quality, the specification therefore specifies that the analog video signal S a has to have an error of less than 1%.
For example, assume that a digital-to-analog converter 104 with accurate output capability can convert the first digital code into the first voltage value. The converted voltage value of the digital-to-analog converter 104 without accurate output capability may be smaller or larger than the first voltage value. The digital-to-analog converter 104 will cause an error in the analog video signal S a whether the converted voltage value is smaller or larger than the first voltage value.
To solve the above problem, the manufacturer of the multimedia device must first perform testing and adjusting operations on the digital-to-analog converter 104 before assembling the multimedia device. After the testing and adjusting operations, it can be confirmed that the digital-to-analog converter 104 has accurate output capability. The tested digital-to-analog converter 104 can be assembled to the multimedia device, and the video output system 100 of the multimedia device can output the analog video signal Sa within the error range.
However, the testing and adjusting operations need to be performed by a testing machine or manually, which not only wastes time but also increases the manufacturing cost of the multimedia device.
Disclosure of Invention
The invention relates to a video output system and a video signal compensation method thereof. The invention can directly assemble the digital-analog converter in the video output system without testing and adjusting the digital-analog converter first. The control circuit in the video output system can perform a calibration procedure on the digital-to-analog converter to ensure that the output analog video signal is within an error range.
The invention provides a video output system, which is connected to a television and comprises: a control circuit, which compensates a first digital video signal into a second digital video signal according to a gain value; a digital-to-analog converter for receiving the second digital video signal and generating an analog video signal; and a comparison circuit, comparing a reference voltage with the analog video signal during a calibration procedure, and generating a comparison result signal to the control circuit; during the calibration procedure, the control circuit adjusts the second digital video signal from a preset digital code to a target digital code according to the comparison result signal, and obtains the gain value according to the preset digital code and the target digital code.
The invention further provides a video signal compensation method, which comprises the following steps: providing a preset digital code to a digital-analog converter during a correction procedure, so that the digital-analog converter generates a voltage value; when the voltage value is not equal to a reference voltage, changing the digital code until the voltage value generated by the digital-analog converter is equal to the reference voltage, stopping changing the digital code, and setting the digital code as a target digital code; obtaining a gain value according to the preset digital code and the target digital code; and compensating a first digital video signal into a second digital video signal according to the gain value, and providing the second digital video signal to the digital-to-analog converter to generate an analog video signal.
In order to better understand the above and other aspects of the present invention, the following detailed description of the preferred embodiments is made with reference to the accompanying drawings:
drawings
Fig. 1 is a schematic diagram of a conventional video output system.
FIG. 2 is a schematic diagram of a video output system according to the present invention.
FIG. 3 is a schematic diagram illustrating a time point of performing a calibration procedure in the video output system according to the present invention.
FIG. 4A is a flowchart illustrating a video signal compensation method according to the present invention.
FIG. 4B is a flow chart of a method for changing a digital code.
FIG. 5 shows an example of a calibration procedure using dichotomy.
Description of the reference numerals
100. 200: video output system
102. 202: control circuit
104. 204: digital-to-analog converter
106. 206: composite video signal output impedance
150: television receiver
152: composite video signal input impedance
210: comparison circuit
212: reference voltage source
214: digital code converter
Detailed Description
Referring to fig. 2, a schematic diagram of a video output system according to the present invention is shown. The video output system 200 is connected to the television 150 with a signal line 120. The video output system 200 includes a control circuit 202, a digital-to-analog converter 204, a composite video signal output impedance 206, a comparison circuit 210 and a reference voltage source 212. The digital-to-analog converter 204 is connected between the control circuit 202 and the output terminal a of the video output system 200. The composite video signal output impedance 206 is connected between the output terminal a of the video output system 200 and ground. Furthermore, a first input terminal of the comparison circuit 210 receives the reference voltage Vref outputted by the reference voltage source 212, a second input terminal of the comparison circuit 210 is connected to the output terminal a of the video output system 200, and an output terminal of the comparison circuit 210 generates the comparison result signal R to the control circuit 202. One end of the signal line 120 is connected to the output terminal a of the video output system 200, and the other end of the signal line 120 is connected to the composite video signal input impedance 152 of the television 150.
The video output system 200 of the present invention is calibrated for a 10 bit (bit) digital-to-analog converter 204. The following embodiments are described with reference to a 10-bit (bit) digital-to-analog converter 204. Of course, the present invention is not limited thereto.
The 10-bit (bit) DAC 204 has a resolution (resolution) of 1/210. Therefore, the output of each stage of the DAC 204 varies by Vs/1024. Wherein Vs is an operating voltage (operation voltage) of the digital-to-analog converter 204. For example, assuming that the operating voltage Vs is 1.3V, when the digital code received by the digital-to-analog converter 204 is "788", the voltage generated by the digital-to-analog converter 204 is 1.3V (788/1024) × 1V.
The video output system 200 of the present invention utilizes a predetermined digital code "788" to anticipate that the digital-to-analog converter 204 can generate a potential of 1V. And generates a reference voltage Vref of exactly 1V using the reference voltage source 212. Therefore, the comparison result signal R generated by the comparison circuit 210 indicates whether the digital-to-analog converter 204 can generate the expected 1V potential, and is used as a basis for the subsequent calibration of the control circuit 202.
In one embodiment, when the digital video signal Sd' is the predetermined digital code "788", the digital-to-analog converter 204 generates the analog video signal Sa with a potential of 1V. However, when the digital-to-analog converter 204 is less accurate due to process drift, the digital-to-analog converter 204 receives the predetermined digital code "788", and the generated analog video signal Sa has an error, for example, may be greater than 1V or less than 1V. Therefore, in one embodiment, the control circuit 202 may adjust the digital code until the digital code is adjusted enough for the digital-to-analog converter 204 to generate the 1V analog video signal Sa. And the digital code at this time is the target digital code.
Then, the control circuit 202 calculates the gain value G according to the relationship between the predetermined digital code and the target digital code. The digital video signal adjuster 214 compensates the digital video signal Sd into a digital video signal Sd' according to the gain value G. Therefore, it is ensured that the analog video signal Sa will be within the error range. The correction procedure of the video output system 200 is described in detail below.
In one embodiment, the video output system 200 enters the calibration process before the normal operation process. When the control circuit 202 performs the correction procedure, the digital video signal Sd is not generated in the control circuit 202, so the control circuit 202 only changes the digital code in the digital video signal Sd'. First, the control circuit 202 inputs a preset digital code (e.g., "788") as the digital video signal Sd' to the digital-to-analog converter 204, and the digital-to-analog converter 204 correspondingly generates a voltage value as the analog video signal Sa. Then, the comparison circuit 210 compares the reference voltage Vref with the analog video signal Sa and generates a comparison result signal R to the control circuit 202.
In one embodiment, assuming that the predetermined digital code is "788" and assuming that the digital-to-analog converter 204 has accurate output capability, the digital-to-analog converter 204 correspondingly generates the 1V analog video signal Sa according to the predetermined digital code. The comparison result signal R generated by the comparison circuit 210 indicates that the analog video signal Sa is equal to the reference voltage Vref. At this time, the preset digital code "788" is set as the target digital code and recorded in the control circuit 202.
In addition, it is assumed that the analog video signal Sa generated by the digital-analog converter 204 according to the preset digital code "788" is less than 1V. The comparison result signal R generated by the comparison circuit 210 correspondingly indicates that the analog video signal Sa is smaller than the reference voltage Vref. It is to be understood that the analog video signal Sa generated by the digital-to-analog converter 204 according to the preset digital code "788" is assumed to be greater than 1V. The comparison result signal R generated by the comparison circuit 210 correspondingly indicates that the analog video signal Sa is greater than the reference voltage Vref.
In this embodiment, when the control circuit 202 determines that the analog video signal Sa corresponding to the preset digital code is smaller than 1V, the control circuit 202 correspondingly adds the digital code (e.g., to "988") as the digital video signal Sd' to the digital-to-analog converter 204, and receives the comparison result signal R again through the comparison circuit 210.
It is understood that in this embodiment, when the control circuit 202 determines that the analog video signal Sa corresponding to the preset digital code is greater than 1V, the control circuit 202 correspondingly reduces the digital code (for example, to "588") to be the digital video signal Sd' to the digital-to-analog converter 204, and receives the comparison result signal R again through the comparison circuit 210.
After the digital codes are corrected for many times, when the comparison result signal R indicates that the analog video signal Sa is equal to 1V, the last digital code is the target digital code and is recorded in the control circuit 202.
When the control circuit 202 determines the target digital code, a gain value (gain) G is generated, wherein the gain value is the target digital code divided by the predetermined digital code. And the gain value G is passed to the digital video signal adjuster 214.
Then, when the video output system 200 is operating normally, the digital video signal Sd generated by the control circuit 202 is compensated to be the digital video signal Sd' by the digital video signal adjuster 214. And the digital-to-analog converter 204 generates the analog video signal Sa to the television 150 according to the digital video signal Sd'. Basically, the digital video signal adjuster 214 is a multiplier that multiplies the digital video signal Sd by the gain value G to obtain a digital video signal Sd'.
As can be seen from the above description, when the video output system 200 performs the calibration procedure, the control circuit 202 provides a predetermined digital code as the digital video signal Sd' and adjusts the digital code according to the comparison result signal R. Further, the control circuit 202 continuously changes the digital code and provides it to the digital-to-analog converter 204. When the control circuit 202 provides a target digital code as the digital video signal Sd' and the comparison result signal R confirms that the voltage value of the analog video signal Sa is equal to the reference voltage Vref, the control circuit 202 obtains the gain value G according to the preset digital code and the target digital code.
Furthermore, after the video output system 200 is calibrated, when the video output system 200 is operating normally, the digital video signal adjuster 214 compensates the digital video signal Sd into a digital video signal Sd' according to the gain value G. Therefore, it is ensured that the analog video signal Sa generated by the digital-analog converter 204 will be within the error range.
Fig. 3 is a schematic time chart illustrating a calibration procedure performed by the video output system according to the present invention. For convenience of explanation, the following description will be made with reference to fig. 2. The analog video signal Sa includes a horizontal synchronization signal, and a video signal according to the specification of the specification. Wherein the horizontal synchronization signal includes a horizontal blanking interval (horizontal blanking interval) and the vertical synchronization signal includes a vertical blanking interval (vertical blanking interval).
When the screen of the tv 150 displays a frame (frame), the analog video signal Sa needs to have a plurality of horizontal blank sections for separating different scan lines in the screen of the tv 150. For example, assuming that the resolution of the screen of the television 150 is 1024 × 768, there are 768 horizontal blank intervals in the analog video signal Sa when one screen is displayed.
In addition, when the screen of the tv 150 displays a plurality of pictures (frames), a plurality of vertical blank intervals are required in the analog video signal Sa to separate different pictures in the screen of the tv 150. That is, between two frames, there are 1 vertical blank interval in the analog video signal.
It can be understood that the horizontal blank interval informs the video output system 200 to perform the horizontal scan line switching on the television 150, and the vertical blank interval informs the video output system 200 to perform the frame switching on the television 150. Therefore, the variation of the analog video signal Sa in the horizontal blanking interval and the horizontal blanking interval does not affect the picture quality of the screen of the television 150.
In an embodiment of the invention, the video output system 200 can perform the calibration procedure during the vertical blanking interval. As shown in fig. 3, the analog video signal Sa includes many pulses within the vertical blanking interval. The video output system 200 performs the calibration process at the high level of the pulse. That is, the video output system 200 adjusts the digital code within the vertical blanking interval and measures the voltage value of the analog video signal Sa. After adjusting the digital code for multiple times, the calibration process is completed when the voltage value of the analog video signal Sa reaches the reference voltage Vref (e.g., 1V).
Of course, except that the correction procedure is performed in a vertical blank interval. Those skilled in the art can also perform the calibration procedure in the horizontal blanking interval to achieve the same effect according to the above description.
Referring to fig. 4A, a flow chart of a video signal compensation method according to the invention is shown. The video signal compensation method of the present invention can be applied to the video output system of fig. 2.
The calibration process of the present invention is performed during a blank interval, which may be a horizontal blank interval or a vertical blank interval. First, a predetermined digital code is provided to the digital-to-analog converter 204 (step S410). Basically, the preset digital code allows the digital-to-analog converter 204 to generate a voltage value equal to the reference voltage Vref. For example, the reference voltage Vref is 1V. And the predetermined digital code provided by the control circuit 202 is "788", the digital-to-analog converter 204 is expected to generate a voltage of 1V.
Next, it is determined whether the voltage value output from the digital-to-analog converter 204 is equal to the reference voltage Vref (step S420). When the comparison circuit 210 determines that the voltage value outputted from the digital-to-analog converter 204 is not equal to the reference voltage Vref, the control circuit 202 changes the digital code and provides it to the digital-to-analog converter 204 (step S430), and returns to step S420.
When the voltage value outputted from the digital-to-analog converter 204 is equal to the reference voltage Vref, the digital code at this time is set as a target digital code (step S440). Then, a gain value G is obtained according to the default digital code and the target digital code (step S450). Basically, the gain value is the target digital code divided by the preset digital code.
Next, the digital video signal adjuster 214 in the control circuit 202 compensates a digital video signal Sd into a digital video signal Sd 'according to the gain value G, and provides the digital video signal Sd' to the digital-to-analog converter 204, and generates an analog video signal Sa (step S460).
As can be seen from the above description, the video signal compensation method of the present invention provides a predetermined digital code to the digital-to-analog converter 204 during the calibration procedure, so that the digital-to-analog converter 204 generates a voltage value. When the voltage value is not equal to the reference voltage Vref, the digital code is changed until the voltage value generated by the digital-analog converter 204 is equal to the reference voltage Vref, and the digital code is stopped from being changed and set as the target digital code. Then, a gain value G is obtained according to the preset digital code and the target digital code. Finally, the digital video signal Sd is compensated into a digital video signal Sd' according to the gain value G, and is provided to the digital-to-analog converter 204 to generate an analog video signal.
Referring to FIG. 4B, a flow chart of a method for changing a digital code is shown. First, it is determined whether the voltage value output from the digital-analog converter 204 is greater than the reference voltage Vref (step S432). When the voltage value output from the digital-to-analog converter 204 is greater than the reference voltage Vref, the control circuit 202 decreases the digital code and provides it to the digital-to-analog converter 204 (step S434); on the contrary, when the voltage value output from the digital-to-analog converter 204 is less than the reference voltage Vref, the control circuit 202 increments the digital code and provides it to the digital-to-analog converter 204 (step S436).
According to the embodiment of the present invention, the present invention is not limited to the manner of changing the digital code. For example, the control circuit may change the digital code using a binary method. Alternatively, the control circuit may change the digital code in a gradually increasing or gradually decreasing manner.
Referring to FIG. 5, a practical example of a calibration procedure using bisection is shown. In one embodiment, the reference voltage Vref is assumed to be 1V. And, when the comparison result signal R is "01", it represents that the voltage value output by the digital-analog converter is less than the reference voltage Vref. When the comparison result signal R is "10", it represents that the voltage value output by the digital-to-analog converter is greater than the reference voltage Vref. When the comparison result signal R is "00", it represents that the voltage value outputted from the digital-to-analog converter is equal to the reference voltage Vref. For convenience of explanation, the following description will be made with reference to fig. 2.
As shown in fig. 5, in this example, the default digital code is "788" and the voltage output by the digital-to-analog converter 204 is 0.94V when the calibration procedure is started. Therefore, the comparison result signal R is "01", which represents that the voltage value output by the digital-to-analog converter 204 is smaller than the reference voltage Vref.
Then, the control circuit 202 adjusts the digital code to "988", and the digital-to-analog converter 204 outputs a voltage of 1.46V based on the adjusted digital code 988. Therefore, the comparison result signal R is changed to "10" accordingly, which represents that the voltage value output by the digital-analog converter 204 is greater than the reference voltage Vref.
Then, the control circuit 202 adjusts the digital code to "888" (i.e., (788+988)/2) again in response to the comparison result, and the digital-to-analog converter 204 outputs 1.20V accordingly. In this case, the comparison result signal R remains "10", which indicates that the voltage value output by the digital-to-analog converter 204 is still greater than the reference voltage Vref.
Since the voltage value outputted from the digital-to-analog converter 204 is not equal to the reference voltage Vref, the control circuit 202 continues to adjust the digital code to "838" (i.e., (788+888)/2), and the digital-to-analog converter 204 correspondingly outputs 1.07V. After the comparison, the voltage value output by the digital-to-analog converter 204 is still greater than the reference voltage Vref, and the comparison result signal R continues to be maintained as "10".
Then, the control circuit 202 adjusts the digital code to "813" (i.e., (788+838)/2), and the digital-to-analog converter 204 outputs 1.00V accordingly. After the comparison, the comparison circuit 210 determines that the voltage value outputted from the digital-to-analog converter 204 is equal to the reference voltage Vref, and therefore, the comparison result signal R is "00".
When the control circuit receives the comparison result signal R of "00", the control circuit 202 confirms that when the digital code is "813", the digital-to-analog converter can output 1.0V. Thus, the destination digital code is "813". Also, the control circuit 202 may obtain the gain value G of 1.032(G — 813/788) based on the target digital code and the preset digital code.
In other words, during the calibration process, when the comparison result signal R indicates that the reference voltage Vref is different from the voltage of the analog video signal Sa, the control circuit 202 increases or decreases the digital code of the second digital video signal Sd' until the comparison result signal R indicates that the reference voltage Vref is the same as the voltage of the analog video signal Sa.
As can be seen from the above description, after the control circuit 202 calculates the gain value, it represents that the control circuit 202 has already known the error of the digital-to-analog converter 204. Accordingly, the digital video signal adjuster 214 compensates the digital video signal Sd into a digital video signal Sd' according to the gain value G. Therefore, it is ensured that the analog video signal Sa output by the digital-analog converter 204 will be within the error range.
As can be seen from the above description, the digital-to-analog converter 204 of the present invention is directly assembled in the video output system 200 without performing the conventional testing and adjusting operations. After the assembly of the video output system 200 is completed, the control circuit 202 can perform a calibration procedure. Furthermore, after the calibration process is completed, it is confirmed that the analog video signal Sa is smaller than the error range.
The video output system 200 of the present invention performs the calibration procedure only during the first startup, and calculates the gain value G. When the subsequent video output system 200 is started again, the correction process is not performed.
Alternatively, the video output system 200 of the present invention performs a calibration procedure in the horizontal blanking interval each time it receives power and starts up, and calculates the gain G. The gain value G is used during the operation of the video output system 200 receiving power.
Alternatively, the video output system 200 performs the calibration procedure and calculates the gain G each time the horizontal blanking interval between frames is switched. In this way, the error variation of the digital-to-analog converter 204 when the video output system 200 varies with the ambient temperature can be solved. In other words, the calibration process may be executed when the television 150 is turned on, or before the television 150 displays a first frame, or before the television 150 displays each frame.
While the invention has been described with reference to the preferred embodiments, it is to be understood that the invention is not limited thereto. Those skilled in the art can make various changes and modifications without departing from the spirit and scope of the invention. Therefore, the protection scope of the present invention is defined by the appended claims.
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