CN108039876A - A kind of tension and relaxation type oscillating circuit - Google Patents
A kind of tension and relaxation type oscillating circuit Download PDFInfo
- Publication number
- CN108039876A CN108039876A CN201711399754.9A CN201711399754A CN108039876A CN 108039876 A CN108039876 A CN 108039876A CN 201711399754 A CN201711399754 A CN 201711399754A CN 108039876 A CN108039876 A CN 108039876A
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- Prior art keywords
- delay
- control
- tension
- analog quantity
- oscillating circuit
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- 238000004146 energy storage Methods 0.000 claims abstract description 21
- 238000007493 shaping process Methods 0.000 claims abstract description 18
- 238000013139 quantization Methods 0.000 claims abstract description 8
- 230000005611 electricity Effects 0.000 claims description 4
- 230000000740 bleeding effect Effects 0.000 claims 1
- 230000010355 oscillation Effects 0.000 abstract description 14
- 238000010586 diagram Methods 0.000 description 7
- 238000000034 method Methods 0.000 description 3
- 230000000694 effects Effects 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- 239000004065 semiconductor Substances 0.000 description 2
- 238000004088 simulation Methods 0.000 description 2
- 238000012358 sourcing Methods 0.000 description 2
- 239000003990 capacitor Substances 0.000 description 1
- 230000000295 complement effect Effects 0.000 description 1
- 238000007599 discharging Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 230000010363 phase shift Effects 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
- H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
- H03K3/023—Generators characterised by the type of circuit or by the means used for producing pulses by the use of differential amplifiers or comparators, with internal or external positive feedback
- H03K3/0231—Astable circuits
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
- H03K3/01—Details
- H03K3/012—Modifications of generator to improve response time or to decrease power consumption
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- Logic Circuits (AREA)
- Pulse Circuits (AREA)
Abstract
The invention discloses a kind of tension and relaxation type oscillating circuit, including：Charhing unit, for producing charging current under the control of delay control signal；Energy-storage units, the charging current for the charhing unit to be exported are converted to the control voltage Vc of analog quantity；Shaping unit, the control voltage Vc of the analog quantity for the energy-storage units to be exported are converted to the control signal of digital quantization；Delay unit；Delay control signal is exported after the control signal delay adjustments time for the digital quantization for exporting the shaping unit；Discharge cell, for produced under the control of the delay control signal discharge current with by the electric charge of the energy-storage units is bled off with reduce analog quantity control voltage Vc amplitude, by the present invention, some simple logic units can be utilized to build the relaxation oscillations circuit of same positive feedback function.
Description
Technical field
The present invention relates to a kind of oscillating circuit, more particularly to a kind of tension and relaxation type oscillating circuit.
Background technology
Relaxation oscillations circuit makes it can be widely applied in various kinds of sensors circuit due to its simple operating mode.It is existing
In the structure of tension and relaxation type oscillating circuit (Oscillating Circuit, OSC), generally by comparator (comparator) and
The phase shift and positive feedback that the mode of logic circuit is realized to realize output signal make circuit oscillation, since positive-feedback circuit uses
Two stage amplifer and Ibias tube of currents, logical gate are also made of more logic unit, so metal-oxide-semiconductor in positive-feedback circuit
Quantity is generally higher than 50.Therefore, it has the disadvantage that：
Positive-feedback circuit device count is more in existing OSC, and circuit area is difficult to compress.
The content of the invention
To overcome above-mentioned the shortcomings of the prior art, the purpose of the present invention is to provide a kind of tension and relaxation type oscillating circuit,
To build the relaxation oscillations circuit of same positive feedback function using some simple logic units.
In view of the above and other objects, the present invention proposes a kind of tension and relaxation type oscillating circuit, including：
Charhing unit, for producing charging current under the control of delay control signal；
Energy-storage units, the charging current for the charhing unit to be exported are converted to the control voltage Vc of analog quantity；
Shaping unit, the control voltage Vc of the analog quantity for the energy-storage units to be exported are converted to the control of digital quantization
Signal processed；
Delay unit；Exported after the control signal delay adjustments time for the digital quantization for exporting the shaping unit
Delay control signal；
Discharge cell, for producing discharge current under the control of the delay control signal with by by the energy storage list
The electric charge of member is bled off to reduce the amplitude for controlling voltage Vc of analog quantity.
Further, the charhing unit produces charging current under the low level control of the delay control signal.
Further, the discharge cell produces discharge current with logical under the high level control of the delay control signal
Cross the amplitude that the electric charge of the energy-storage units is bled off to the control voltage Vc to reduce analog quantity.
Further, the charhing unit includes the drain electrode connection analog quantity of PMOS tube M0, the PMOS tube M0
Voltage Vc nodes are controlled, grid connects the output terminal of the delay unit, and source electrode connects supply voltage.
Further, the energy-storage units include the first capacitance, the control of a termination analog quantity of first capacitance
Voltage Vc nodes processed, other end ground connection.
Further, the shaping unit includes the phase inverter of even number series connection, the input terminal connection institute of first phase inverter
The control voltage Vc nodes of analog quantity are stated, output terminal connects the input terminal of the delay unit.
Further, the discharge cell includes a switch and an electric current sinks, and described switch one end connects the analog quantity
Control voltage Vc nodes, the other end connects the hot junction that the electric current sinks, the cold end ground connection that the electric current sinks.
Further, the discharge cell includes a NMOS tube, and the drain electrode of the NMOS tube connects the control of the analog quantity
Voltage Vc nodes processed, grid connect the output terminal of the delay unit, source electrode ground connection.
Further, the delay circuit is realized by delayer.
Further, the delay time of the delay circuit is：
Td≥max(Tc,Tdc),
Wherein, TcFor charging interval, TdcFor discharge time.
Compared with prior art, a kind of tension and relaxation type oscillating circuit of the present invention is realized by using some simple logic units
The relaxation oscillations circuit of same positive feedback function is built, reduces the number of devices in oscillating circuit, is compressor circuit face
Product provides feasibility.
Brief description of the drawings
Fig. 1 is a kind of circuit structure diagram of one of tension and relaxation type oscillating circuit of present invention embodiment；
Fig. 2 is the schematic diagram of charging process in the specific embodiment of the invention；
Fig. 3 is the schematic diagram of discharge process in the specific embodiment of the invention；
Fig. 4 is a kind of circuit structure diagram of another embodiment of tension and relaxation type oscillating circuit of the present invention
Fig. 5 is the emulation schematic diagram of the specific embodiment of the invention.
Embodiment
Below by way of specific instantiation and embodiments of the present invention are described with reference to the drawings, those skilled in the art can
Understand the further advantage and effect of the present invention easily by content disclosed in the present specification.The present invention can also pass through other differences
Instantiation implemented or applied, the various details in this specification also can be based on different viewpoints with application, without departing substantially from
Various modifications and change are carried out under the spirit of the present invention.
Fig. 1 is a kind of circuit structure diagram of tension and relaxation type oscillating circuit of the present invention.A kind of as shown in Figure 1, tension and relaxation type of the present invention
Oscillating circuit, including：Charhing unit 10, energy-storage units 20, shaping unit 30, delay unit 40 and discharge cell 50.
Wherein charhing unit 10 is made of PMOS tube M0, for producing charging under the low level control of delay output signal
Electric current；Energy-storage units 20 are made of capacitance C1, and the charging current for charhing unit to be exported is converted to the control electricity of analog quantity
Press Vc；Shaping unit 30 is made of even number (in the embodiment of the present invention be 2) phase inverter I0, I1, for by energy-storage units 20
The control voltage Vc of the analog quantity of output is converted to the control signal of digital quantization；Delay unit 40 is by delayer (DELAY) DL1
Composition, delay control signal is exported after the control signal delay adjustments time for the digital quantization for exporting shaping unit 30；
Discharge cell 50 sinks (Current Sink) Is by switching SW and electric current and form, is controlled for the high level in delay output signal
The lower discharge current that produces is with the amplitude by the way that the electric charge of energy-storage units 20 to be bled off to the control voltage Vc to reduce analog quantity.
The output terminal (drain electrode of PMOS tube M0) of charhing unit 10 and one end of energy-storage units 20 (capacitance C1), shaping unit
30 input terminal (input terminal of phase inverter I0) and one end (one end of switch SW) of discharge cell 50 are connected to form analog quantity
Control voltage Vc nodes, energy-storage units 20 (capacitance C1) the other end ground connection, another termination of the switch SW of discharge cell 50
The hot junction that electric current sinks, the other end (cold end that the electric current sinks) ground connection of discharge cell 50, the output of the phase inverter I0 of shaping unit 30
Terminate the input terminal of phase inverter I1, the input of output terminal (output terminal of phase inverter I1) the connection delay unit 40 of shaping unit 30
End, the output terminal of delay unit 40 are connected to the Enable Pin of charhing unit 10 (grid of PMOS tube M0).
Fixed capacity C1 sizes are constant, and when Enable Pin (grid of PMOS tube M0) is low level, PMOS tube M0 is turned on, PMOS
Tube current source is charged to capacitance C1, as shown in Fig. 2, the current potential of the control voltage Vc points of analog quantity is driven high, when the control of analog quantity
The current potential of voltage Vc points processed to shaping unit 30 threshold voltage when its output voltage be turned to height by low, prolong through delay unit 40
When after the high level end PMOS tube, Simultaneous Switching SW open, capacitance C1 by electric current sink Is discharge.In actual circuit,
Increase a delay unit delay (delay) in loop feedback, capacitance is completely charged (analog quantity within a cycle of oscillation
The current potential of control voltage Vc be pulled to vdd).As shown in figure 3, PMOS tube when loop feedback (output of delay unit 40) is high
Current source disconnects, and switch SW closures, capacitance C1 discharges to equivalent sourcing current source Is (Current Sink).Negative-feedback circuit
Loop gain meets Barkhausen criterion, therefore circuit vibrates at ω 0.The size of one cycle of oscillation (Δ t+ Δs t ') depends on
During capacitor charge and discharge, capacitance in itself, the size of drawing/sink current and voltage.
Certainly, the switch of discharge cell 50 and electric current sink and can have many implementations in the present invention, can be one
The circuit of NMOS (as shown in Figure 4) or other structures, the present invention are not limited.
Fig. 4 is a kind of another implementation schematic diagram of tension and relaxation type oscillating circuit of the present invention.In another embodiment, by
One NMOS tube M1 realizes the sourcing current source (electric current sinks, Current Sink) of discharge cell 50 and switchs the function of SW.Charging
The drain electrode of the output terminal of unit 10, that is, PMOS tube M0 is with one end of the capacitance C1 of energy-storage units 20, the input terminal of shaping unit 30
The drain electrode of the input terminal of phase inverter I0 and the NMOS tube M1 of discharge cell 50 are connected to form the control voltage Vc nodes of analog quantity,
The other end ground connection of the capacitance C1 of energy-storage units 20, the grid connection delay unit of control terminal, that is, NMOS tube M1 of discharge cell 50
40 output terminal, the source electrode ground connection of cold end, that is, NMOS tube M1 of discharge cell 50, the output terminal of the phase inverter I0 of shaping unit 30
Connect the input terminal of phase inverter I1, the input of the output terminal connection delay unit 40 of output terminal, that is, phase inverter I1 of shaping unit 30
End, the output terminal of delay unit 40 are connected to the Enable Pin i.e. control of the grid of PMOS tube M0 and discharge cell 50 of charhing unit 10
The grid of end processed, that is, NMOS tube M1.Even number of inverters make it that exporting signal more they tends to digitized control in positive-feedback circuit
Signal, is conducive to the switch control of NMOS tube M1, PMOS tube M0.Delay unit 40 (Delay cell) then avoid discharge and recharge it
Between interfere with each other.Due to frequency of oscillation and capacitance C1 capacitances, phase inverter threshold voltage vt h/PMOS pipe thresholds Vthp/NMOS pipes
Tri- amounts of threshold value Vthn, charging current Ic and discharge current Id are related, so can be by adjusting PMOS tube M0, NMOS tube M1 and electricity
Hold size C1 and adjust circuit oscillation frequency.
As shown in figure 4, the size of delay is mainly determined by the charge and discharge time, the delay of delay unit 40 needs to ensure at one
In cycle of oscillation, charging and discharging process will not interfere with each other.So delay (Td) can be calculated by following formula：
Td≥max(Tc, Tdc)
Wherein, TcFor charging interval, TdcFor discharge time
By simulating, verifying, work as Vdd=1.2V, the grid level length and width of M0, M1 are all 1um, ID=23uA, capacitance size are
During 35fF, 1 cycle of oscillation (Δ t+ Δs t ') is 6ns, and the frequency of oscillator is 170M, shown in simulation result Fig. 5,0 moment, and electricity
Road first passes through sink current and charges to voltage Vt to capacitance, and used time Δ t, then starts to discharge, due to phase inverter, there are time delay
(transitional period of invertor), and time delay Δ t ' is generally higher than discharge time, the cycle of circuit oscillation be
For Δ t+ Δ t ', the cycle is 6nS under simulation parameter, and phase inverter output is square wave.
As it can be seen that the present invention can realize relaxation oscillations function by two complementary metal-oxide-semiconductors and some simple logic units,
Frequency of oscillation is determined by the size of capacitance, drawing/sink current and voltage.
The above-described embodiments merely illustrate the principles and effects of the present invention, not for the limitation present invention.Any
Field technology personnel can modify above-described embodiment and changed under the spirit and scope without prejudice to the present invention.Therefore,
The scope of the present invention, should be as listed by claims.
Claims (10)
1. a kind of tension and relaxation type oscillating circuit, including：
Charhing unit, for producing charging current under the control of delay control signal；
Energy-storage units, the charging current for the charhing unit to be exported are converted to the control voltage Vc of analog quantity；
Shaping unit, the control voltage Vc of the analog quantity for the energy-storage units to be exported are converted to the control letter of digital quantization
Number；
Delay unit；For exporting delay after the control signal delay adjustments time for the digital quantization for exporting the shaping unit
Control signal；
Discharge cell, for producing discharge current under the control of the delay control signal with by by the energy-storage units
Electric charge is bled off to reduce the amplitude for controlling voltage Vc of analog quantity.
A kind of 2. tension and relaxation type oscillating circuit as claimed in claim 1, it is characterised in that：The charhing unit is in the delay control
Charging current is produced under the low level control of signal processed.
A kind of 3. tension and relaxation type oscillating circuit as claimed in claim 2, it is characterised in that：The discharge cell is in the delay control
The high level control of signal processed is lower to produce discharge current with by bleeding off the electric charge of the energy-storage units to reduce analog quantity
Control the amplitude of voltage Vc.
A kind of 4. tension and relaxation type oscillating circuit as claimed in claim 3, it is characterised in that：The charhing unit includes PMOS tube
The drain electrode of M0, the PMOS tube M0 connect the control voltage Vc nodes of the analog quantity, and grid connects the output of the delay unit
End, source electrode connect supply voltage.
A kind of 5. tension and relaxation type oscillating circuit as claimed in claim 4, it is characterised in that：The energy-storage units include the first electricity
Hold, the control voltage Vc nodes of a termination analog quantity of first capacitance, other end ground connection.
A kind of 6. tension and relaxation type oscillating circuit as claimed in claim 5, it is characterised in that：The shaping unit includes even number string
The phase inverter of connection, the input terminal of first phase inverter connect the control voltage Vc nodes of the analog quantity, prolong described in output terminal connection
The input terminal of Shi Danyuan.
A kind of 7. tension and relaxation type oscillating circuit as claimed in claim 6, it is characterised in that：The discharge cell include one switch and
One electric current sinks, and described switch one end connects the control voltage Vc nodes of the analog quantity, and the other end connects the heat that the electric current sinks
End, the cold end ground connection that the electric current sinks.
A kind of 8. tension and relaxation type oscillating circuit as claimed in claim 6, it is characterised in that：The discharge cell includes a NMOS
Pipe, the drain electrode of the NMOS tube connect the control voltage Vc nodes of the analog quantity, and grid connects the output of the delay unit
End, source electrode ground connection.
A kind of 9. tension and relaxation type oscillating circuit as claimed in claim 6, it is characterised in that：The delay circuit is real by delayer
It is existing.
A kind of 10. tension and relaxation type oscillating circuit as claimed in claim 6, it is characterised in that the delay time of the delay circuit
For：
Td≥max(Tc,Tdc),
Wherein, TcFor charging interval, TdcFor discharge time.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201711399754.9A CN108039876A (en) | 2017-12-21 | 2017-12-21 | A kind of tension and relaxation type oscillating circuit |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201711399754.9A CN108039876A (en) | 2017-12-21 | 2017-12-21 | A kind of tension and relaxation type oscillating circuit |
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| Publication Number | Publication Date |
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| CN108039876A true CN108039876A (en) | 2018-05-15 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201711399754.9A Pending CN108039876A (en) | 2017-12-21 | 2017-12-21 | A kind of tension and relaxation type oscillating circuit |
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Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN112350723A (en) * | 2020-11-17 | 2021-02-09 | 北京智芯微电子科技有限公司 | Circuit for detecting loop oscillator lock |
| CN113691220A (en) * | 2021-08-31 | 2021-11-23 | 苏州瀚宸科技有限公司 | On-chip low frequency oscillator |
| CN114244320A (en) * | 2022-02-25 | 2022-03-25 | 杭州万高科技股份有限公司 | Relaxation oscillation circuit |
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| CN1223033A (en) * | 1996-06-24 | 1999-07-14 | 艾利森公司 | A Relaxation Oscillator Using the CMOS Equivalent of a Four-Layer Diode for Reduced Complexity |
| CN1788417A (en) * | 2003-06-03 | 2006-06-14 | 因芬奈昂技术股份有限公司 | Relaxation oscillator with propogation delay compensation for improving linearity and maximum frequency |
| CN102377412A (en) * | 2010-08-11 | 2012-03-14 | 义隆电子股份有限公司 | Low Power Relaxation Oscillator |
| CN102545892A (en) * | 2012-01-18 | 2012-07-04 | 上海华力微电子有限公司 | Circuit of broadband phase-locked loop frequency synthesizer |
| CN102983842A (en) * | 2012-11-30 | 2013-03-20 | 上海宏力半导体制造有限公司 | Duty ratio adjusting circuit |
| US20170194944A1 (en) * | 2016-01-06 | 2017-07-06 | Disruptive Technologies Research As | Relaxation Oscillator Circuit for Low Frequency and Low Power Dissipation |
| CN107222186A (en) * | 2017-05-05 | 2017-09-29 | 西北工业大学 | RC relaxors without comparator |
-
2017
- 2017-12-21 CN CN201711399754.9A patent/CN108039876A/en active Pending
Patent Citations (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1223033A (en) * | 1996-06-24 | 1999-07-14 | 艾利森公司 | A Relaxation Oscillator Using the CMOS Equivalent of a Four-Layer Diode for Reduced Complexity |
| CN1788417A (en) * | 2003-06-03 | 2006-06-14 | 因芬奈昂技术股份有限公司 | Relaxation oscillator with propogation delay compensation for improving linearity and maximum frequency |
| CN102377412A (en) * | 2010-08-11 | 2012-03-14 | 义隆电子股份有限公司 | Low Power Relaxation Oscillator |
| CN102545892A (en) * | 2012-01-18 | 2012-07-04 | 上海华力微电子有限公司 | Circuit of broadband phase-locked loop frequency synthesizer |
| CN102983842A (en) * | 2012-11-30 | 2013-03-20 | 上海宏力半导体制造有限公司 | Duty ratio adjusting circuit |
| US20170194944A1 (en) * | 2016-01-06 | 2017-07-06 | Disruptive Technologies Research As | Relaxation Oscillator Circuit for Low Frequency and Low Power Dissipation |
| CN107222186A (en) * | 2017-05-05 | 2017-09-29 | 西北工业大学 | RC relaxors without comparator |
Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN112350723A (en) * | 2020-11-17 | 2021-02-09 | 北京智芯微电子科技有限公司 | Circuit for detecting loop oscillator lock |
| CN112350723B (en) * | 2020-11-17 | 2022-01-14 | 北京智芯微电子科技有限公司 | Circuit for detecting loop oscillator lock |
| CN113691220A (en) * | 2021-08-31 | 2021-11-23 | 苏州瀚宸科技有限公司 | On-chip low frequency oscillator |
| CN113691220B (en) * | 2021-08-31 | 2024-06-14 | 苏州瀚宸科技有限公司 | On-chip low frequency oscillator |
| CN114244320A (en) * | 2022-02-25 | 2022-03-25 | 杭州万高科技股份有限公司 | Relaxation oscillation circuit |
| CN114244320B (en) * | 2022-02-25 | 2022-05-24 | 杭州万高科技股份有限公司 | Relaxation oscillation circuit |
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Application publication date: 20180515 |
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