CN108038062B - Memory management method and device of embedded system - Google Patents
Memory management method and device of embedded system Download PDFInfo
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- CN108038062B CN108038062B CN201711201135.4A CN201711201135A CN108038062B CN 108038062 B CN108038062 B CN 108038062B CN 201711201135 A CN201711201135 A CN 201711201135A CN 108038062 B CN108038062 B CN 108038062B
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Abstract
The invention provides a memory management method and a device of an embedded system, wherein the method comprises the following steps: receiving a memory page application request aiming at a user management memory area by taking a page as a minimum application unit; allocating memory pages with preset sizes according to the memory page application request; after formatting the allocated memory pages, dividing each memory page into memory slices with the same size; creating an SLAB management structure at the beginning of each memory page, and creating a memory slice management table behind the SLAB management structure; or, applying for a memory block in a preset cache in a user management memory area to create an SLAB management structure, and creating a memory slice management table after the SLAB management structure; the SLAB management structure is further configured to allocate memory slices to the application program according to the memory slice management table. The invention can carry out frequent memory application according to the application program request, and has high memory utilization rate.
Description
Technical Field
The present invention relates to the field of embedded system technologies, and in particular, to a method and an apparatus for managing a memory of an embedded system.
Background
The embedded system is a special computer system which is completely embedded in a controlled device and designed for specific application, the application field of the embedded system is very wide, but the computing capacity and the storage capacity of the embedded system cannot be compared with those of a computer. Therefore, an efficient and reliable memory management method must be provided in the embedded system to improve the memory utilization rate of the embedded system and ensure the stable operation of the controlled device.
The existing memory management method of the embedded system mainly comprises a heap mode and a memory pool mode, wherein the heap mode is to allocate a memory according to the actual size of an application program on a system heap space, the allocated memory is managed by linked list series connection, but a large amount of memory fragments are generated as the running time of the system is longer. The memory pool mode is that memories with different grades are divided from small to large according to a certain granularity, and a certain amount of small memories with each grade are configured, but the amount of the small memories with each grade is not easy to count, and the small memories with each grade can only be configured as much as possible during operation, so that the waste of memory space is caused.
The existing memory management method of the embedded system is difficult to meet the operation requirement of a controlled device which needs to apply frequently and release the memory, so that the reliability of the controlled device is reduced, and the maintenance cost is high.
Disclosure of Invention
The invention provides a memory management method and a memory management device of an embedded system, which are used for meeting the requirement of a controlled device which needs frequent memory application and release on memory management and improving the memory utilization rate and reliability of the controlled device.
In a first aspect, the present invention provides a memory management method for an embedded system, which is applied to a physical memory of the embedded system, where the physical memory of the embedded system includes: the system management memory area is managed by an operating system of the embedded system, and the user management memory area refers to a memory area which can be applied and allocated in advance according to an application program;
the method comprises the following steps:
receiving a memory page application request aiming at the user management memory area by taking a page as a minimum application unit;
allocating memory pages with preset sizes according to the memory page application request;
after formatting the allocated memory pages, dividing each memory page into memory slices with the same size;
creating an SLAB management structure at the beginning of each memory page, and creating a memory slice management table behind the SLAB management structure; or, applying for a memory block in a preset cache in the user management memory area to create an SLAB management structure, and creating a memory slice management table after the SLAB management structure;
the SLAB management structure is used for managing all memory slices divided by corresponding memory pages; the SLAB management structure is used for managing the memory slices of the application program according to the SLAB management table.
Optionally, the method further comprises:
receiving a memory application request of an application program;
and distributing the memory chip to the application program according to the memory size requested by the application program.
Optionally, before receiving a memory page application request for the user management memory area by using a page as a minimum application unit, the method further includes:
receiving a request for initializing a user management memory area, which is input by a user;
dividing the user management memory area into a plurality of memory page partition blocks with different sizes, wherein each memory page partition block comprises different numbers of pages with corresponding sizes, and the sizes of the pages comprise: 4K, 8K, 16K, 32K, 64K, 128K; the pages are maintained by a page control table at a fixed location, where the number of pages of size 4K is dynamically adjustable.
Optionally, before receiving a memory page application request for the user management memory area by using a page as a minimum application unit, the method further includes:
determining that all memory slices managed by the SLAB management structure are fully occupied.
Optionally, after dividing each memory page of the application into memory slices of the same size, the method further includes:
classifying the memory chips according to the sizes of the memory chips, wherein the memory chips with the same size are classified into one class;
according to the requirements of the number and the size of the preset memory slices, the memory slices are divided into a plurality of groups of slice areas, and each group of slice areas are associated with different types of caches through cache retrieval linked lists.
Optionally, the allocating the memory slice to the application program according to the memory size requested by the application program includes:
according to the size of the memory requested by the application program, finding the corresponding type of cache from the cache retrieval linked list, and distributing the memory slice to the application program after acquiring the memory slice through the SLAB linked list corresponding to the cache; the cache retrieval chain table is used for indicating the sizes of different types of caches and indicating the control structures of the different types of caches.
Optionally, when all the memory slices managed by the SLAB management structure are in an idle state, the method further includes:
deleting the information of the SLAB management structure in the corresponding SLAB linked list, and clearing the control item information of the memory pages corresponding to all the memory slices managed by the SLAB management structure; wherein, the SLAB linked list is used to indicate information of all SLAB management structures created in the same type of cache, and the control information item includes: CACHE pointer, and SLAB pointer;
and putting the memory page to the head of a free page.
In a second aspect, the present invention provides a memory management device for an embedded system, which is applied in a physical memory of the embedded system, where the physical memory of the embedded system includes: the system management memory area is managed by an operating system of the embedded system, and the user management memory area refers to a memory area which can be applied and allocated in advance according to an application program;
the device comprises:
a first receiving module, configured to receive a memory page application request for the user management memory area with a page as a minimum application unit;
a first allocation module, configured to allocate a memory page of a preset size according to the memory page application request;
the fragmentation module is used for dividing each memory page into memory fragments with the same size after formatting the allocated memory pages;
the management module is used for creating an SLAB management structure at the beginning of each memory page and creating a memory slice management table behind the SLAB management structure; or, applying for a memory block in a preset cache in the user management memory area to create an SLAB management structure, and creating a memory slice management table after the SLAB management structure;
the SLAB management structure is used for managing all memory slices divided by corresponding memory pages; the SLAB management structure is used for managing the memory slices of the application program according to the SLAB management table.
Optionally, the method further comprises:
the second receiving module is used for receiving a memory application request of the application program;
and the second allocating module is used for allocating the memory chip to the application program according to the memory size requested by the application program.
Optionally, the method further comprises:
the paging module is used for receiving a request for initializing the user management memory area, which is input by a user, before receiving a memory page application request aiming at the user management memory area by taking a page as a minimum application unit;
when a user management memory partition is initialized, the user management memory partition is divided into a plurality of memory page partition blocks with different sizes, each memory page partition block comprises pages with different numbers and corresponding sizes, and the size of each page comprises: 4K, 8K, 16K, 32K, 64K, 128K; the pages are maintained by a page control table at a fixed location, where the number of pages of size 4K is dynamically adjustable.
Optionally, the first receiving module is further configured to determine that all memory slices managed by the SLAB management structure are occupied before receiving a memory page application request for the user-managed memory area with a page as a minimum application unit.
Optionally, the management module is further configured to classify the memory slices according to the sizes of the memory slices after dividing each memory page that is applied for into memory slices of the same size, where the memory slices of the same size are classified into one class;
according to the requirements of the number and the size of the preset memory slices, the memory slices are divided into a plurality of groups of slice areas, and each group of slice areas are associated with different types of caches through cache retrieval linked lists.
Optionally, the second allocating module is specifically configured to: according to the size of the memory requested by the application program, finding the corresponding type of cache from the cache retrieval linked list, and distributing the memory slice to the application program after acquiring the memory slice through the SLAB linked list corresponding to the cache; the cache retrieval chain table is used for indicating the sizes of different types of caches and indicating the control structures of the different types of caches.
Optionally, the management module is further configured to delete information of the SLAB management structure in the corresponding SLAB linked list when all memory slices managed by the SLAB management structure are in an idle state, and clear control item information of memory pages corresponding to all memory slices managed by the SLAB management structure; wherein, the SLAB linked list is used to indicate information of all SLAB management structures created in the same type of cache, and the control information item includes: CACHE pointer, and SLAB pointer;
and putting the memory page to the head of a free page.
In a third aspect, the present invention provides a memory management device for an embedded system, including:
a memory for storing a program;
a processor for executing the program stored by the memory, the processor being configured to perform the method of any of the first aspects when the program is executed.
In a fourth aspect, the present invention provides a computer-readable storage medium comprising: instructions which, when run on a computer, cause the computer to perform the method of any one of the first aspects.
The memory management and device of the embedded system, provided by the invention, perform paging and fragmentation processing on a user management memory area of a physical memory of the embedded system, receive a memory page application request aiming at the user management memory area by taking a page as a minimum application unit, and distribute memory pages with preset sizes according to the memory page application request. Based on the SLAB management method, an SLAB management structure is established at the beginning of each memory page, and a memory slice management table is established behind the SLAB management structure; or, applying for a memory block in a preset cache in the user management memory area to create an SLAB management structure, and creating a memory slice management table after the SLAB management structure; and allocating the memory slice to the application program according to the memory slice management table through the SLAB management structure. The method of the invention can carry out frequent memory application according to the application program request, and the memory utilization rate is high.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings needed to be used in the description of the embodiments or the prior art will be briefly introduced below, and it is obvious that the drawings in the following description are some embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to these drawings without creative efforts.
FIG. 1 is a diagram of a physical memory of a vxWorks embedded operating system;
fig. 2 is a flowchart of a memory management method of an embedded system according to an embodiment of the present invention;
fig. 3 is a flowchart of a memory management method of an embedded system according to a second embodiment of the present invention;
fig. 4 is a flowchart of a memory management method of an embedded system according to a third embodiment of the present invention;
fig. 5 is a schematic diagram illustrating a memory initialization process according to an embodiment of the present invention;
fig. 6 is a flowchart of a memory management method of an embedded system according to a fourth embodiment of the present invention;
fig. 7 is a schematic diagram illustrating a memory application flow according to an embodiment of the present invention;
fig. 8 is a flowchart of a memory management method of an embedded system according to a fifth embodiment of the present invention;
fig. 9 is a schematic structural diagram of a memory management device of an embedded system according to an embodiment of the present invention;
fig. 10 is a schematic structural diagram of a memory management device of an embedded system according to a second embodiment of the present invention;
fig. 11 is a schematic structural diagram of a memory management device of an embedded system according to a third embodiment of the present invention;
fig. 12 is a schematic structural diagram of a memory management device of an embedded system according to an embodiment of the present invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are some, but not all, embodiments of the present invention. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
The terms "first," "second," "third," "fourth," and the like in the description and in the claims, as well as in the drawings, if any, are used for distinguishing between similar elements and not necessarily for describing a particular sequential or chronological order. It is to be understood that the data so used is interchangeable under appropriate circumstances such that the embodiments of the invention described herein are, for example, capable of operation in sequences other than those illustrated or otherwise described herein. Furthermore, the terms "comprises," "comprising," and "having," and any variations thereof, are intended to cover a non-exclusive inclusion, such that a process, method, system, article, or apparatus that comprises a list of steps or elements is not necessarily limited to those steps or elements expressly listed, but may include other steps or elements not expressly listed or inherent to such process, method, article, or apparatus.
The technical solution of the present invention will be described in detail below with specific examples. The following several specific embodiments may be combined with each other, and details of the same or similar concepts or processes may not be repeated in some embodiments.
In the following, some terms in the present application are explained to facilitate understanding by those skilled in the art:
1) the vxWorks embedded operating system is an embedded real-time operating system developed by Windriver corporation in 1983 in the United states and is a key component of an embedded development environment. VxWorks comprises a core with small volume and a plurality of system modules which can be customized according to the needs.
The VxWorks kernel is 8KB minimum. The VxWorks has good real-time performance, the system has low cost, the common programs of the system such as process scheduling, interprocess communication, interrupt processing and the like are refined and effective, and the delay caused by the processes is short. In a multitasking mechanism provided by VxWorks, Priority preemption (Preemptive Priority Scheduling) and Round-Robin Scheduling (Round-Robin Scheduling) mechanisms are adopted for controlling tasks, and reliable real-time performance is fully guaranteed.
2) The real-time operating system is used for executing specified functions within a limited time and responding to external asynchronous events within the limited time. The real-time system is mainly applied to time-sensitive occasions such as process control, data acquisition, communication, multimedia information processing and the like.
3) And (3) SLAB: the method is a memory allocation mechanism of the Linux operating system. The work is directed to some objects that are frequently allocated and released, such as process descriptors, and the size of the objects is generally small, and if the partner system is directly used for allocation and release, not only a large amount of memory fragmentation is caused, but also the processing speed is too slow. The SLAB dispatcher is managed on an object basis, objects of the same type are grouped into one class (e.g., process descriptor is one class), and each time such an object is requested, the SLAB dispatcher dispatches a unit of such size from a SLAB list and when it is to be released, restores it to the list instead of returning it directly to the buddy system, thereby avoiding such internal fragmentation. The SLAB dispatcher does not discard the allocated objects, but releases and saves them in memory. When a new object is requested later, it can be directly obtained from the memory without re-initialization.
The memory management method of the embedded system can be applied to the vxWorks-based embedded operating system. Fig. 1 is a schematic diagram of a physical memory of a vxWorks embedded operating system, and as shown in fig. 1, the physical memory of the vxWorks embedded operating system may be divided into a platform pre-application memory area and a vxWorks operating system management memory area. The memory area pre-applied by the platform can be managed by a user, and the memory area managed by the vxWorks operating system is managed by the operating system. The memory management method of the embedded system provided by the invention mainly aims at the problem that a platform applies for a memory area in advance. The existing memory management method of the embedded system is difficult to meet the operation requirement of a controlled device which needs to apply frequently and release the memory, so that the reliability of the controlled device is reduced, and the maintenance cost is high.
The invention provides a memory management method of an embedded system, which aims to solve the technical problems in the prior art.
The following describes the technical solutions of the present invention and how to solve the above technical problems with specific embodiments. The following several specific embodiments may be combined with each other, and details of the same or similar concepts or processes may not be repeated in some embodiments. Embodiments of the present invention will be described below with reference to the accompanying drawings.
Fig. 2 is a flowchart of a memory management method of an embedded system according to an embodiment of the present invention, and as shown in fig. 2, the method in this embodiment is applied to a physical memory of the embedded system, where the physical memory of the embedded system includes: the system management memory area is managed by an operating system of the embedded system, and the user management memory area refers to a memory area which can be applied and allocated in advance according to an application program. The method in this embodiment may include:
s101, taking the page as the minimum application unit, receiving a memory page application request aiming at the user management memory area.
In this embodiment, the user management memory area is divided into a plurality of memory page partition blocks with different sizes in advance, each memory page partition block includes pages with different numbers and corresponding sizes, and the sizes of the pages include: 4K, 8K, 16K, 32K, 64K, 128K; the pages are maintained by a page control table at a fixed location, where the number of pages of size 4K is dynamically adjustable. And receiving a memory page application request aiming at the user management memory area by taking the page as the minimum application unit. It should be noted that the application cannot directly apply to the page manager by using the memory, and must apply through the slice manager. The slice manager applies for pages from the page manager and then allocates smaller or larger blocks to the application (i.e., the application applies for memory directly to the slice manager, which acts as a retailer that wholesalers the memory to the page manager before retailing to the user).
S102, allocating memory pages with preset sizes according to the memory page application requests.
In this embodiment, the page manager allocates a memory page of a preset size according to a memory page request of the slice manager.
And S103, after formatting the allocated memory pages, dividing each memory page into memory slices with the same size.
In this embodiment, the memory pages allocated by the page manager are formatted first, and then each memory page is divided into memory slices with the same size.
S104, creating an SLAB management structure at the beginning of each memory page, and creating a memory slice management table behind the SLAB management structure; alternatively, step S105 is performed.
In this embodiment, an in-band management manner is adopted, that is, the SLAB management structure, the memory slice management table, and the memory slice are on the same page, and this management manner is suitable for management of a small-sized memory slice, for example, when the memory slice is smaller than 512 bytes. The SLAB management structure is used for managing all memory slices divided by corresponding memory pages; the SLAB management structure is used for managing the memory slices of the application program according to the SLAB management table.
S105, applying for a memory block in a preset cache in the user management memory area to establish an SLAB management structure, and establishing a memory slice management table after the SLAB management structure.
In this embodiment, an out-of-band management manner is adopted, and a small memory block is required to store the SLAB management structure and the memory slice management table, that is, the SLAB management structure, the memory slice management table, and the memory slice are not on the same page. The purpose of this management is to avoid excessive memory wastage, such as when the memory slice is 512 bytes or more.
In this embodiment, paging and fragmentation processing are performed on a user management memory area of a physical memory of an embedded system, a page is used as a minimum application unit, a memory page application request for the user management memory area is received, and memory pages of a preset size are allocated according to the memory page application request. Based on the SLAB management method, an SLAB management structure is established at the beginning of each memory page, and a memory slice management table is established behind the SLAB management structure; or, applying for a memory block in a preset cache in the user management memory area to create an SLAB management structure, and creating a memory slice management table after the SLAB management structure; and allocating the memory slice to the application program according to the memory slice management table through the SLAB management structure. The method of the invention can carry out frequent memory application according to the application program request, and the memory utilization rate is high.
Fig. 3 is a flowchart of a memory management method of an embedded system according to a second embodiment of the present invention, and as shown in fig. 3, on the basis of the method shown in fig. 2, the method in this embodiment may further include:
s201, taking the page as the minimum application unit, receiving a memory page application request aiming at the user management memory area.
S202, allocating memory pages with preset sizes according to the memory page application requests.
S203, after formatting the allocated memory pages, dividing each memory page into memory slices with the same size.
S204, creating an SLAB management structure at the beginning of each memory page, and creating a memory slice management table behind the SLAB management structure; alternatively, step S105 is performed.
S205, applying for a memory block in a preset cache in the user management memory area to create an SLAB management structure, and creating a memory slice management table after the SLAB management structure.
In this embodiment, the specific implementation processes of steps S201 to S205 refer to the related description in the method shown in fig. 2, and are not described herein again.
S206, receiving a memory application request of the application program.
In this embodiment, the slice management program receives a memory application request sent by an application program.
And S207, distributing the memory to the application program according to the memory size requested by the application program.
In this embodiment, according to the size of the memory requested by the application program, the corresponding type of cache is found from the cache retrieval linked list, and after the memory slice is acquired through the SLAB linked list corresponding to the cache, the memory slice is allocated to the application program; the cache retrieval chain table is used for indicating the sizes of different types of caches and indicating the control structures of the different types of caches.
In this embodiment, a slice management program (SLAB management method) is used to allocate memory slices to an application program, so that dynamic memory allocation is performed according to the size of a memory applied by the application program, and the utilization rate of the memory is greatly improved.
Fig. 4 is a flowchart of a memory management method of an embedded system according to a third embodiment of the present invention, and fig. 5 is a schematic diagram of a memory initialization process according to the first embodiment of the present invention; as shown in fig. 4, before receiving a memory page application request for the user managed memory area with a page as a minimum application unit, the method further includes:
s301, receiving a request for initializing the user management memory area input by a user.
Optionally, as shown in fig. 5, first, a starting address of a Random Access Memory (RAM) of the upper layer software is obtained, a starting address of a memory page control table is determined, a length of the RAM of the upper layer software is set, and a 128K, 64K, 32K, 16K, and 8K sized memory page ending address and a starting address of the upper layer software are determined; determining the starting address of the 4K memory page of the upper layer software, determining the length of a memory page control table, determining the data length of a recording page control table, determining the starting address of the 4K memory page of the upper layer software again, and resetting the whole memory control table; initializing memory page control table entries of 4K, 8K, 16K, 32K, 64K and 128K, initializing flag bits, and initializing global variables (key _ cache _ s), a cache retrieval chain table (cache _ chain) and a cache retrieval table (cache _ size) of a cache structure.
S302, dividing the user management memory into a plurality of memory page partition blocks with different sizes.
In this embodiment, each memory page partition block includes different numbers of pages with corresponding sizes, where the sizes of the pages include: 4K, 8K, 16K, 32K, 64K, 128K; the pages are maintained by a page control table at a fixed location, where the number of pages of size 4K is dynamically adjustable.
Optionally, before receiving a memory page application request for the user management memory area by using a page as a minimum application unit, the method further includes: determining that all memory slices managed by the SLAB management structure are fully occupied.
In this embodiment, the memory page is divided in advance by initializing the user management memory area and in the initialization process, so that the memory page is managed conveniently, and the memory page application efficiency is improved.
Fig. 6 is a flowchart of a memory management method of an embedded system according to a fourth embodiment of the present invention, and as shown in fig. 6, after dividing each memory page of an application into memory slices with the same size, the method further includes:
s401, classifying the memory chips according to the sizes of the memory chips, and classifying the memory chips with the same size into one class.
In this embodiment, the memory chips are classified according to their sizes, and the memory chips having the same size are classified into one class. The memory slices have sizes of 32, 64, 128, 256, 512, 1k, 2k, 4k, 8k, 16k, 32k, 64k and 128k bytes respectively, the memory slices with the sizes are classified into one type and are respectively located in various memory pages, namely, the 32-byte slice is located in a memory page dedicated to the memory slice, the 64-byte slice is located in a memory page dedicated to the 64-byte memory slice, and so on.
S402, dividing the memory chips into a plurality of groups of chip areas according to the requirements of the number and the size of the preset memory chips, wherein each group of chip areas are associated with different types of caches through a cache retrieval linked list.
In this embodiment, the memory slices with different sizes and numbers are divided into a plurality of groups of slice regions, and each group of slice regions is associated with different types of caches through the cache retrieval chain table.
Optionally, fig. 7 is a schematic diagram of a memory application flow provided in the first embodiment of the present invention; as shown in fig. 7, first, a memory application of a user is received, a cache search table is traversed, a cache entry to be applied is found according to the memory length, and then an object (memory slice) managed in an SLAB management structure corresponding to a cache is obtained; judging whether the request is a first object (memory chip) application of the SLAB management structure; if yes, then: obtaining a memory page with a specified size from a platform software memory area (a user management memory area), formatting the memory page, creating an SLAB management structure and an object management list (a memory slice management table), setting a page control table and setting control information of the page (adding a memory slice managed by the SLAB management structure into a cache retrieval chain table); if not, then: and judging whether the SLAB management structure is full (all memory slices are occupied), if not, returning a memory pointer, if so, applying for a memory page, and creating an SLAB management structure on the applied memory page, wherein the memory pointer points to the newly-built SLAB management structure.
Fig. 8 is a flowchart of a memory management method of an embedded system according to a fifth embodiment of the present invention, and as shown in fig. 8, on the basis of the method shown in fig. 2, this embodiment may further include:
s501, when all the memory chips managed by the SLAB management structure are in an idle state, deleting the information of the SLAB management structure in the corresponding SLAB linked list, and clearing the control item information of the memory pages corresponding to all the memory chips managed by the SLAB management structure.
In this embodiment, the SLAB linked list is used to indicate information of all SLAB management structures created in the same type of cache. The control information item includes: CACHE pointer, and SLAB pointer;
s501, the memory page is placed at the head of the free page.
In this embodiment, the memory page managed by the SLAB management structure is prevented from being at the head of the idle page, so that the memory page is allocated when the memory page application request is received next time.
In this embodiment, the SLAB management structure is used to manage the memory slices in the memory page, and when all the memory slices are in an idle state, the memory pages are released in time, so that the memory utilization rate is improved.
Fig. 9 is a schematic structural diagram of a memory management device of an embedded system according to an embodiment of the present invention, and as shown in fig. 9, the device in this embodiment is applied to a physical memory of the embedded system, where the physical memory of the embedded system includes: the system management memory area is managed by an operating system of the embedded system, and the user management memory area refers to a memory area which can be applied and allocated in advance according to an application program; the device comprises:
a first receiving module 10, configured to receive a memory page application request for the user managed memory area by using a page as a minimum application unit;
a first allocation module 20, configured to allocate memory pages of a preset size according to the memory page application request;
the fragmentation module 30 is configured to format the allocated memory pages, and then divide each memory page into memory fragments with the same size;
a management module 40, configured to create an SLAB management structure at the beginning of each memory page, and create a memory slice management table behind the SLAB management structure; or, applying for a memory block in a preset cache in the user management memory area to create an SLAB management structure, and creating a memory slice management table after the SLAB management structure; the SLAB management structure is used for managing all memory slices divided by corresponding memory pages; the SLAB management structure is used for managing the memory slices of the application program according to the SLAB management table.
Optionally, the first receiving module 10 is further configured to determine that all memory slices managed by the SLAB management structure are occupied before receiving a memory page application request for the user-managed memory area by using a page as a minimum application unit.
Optionally, the management module 40 is further configured to classify the memory slices according to the sizes of the memory slices after dividing each memory page that is applied for into memory slices with the same size, where the memory slices with the same size are classified into one class;
according to the requirements of the number and the size of the preset memory slices, the memory slices are divided into a plurality of groups of slice areas, and each group of slice areas are associated with different types of caches through cache retrieval linked lists.
Optionally, the management module 40 is further configured to delete the information of the SLAB management structure in the corresponding SLAB linked list when all the memory slices managed by the SLAB management structure are in an idle state, and clear control item information of memory pages corresponding to all the memory slices managed by the SLAB management structure; wherein, the SLAB linked list is used to indicate information of all SLAB management structures created in the same type of cache, and the control information item includes: CACHE pointer, and SLAB pointer;
and putting the memory page to the head of a free page.
The present embodiment may implement the technical solutions in the methods shown in fig. 2 to fig. 8, and the implementation processes and technical effects are similar to those of the methods described above, and are not described herein again.
Fig. 10 is a schematic structural diagram of a memory management device of an embedded system according to a second embodiment of the present invention, as shown in fig. 10, the device in this embodiment may further include, on the basis of the device shown in fig. 9:
a second receiving module 50, configured to receive a memory application request of an application program;
the second allocating module 60 is configured to allocate the memory slice to the application program according to the memory size requested by the application program.
Optionally, the second allocating module 60 is specifically configured to: according to the size of the memory requested by the application program, finding the corresponding type of cache from the cache retrieval linked list, and distributing the memory slice to the application program after acquiring the memory slice through the SLAB linked list corresponding to the cache; the cache retrieval chain table is used for indicating the sizes of different types of caches and indicating the control structures of the different types of caches.
The present embodiment may implement the technical solutions in the methods shown in fig. 2 to fig. 8, and the implementation processes and technical effects are similar to those of the methods described above, and are not described herein again.
Fig. 11 is a schematic structural diagram of a memory management device of an embedded system according to a third embodiment of the present invention, and as shown in fig. 11, the device in this embodiment may further include, on the basis of the device shown in fig. 9:
a paging module 70, configured to receive a request for initializing a user management memory area, input by a user, before receiving a memory page application request for the user management memory area by using a page as a minimum application unit;
when a user management memory partition is initialized, the user management memory partition is divided into a plurality of memory page partition blocks with different sizes, each memory page partition block comprises pages with different numbers and corresponding sizes, and the size of each page comprises: 4K, 8K, 16K, 32K, 64K, 128K; the pages are maintained by a page control table at a fixed location, where the number of pages of size 4K is dynamically adjustable.
The present embodiment may implement the technical solutions in the methods shown in fig. 2 to fig. 8, and the implementation processes and technical effects are similar to those of the methods described above, and are not described herein again.
Fig. 12 is a schematic structural diagram of a memory management device of an embedded system according to an embodiment of the present invention, where the device in this embodiment may include:
a memory 80 for storing a program;
a processor 90 for executing the program stored in the memory, wherein when the program is executed, the processor 90 is configured to execute the technical solutions in the methods shown in fig. 2 to 8.
In addition, embodiments of the present application further provide a computer-readable storage medium, in which computer-executable instructions are stored, and when at least one processor of the user equipment executes the computer-executable instructions, the user equipment performs the above-mentioned various possible methods.
Computer-readable media includes both computer storage media and communication media including any medium that facilitates transfer of a computer program from one place to another. A storage media may be any available media that can be accessed by a general purpose or special purpose computer. An exemplary storage medium is coupled to the processor such the processor can read information from, and write information to, the storage medium. Of course, the storage medium may also be integral to the processor. The processor and the storage medium may reside in an ASIC. Additionally, the ASIC may reside in user equipment. Of course, the processor and the storage medium may reside as discrete components in a communication device.
Those of ordinary skill in the art will understand that: all or a portion of the steps of implementing the above-described method embodiments may be performed by hardware associated with program instructions. The program may be stored in a computer-readable storage medium. When executed, the program performs steps comprising the method embodiments described above; and the aforementioned storage medium includes: various media that can store program codes, such as ROM, RAM, magnetic or optical disks.
Finally, it should be noted that: the above embodiments are only used to illustrate the technical solution of the present invention, and not to limit the same; while the invention has been described in detail and with reference to the foregoing embodiments, it will be understood by those skilled in the art that: the technical solutions described in the foregoing embodiments may still be modified, or some or all of the technical features may be equivalently replaced; and the modifications or the substitutions do not make the essence of the corresponding technical solutions depart from the scope of the technical solutions of the embodiments of the present invention.
Claims (7)
1. A memory management method of an embedded system is applied to a physical memory of the embedded system, and the physical memory of the embedded system comprises the following steps: the system management memory area is managed by an operating system of the embedded system, and the user management memory area refers to a memory area which can be applied and allocated in advance according to an application program; the method comprises the following steps:
receiving a memory page application request aiming at the user management memory area by taking a page as a minimum application unit;
allocating memory pages with preset sizes according to the memory page application request;
after formatting the allocated memory pages, dividing each memory page into memory slices with the same size;
creating an SLAB management structure at the beginning of each memory page, and creating a memory slice management table behind the SLAB management structure; or, applying for a memory block in a preset cache in the user management memory area to create an SLAB management structure, and creating a memory slice management table after the SLAB management structure;
receiving a memory application request of an application program;
according to the memory size requested by the application program, finding a corresponding type of cache from a cache retrieval linked list, and distributing the cache to the application program after acquiring a memory slice through an SLAB linked list corresponding to the cache; the cache retrieval chain table is used for indicating the sizes of different types of caches and indicating the control structures of the different types of caches; the SLAB linked list is used for indicating information of all the SLAB management structures established in the same type of cache; the SLAB management structure is used for managing all memory slices divided by corresponding memory pages; the SLAB management structure is used for managing the memory slices of the application program according to the SLAB management table.
2. The method according to claim 1, wherein before receiving a memory page application request for the user managed memory region in a minimum application unit of a page, the method further comprises:
receiving a request for initializing a user management memory area, which is input by a user;
dividing the user management memory area into a plurality of memory page partition blocks with different sizes, wherein each memory page partition block comprises different numbers of pages with corresponding sizes, and the sizes of the pages comprise: 4K, 8K, 16K, 32K, 64K, 128K; the pages are maintained by a page control table at a fixed location, where the number of pages of size 4K is dynamically adjustable.
3. The method according to claim 1, wherein before receiving a memory page application request for the user managed memory region in a minimum application unit of a page, the method further comprises:
determining that all memory slices managed by the SLAB management structure are fully occupied.
4. The method according to claim 1, further comprising, after dividing each memory page of the application into memory slices of the same size:
classifying the memory chips according to the sizes of the memory chips, wherein the memory chips with the same size are classified into one class;
according to the requirements of the number and the size of the preset memory slices, the memory slices are divided into a plurality of groups of slice areas, and each group of slice areas are associated with different types of caches through cache retrieval linked lists.
5. The method of claim 4, wherein when all memory slices managed by the SLAB management structure are in an idle state, further comprising:
deleting the information of the SLAB management structure in the corresponding SLAB linked list, and clearing the control item information of the memory pages corresponding to all the memory slices managed by the SLAB management structure; wherein, the SLAB linked list is used to indicate information of all SLAB management structures created in the same type of cache, and the control item information includes: CACHE pointer and SLAB pointer;
and putting the memory page to the head of a free page.
6. A memory management device of an embedded system is applied to a physical memory of the embedded system, and the physical memory of the embedded system comprises: the system management memory area is managed by an operating system of the embedded system, and the user management memory area refers to a memory area which can be applied and allocated in advance according to an application program;
the device comprises:
a first receiving module, configured to receive a memory page application request for the user management memory area with a page as a minimum application unit;
a first allocation module, configured to allocate a memory page of a preset size according to the memory page application request;
the fragmentation module is used for dividing each memory page into memory fragments with the same size after formatting the allocated memory pages;
the management module is used for creating an SLAB management structure at the beginning of each memory page and creating a memory slice management table behind the SLAB management structure; or, applying for a memory block in a preset cache in the user management memory area to create an SLAB management structure, and creating a memory slice management table after the SLAB management structure;
the second receiving module is used for receiving a memory application request of the application program;
the second allocation module is used for finding the corresponding type of cache from the cache retrieval linked list according to the memory size requested by the application program, acquiring a memory slice through the SLAB linked list corresponding to the cache, and allocating the memory slice to the application program; the cache retrieval chain table is used for indicating the sizes of different types of caches and indicating the control structures of the different types of caches; the SLAB linked list is used for indicating information of all the SLAB management structures established in the same type of cache;
the SLAB management structure is used for managing all memory slices divided by corresponding memory pages; the SLAB management structure is used for managing the memory slices of the application program according to the SLAB management table.
7. The apparatus of claim 6, further comprising:
the paging module is used for receiving a request for initializing the user management memory area, which is input by a user, before receiving a memory page application request aiming at the user management memory area by taking a page as a minimum application unit;
when a user management memory partition is initialized, the user management memory partition is divided into a plurality of memory page partition blocks with different sizes, each memory page partition block comprises pages with different numbers and corresponding sizes, and the size of each page comprises: 4K, 8K, 16K, 32K, 64K, 128K; the pages are maintained by a page control table at a fixed location, where the number of pages of size 4K is dynamically adjustable.
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| CN109857678A (en) * | 2019-01-31 | 2019-06-07 | 深兰科技（上海）有限公司 | A kind of managing embedded system memory method and device |
| CN109815192B (en) * | 2019-01-31 | 2024-06-11 | 深兰机器人(上海)有限公司 | Method and device for managing embedded system memory |
| CN112711546B (en) * | 2019-10-24 | 2024-06-18 | 华为技术有限公司 | Memory configuration method, device and storage medium |
| CN117724991B (en) * | 2023-12-21 | 2024-09-06 | 北京凯思昊鹏软件工程技术有限公司 | Dynamic memory management method, system, terminal and storage medium of embedded system |
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