CN108011005B - Semiconductor light emitting device and method for manufacturing the same - Google Patents
Semiconductor light emitting device and method for manufacturing the same Download PDFInfo
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- CN108011005B CN108011005B CN201711107833.8A CN201711107833A CN108011005B CN 108011005 B CN108011005 B CN 108011005B CN 201711107833 A CN201711107833 A CN 201711107833A CN 108011005 B CN108011005 B CN 108011005B
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
- H10H20/00—Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
- H10H20/80—Constructional details
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
- H10H20/00—Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
- H10H20/01—Manufacture or treatment
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
- H10H20/00—Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
- H10H20/80—Constructional details
- H10H20/85—Packages
- H10H20/851—Wavelength conversion means
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
- H10H20/00—Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
- H10H20/80—Constructional details
- H10H20/85—Packages
- H10H20/855—Optical field-shaping means, e.g. lenses
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
- H10H20/00—Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
- H10H20/80—Constructional details
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Abstract
本发明公开了一种半导体发光器件及其制造方法，半导体发光器件包括基板、设置在基板上的至少一正极焊盘和至少一负极焊盘、设置在基板上的至少一半导体发光芯片、设置在基板上并包裹半导体发光芯片的荧光粉层、以及设置在荧光粉层内侧的绝缘层；半导体发光芯片的正极和负极分别与正极焊盘和负极焊盘电连接；绝缘层位于荧光粉层内表面的部分或全部与基板表面的部分或全部之间；和/或，位于荧光粉层内表面的部分或全部与半导体发光芯片侧面的部分或全部之间。本发明的半导体发光器件，通过设置结构层对半导体发光芯片侧面的遮挡，防止半导体发光芯片侧面出光，增强半导体发光芯片的正面出光，适用于制备中心光强要求高、发光角度要求小的照明灯具。
The present invention discloses a semiconductor light-emitting device and a manufacturing method thereof. The semiconductor light-emitting device comprises a substrate, at least one positive electrode pad and at least one negative electrode pad arranged on the substrate, at least one semiconductor light-emitting chip arranged on the substrate, a phosphor layer arranged on the substrate and wrapping the semiconductor light-emitting chip, and an insulating layer arranged on the inner side of the phosphor layer; the positive electrode and the negative electrode of the semiconductor light-emitting chip are electrically connected to the positive electrode pad and the negative electrode pad respectively; the insulating layer is located between part or all of the inner surface of the phosphor layer and part or all of the substrate surface; and/or, between part or all of the inner surface of the phosphor layer and part or all of the side surface of the semiconductor light-emitting chip. The semiconductor light-emitting device of the present invention prevents the semiconductor light-emitting chip from emitting light from the side and enhances the front light emission of the semiconductor light-emitting chip by setting a structural layer to block the side surface of the semiconductor light-emitting chip, and is suitable for preparing lighting fixtures with high central light intensity requirements and small light emission angle requirements.
Description
Technical Field
The present invention relates to the field of semiconductor light emitting devices, and more particularly, to a semiconductor light emitting device and a method for manufacturing the same.
Background
With the increase of luminous efficiency and the decrease of manufacturing cost, semiconductor luminous sources have been widely used in the fields of backlight, display, illumination, and the like. The semiconductor luminous light source comprises a plurality of types such as LEDs, COB, modules, lamp panels, lamp bars and the like. In the near future, semiconductor light emitting sources are likely to replace conventional light sources as the main light sources for general illumination.
The structure of a common semiconductor light-emitting source (semiconductor light-emitting device) is shown in fig. 1, which comprises a substrate 1, a fluorescent powder layer 2 arranged on the substrate, a semiconductor light-emitting chip 3, a chip positive electrode 4a, a chip negative electrode 4b, a positive electrode bonding pad 5a, a negative electrode bonding pad 5b, a positive electrode bonding pad 6a, a negative electrode bonding pad 6b and a heat conducting bonding pad 7, wherein the fluorescent powder layer 2 covers the semiconductor light-emitting chip 3 on the substrate 1, the chip positive electrode 4a is electrically connected with the positive electrode bonding pad 5a, the chip negative electrode 4b is electrically connected with the negative electrode bonding pad 5b, and the positive electrode bonding pad 6a and the negative electrode bonding pad 6b are respectively connected with the positive electrode bonding pad 5a and the negative electrode bonding pad 5b.
As can be seen from the conventional semiconductor light-emitting source structure shown in FIG. 1, the semiconductor light-emitting chip 3 has a certain thickness (100-150 μm), and after the phosphor layer 2 is wrapped, the light-emitting surface of the semiconductor light-emitting chip not only includes a front surface but also includes a side surface, the light-emitting quantity of the side surface can account for 10-30% of the total light-emitting quantity, and the light-emitting angle is greater than 150 degrees. For applications requiring central illumination and small light angles, side light emission not only affects the amount of front light emission, but also becomes stray light, which affects the light shape or glare of the illuminated surface seriously.
In semiconductor light emitting sources, silica gel is generally used as a base material for a phosphor layer. Because silica gel has certain air permeability, aqueous vapor, sulfide, halide and the like in the environment can enter the surface of the semiconductor light-emitting chip, the surface of the substrate and the welding position of the semiconductor light-emitting chip and the substrate through the silica gel-based fluorescent powder layer, and the surface vulcanization and the halogenation can be caused, so that serious light attenuation and even failure are generated.
Therefore, the problems of light intensity and small light emitting angle of the front surface of the semiconductor light emitting device cannot be solved due to the intrinsic defects and shortcomings of the semiconductor light emitting light source structure, and the prepared semiconductor light emitting device has the problems of short service life, rapid attenuation, poor reliability and the like particularly when being used in a severe environment.
Disclosure of Invention
The invention aims to provide a semiconductor light-emitting device which realizes a small light-emitting angle and enhances central light intensity and a manufacturing method thereof.
The invention provides a semiconductor light-emitting device, which comprises a substrate, at least one positive electrode bonding pad and at least one negative electrode bonding pad which are arranged on the substrate, at least one semiconductor light-emitting chip which is arranged on the substrate, a fluorescent powder layer which is arranged on the substrate and wraps the semiconductor light-emitting chip, and an insulating layer which is arranged on the inner side of the fluorescent powder layer, wherein the positive electrode and the negative electrode of the semiconductor light-emitting chip are respectively electrically connected with the positive electrode bonding pad and the negative electrode bonding pad;
The insulating layer is positioned between part or all of the inner surface of the fluorescent powder layer and part or all of the surface of the substrate, and/or the insulating layer is positioned between part or all of the inner surface of the fluorescent powder layer and part or all of the side surface of the semiconductor light-emitting chip.
Preferably, the height of the insulating layer gradually decreases from one end adjacent to the side of the semiconductor light emitting chip to the other end distant from the side of the semiconductor light emitting chip.
Preferably, the material of the insulating layer comprises one or more of silica gel, resin, glass glaze, liquid glass, ink and paint.
Preferably, the material of the insulating layer is further doped with inorganic powder, wherein the inorganic powder comprises one or more of glass powder, ceramic powder, metal powder, alloy powder, oxide powder and nitride powder with micron, submicron and nanometer particle sizes.
Preferably, the material of the fluorescent powder layer comprises one or more of silica gel, resin, glass glaze, ink and paint, and is doped with one or more fluorescent powder.
Preferably, the semiconductor light-emitting device further comprises at least one shading layer arranged on the fluorescent powder layer, wherein at least one opening is formed in the shading layer, and part of the fluorescent powder layer is exposed.
Preferably, the material of the light shielding layer includes one or more of aluminum and its alloys, gold and its alloys, silver and its alloys, nickel and its alloys, titanium and its alloys, glass glaze, ink, liquid glass, paint, titanium oxide, zinc oxide, silicon oxide, aluminum nitride, silicon nitride, and aluminum oxide.
Preferably, the material of the light shielding layer comprises one or more of silica gel, resin, liquid glass, glass glaze, ink and paint, and is doped with inorganic powder, wherein the inorganic powder comprises one or more of glass powder, ceramic powder, metal powder, alloy powder, oxide powder and nitride powder with micrometer, submicron and nanometer particle sizes.
The invention also provides a manufacturing method of the semiconductor light-emitting device, which comprises the following steps:
s1, preparing an anode bonding pad and a cathode bonding pad on a substrate;
S2, fixing a semiconductor light-emitting chip on the surface of the substrate, and electrically connecting an anode and a cathode of the semiconductor light-emitting chip with the anode bonding pad and the cathode bonding pad respectively;
s3, setting insulating material liquid on part or all of the surface of the substrate and/or part or all of the side surface of the semiconductor light-emitting chip to form an insulating layer;
S4, setting fluorescent material liquid on part or all of the exposed surface and the exposed side surface of the semiconductor light-emitting chip and part or all of the surface of the insulating layer to form a fluorescent powder layer wrapping the semiconductor light-emitting chip;
The insulating layer is positioned between part or all of the surface of the substrate and part or all of the inner surface of the fluorescent powder layer, and/or between part or all of the side surface of the semiconductor light emitting chip and part or all of the inner surface of the fluorescent powder layer.
Preferably, in the step S3, the insulating layer is formed by one or more modes of spraying, dispensing, spin coating and printing of the insulating liquid, wherein the insulating liquid is insulating glue or insulating slurry;
In step S4, the fluorescent powder layer is formed by one or more modes of spraying, mould pressing, film pressing, dispensing, evaporating and printing of the fluorescent liquid, and the fluorescent liquid is fluorescent glue solution or fluorescent slurry.
Preferably, the manufacturing method further comprises the steps of:
s5, reserving an opening position on the fluorescent powder layer, and arranging a shading layer on the surface of the fluorescent powder layer outside the opening position, wherein the opening position forms an opening of the shading layer, and part of the fluorescent powder layer is exposed.
The semiconductor light-emitting device has the beneficial effects that the structure is simple, the side surface of the semiconductor light-emitting chip is prevented from emitting light by shielding the side surface of the semiconductor light-emitting chip by arranging the structural layer, the yellow circle is avoided, the front surface of the semiconductor light-emitting chip is enhanced, and the semiconductor light-emitting device has the advantages of small light-emitting angle, concentrated light-emitting surface, strong attenuation resistance and the like, and is suitable for preparing a lighting bulb or a lighting lamp with high requirement on central light intensity and small light-emitting angle.
The manufacturing method of the semiconductor light-emitting device has the advantages of short flow, simple process and low manufacturing cost, and is suitable for large-scale industrialized production.
Drawings
The invention will be further described with reference to the accompanying drawings and examples, in which:
FIG. 1 is a schematic diagram of a prior art semiconductor light source;
fig. 2 is a schematic structural view of a semiconductor light emitting device of a first embodiment of the present invention;
fig. 3 is a schematic structural view of a semiconductor light emitting device according to a second embodiment of the present invention;
fig. 4 is a schematic structural view of a semiconductor light emitting device according to a third embodiment of the present invention;
Fig. 5 is a schematic structural view of a semiconductor light emitting device according to a fourth embodiment of the present invention.
Detailed Description
For a clearer understanding of technical features, objects and effects of the present invention, a detailed description of embodiments of the present invention will be made with reference to the accompanying drawings.
As shown in fig. 2, the semiconductor light emitting device of the first embodiment of the present invention includes a substrate 10, at least one positive electrode pad 21 and at least one negative electrode pad 22 provided on the substrate 10, at least one semiconductor light emitting chip 30 provided on the substrate 10, a phosphor layer 40 provided on the substrate 10 and surrounding the semiconductor light emitting chip 30, and an insulating layer 50 provided inside the phosphor layer 40 (toward the sides of the substrate 10 and the semiconductor light emitting chip 30), and the positive electrode 31 and the negative electrode 32 of the semiconductor light emitting chip 30 are electrically connected to the positive electrode pad 21 and the negative electrode pad 22, respectively. The insulating layer 50 is located between a part or all of the inner surface of the phosphor layer 40 and a part or all of the surface of the substrate 10, and/or the insulating layer 50 is located between a part or all of the inner surface of the phosphor layer 40 and a part or all of the side of the semiconductor light emitting chip 30.
Wherein the substrate 10 has opposite first and second surfaces, the positive electrode pad 21, the negative electrode pad 22, and the semiconductor light emitting chip 30 are selectively disposed on the first and/or second surfaces, and the positive electrode pad 21 and the negative electrode pad 22 are insulated from each other. In this embodiment, one semiconductor light emitting chip 30 is disposed on the substrate 10, and the positive electrode pad 21, the negative electrode pad 22, and the semiconductor light emitting chip 30 are disposed on the first surface of the substrate 10.
The phosphor layer 40 wraps the surface and the side of the semiconductor light emitting chip 30 away from the substrate 10. The structural layer of the phosphor layer 40 is not limited and may be a single layer or a plurality of layers. The material of phosphor layer 40 includes, but is not limited to, one or more combinations of silica gel, resin, glass glaze, ink, and paint, and is doped with one or more phosphors.
The insulating layer 50 is disposed inside the phosphor layer 40 so as to cover the lower portion of the phosphor layer 40, and is mainly used for shielding the side surface of the semiconductor light emitting chip 30, preventing the side of the semiconductor light emitting chip 30 from emitting light, and enhancing the surface light intensity. In an alternative embodiment, the insulating layer 50 is disposed between the surface of the substrate 10 (the surface of the substrate 10 on which the semiconductor light emitting chip 30 is located) and the phosphor layer 40 such that the insulating layer 50 is located below the phosphor layer 40 at the side of the semiconductor light emitting chip 30, shielding the side. In another alternative embodiment, the insulating layer 50 is disposed between the side of the semiconductor light emitting chip 30 and the phosphor layer 40 such that the insulating layer 50 is shielded from the side of the semiconductor light emitting chip 30.
The side surface of the semiconductor light emitting chip 30 is not used as a light emitting surface, but a light emitting surface is formed on the surface far away from the substrate 10 through the arrangement of the insulating layer 50 on the side surface, so that the light emitting angle is small, the front light emitting quantity of the semiconductor light emitting chip 30 is improved, and the semiconductor light emitting chip is suitable for application occasions requiring central illuminance and small light emitting angle.
In the present embodiment, as shown in fig. 2, the insulating layer 50 is disposed on the side surface of the semiconductor light emitting chip 30 and extends onto the surface of the substrate 10, and the height of the insulating layer 50 gradually decreases from one end adjacent to the side surface of the semiconductor light emitting chip 30 to the other end distant from the side surface of the semiconductor light emitting chip 30. The highest height of the insulating layer 50 is not higher than the surface height of the semiconductor light emitting chip 30 (i.e., also not higher than the side height of the semiconductor light emitting chip 30).
The phosphor layer 40 covers the surface and the side of the semiconductor light emitting chip 30 and encapsulates the insulating layer 50 therein such that the insulating layer 50 is located between the side of the semiconductor light emitting chip 30, the surface (first surface) of the substrate 10, and the phosphor layer 40. Wherein, the part of the phosphor layer 40 covering the insulating layer 50 extends along the surface of the insulating layer 50, so that the phosphor layer 40 can be bent and extended from the surface of the semiconductor light emitting chip 30 to the side surface of the insulating layer 50. The bending of phosphor layer 40 blocks its lateral light guiding action and enhances the central light intensity.
The material of the insulating layer 50 includes, but is not limited to, one or more combinations of silicone, resin, glass glaze, liquid glass, ink, and paint. The insulating layer 50 may further be doped with inorganic powder including one or more of glass powder, ceramic powder, metal powder, alloy powder, oxide powder and nitride powder, which may have one or more of micrometer, submicron and nanometer particle sizes, according to necessity. The insulating layer 50 may be filled with a corresponding powder material according to the requirements of vulcanization resistance, halogenation resistance, oxidation resistance, moisture resistance and the like.
Further, the semiconductor light emitting device further includes a positive electrode pad 23 and a negative electrode pad 24 provided on the substrate 10, and the positive electrode pad 23 and the negative electrode pad 24 are insulated from each other. The positive electrode pad 23 is electrically connected to the positive electrode pad 21, and the negative electrode pad 24 is electrically connected to the negative electrode pad 22.
Specifically, in the present embodiment, the positive electrode pad 23 and the negative electrode pad 24 are disposed on the second surface of the substrate 10, the positive electrode pad 23 is electrically connected to the positive electrode pad 21 through the first conductive post 231, and the negative electrode pad 24 is electrically connected to the negative electrode pad 22 through the second conductive post 241. The first conductive posts 231 may penetrate the substrate 10 to connect the positive electrode pads 21 and 23, or be disposed at a side of the substrate 10 to connect the positive electrode pads 21 and 23. The second conductive post 241 may connect the negative electrode pad 22 and the negative electrode pad 24 through the substrate 10, or may be disposed at a side of the substrate 10 to connect the negative electrode pad 22 and the negative electrode pad 24.
Further, a heat conducting pad 25 is provided on the base plate 10 and can be matched and connected with a heat dissipating device.
Referring to fig. 2, a method of manufacturing a semiconductor light emitting device according to a first embodiment of the present invention includes at least the steps of:
s1, preparing a positive electrode pad 21 and a negative electrode pad 22, and also preparing a positive electrode pad 23 and a negative electrode pad 24 on the substrate 10.
The substrate 10 has opposite first and second surfaces, the positive electrode pad 21 being located on the first and/or second surface of the substrate 10, the negative electrode pad 22 being located on the first and/or second surface of the substrate 10.
The positive electrode pad 23 is electrically connected to the positive electrode pad 21, and the negative electrode pad 24 is electrically connected to the negative electrode pad 22. The positive electrode pad 23 may be on the same or different surface of the substrate 10 as the positive electrode pad 21, and both may be electrically connected through the first conductive post 231, and the negative electrode pad 24 may be on the same or different surface of the substrate 10 as the negative electrode pad 22, and both may be electrically connected through the second conductive post 241.
S2, the semiconductor light emitting chip 30 is fixed on the surface of the substrate 10, and the positive electrode 31 of the semiconductor light emitting chip 30 is electrically connected to the positive electrode pad 21, and the negative electrode 32 of the semiconductor light emitting chip 30 is electrically connected to the negative electrode pad 22.
In this embodiment, the semiconductor light emitting chip 30 is fixed on the first surface of the substrate 10.
The connection between the positive electrode 31 and the positive electrode pad 21 of the semiconductor light emitting chip 30 and the connection between the negative electrode 32 and the negative electrode pad 22 include, but are not limited to, one or more of eutectic soldering, bonding, reflow soldering, ultrasonic soldering, wire interconnection.
S3, an insulating layer 50 is formed by disposing an insulating liquid on part or all of the surface of the substrate 10 and/or part or all of the side surface of the semiconductor light emitting chip 30.
When the insulating feed liquid is prepared, the material adopts one or a plurality of combinations of silica gel, resin, glass glaze, liquid glass, printing ink and paint, and is prepared into insulating glue liquid or insulating slurry doped with or not containing inorganic powder according to the requirement, wherein the inorganic powder comprises one or a plurality of glass powder, ceramic powder, metal powder, alloy powder, oxide powder and nitride powder with micron, submicron and nanometer particle sizes.
The insulating layer 50 is formed by one or more of spraying, dispensing, spin coating, and printing.
And S4, disposing the fluorescent liquid on part or all of the exposed surface and the exposed side surface of the semiconductor light-emitting chip 30 and part or all of the surface of the insulating layer 50 to form the fluorescent powder layer 40 wrapping the semiconductor light-emitting chip 30. The insulating layer 50 is located between a part or all of the inner surface of the phosphor layer 40 and a part or all of the surface of the substrate 10, and/or the insulating layer 50 is located between a part or all of the inner surface of the phosphor layer 40 and a part or all of the side of the semiconductor light emitting chip 30.
When preparing the fluorescent liquid, the material adopts one or more of silica gel, resin, glass glaze, printing ink and paint to prepare fluorescent glue solution or fluorescent slurry doped with one or more fluorescent powder. The phosphor layer 40 is formed by one or more of spraying, molding, film pressing, dispensing, evaporation, printing.
When step S4 is performed, the substrate 10 may be heated as needed, so as to facilitate the encapsulation of the phosphor layer 40. Of course, the substrate 10 may not be heated.
Referring to fig. 2, in the manufacturing method of the present embodiment, an insulating layer 50 is disposed on a side surface of the semiconductor light emitting chip 30 and extends onto the first surface of the substrate 10, and the height of the insulating layer 50 gradually decreases from one end adjacent to the side surface of the semiconductor light emitting chip 30 to the other end distant from the side surface of the semiconductor light emitting chip 30. The phosphor layer 40 is disposed on the insulating layer 50 and the semiconductor light emitting chip 30, and the semiconductor light emitting chip 30 and the insulating layer 50 are wrapped therein.
As shown in fig. 3, the semiconductor light emitting device of the second embodiment of the present invention includes a substrate 10, at least one positive electrode pad 21 and at least one negative electrode pad 22 provided on the substrate 10, at least one semiconductor light emitting chip 30 provided on the substrate 10, a phosphor layer 40 provided on the substrate 10 and surrounding the semiconductor light emitting chip 30, an insulating layer 50 provided inside the phosphor layer 40 (toward the substrate 10 and the side of the semiconductor light emitting chip 30), and at least one light shielding layer 60 provided on the phosphor layer 40.
The positive electrode 31 and the negative electrode 32 of the semiconductor light emitting chip 30 are electrically connected to the positive electrode pad 21 and the negative electrode pad 22, respectively. The insulating layer 50 is located between a part or all of the inner surface of the phosphor layer 40 and a part or all of the surface of the substrate 10, and/or the insulating layer 50 is located between a part or all of the inner surface of the phosphor layer 40 and a part or all of the side of the semiconductor light emitting chip 30. The light shielding layer 60 is provided with at least one opening exposing a portion of the phosphor layer 40.
Wherein the substrate 10 has opposite first and second surfaces, the positive electrode pad 21, the negative electrode pad 22, and the semiconductor light emitting chip 30 are selectively disposed on the first and/or second surfaces, and the positive electrode pad 21 and the negative electrode pad 22 are insulated from each other. In this embodiment, one semiconductor light emitting chip 30 is disposed on the substrate 10, and the positive electrode pad 21, the negative electrode pad 22, and the semiconductor light emitting chip 30 are disposed on the first surface of the substrate 10.
The phosphor layer 40 wraps the surface and the side of the semiconductor light emitting chip 30 away from the substrate 10. The structural layer of the phosphor layer 40 is not limited and may be a single layer or a plurality of layers. The material of phosphor layer 40 includes, but is not limited to, one or more combinations of silica gel, resin, glass glaze, ink, and paint, and is doped with one or more phosphors.
The insulating layer 50 is disposed inside the phosphor layer 40 so as to cover the lower portion of the phosphor layer 40, and is mainly used for shielding the side surface of the semiconductor light emitting chip 30, preventing the side of the semiconductor light emitting chip 30 from emitting light, and enhancing the surface light intensity. In an alternative embodiment, the insulating layer 50 is disposed between the surface of the substrate 10 (the surface of the substrate 10 on which the semiconductor light emitting chip 30 is located) and the phosphor layer 40 such that the insulating layer 50 is located below the phosphor layer 40 at the side of the semiconductor light emitting chip 30, shielding the side. In another alternative embodiment, the insulating layer 50 is disposed between the side of the semiconductor light emitting chip 30 and the phosphor layer 40 such that the insulating layer 50 is shielded from the side of the semiconductor light emitting chip 30.
The side surface of the semiconductor light emitting chip 30 is not used as a light emitting surface, but a light emitting surface is formed on the surface far away from the substrate 10 through the arrangement of the insulating layer 50 on the side surface, so that the light emitting angle is small, the front light emitting quantity of the semiconductor light emitting chip 30 is improved, and the semiconductor light emitting chip is suitable for application occasions requiring central illuminance and small light emitting angle.
In the present embodiment, as shown in fig. 3, an insulating layer 50 is provided on the side of the semiconductor light emitting chip 30 and extends onto the surface of the substrate 10. The height of the insulating layer 50 may gradually decrease from one end close to the side of the semiconductor light emitting chip 30 to the other end far from the side of the semiconductor light emitting chip 30, and the insulating layer 50 may be a structural layer with equal height, and the overall height is not higher than the surface height of the semiconductor light emitting chip 30.
The phosphor layer 40 covers the surface and the side of the semiconductor light emitting chip 30 and encapsulates the insulating layer 50 therein such that the insulating layer 50 is located between the side of the semiconductor light emitting chip 30, the surface (first surface) of the substrate 10, and the phosphor layer 40. Wherein, the part of the phosphor layer 40 covering the insulating layer 50 extends along the surface of the insulating layer 50, so that the phosphor layer 40 can be bent and extended from the surface of the semiconductor light emitting chip 30 to the side surface of the insulating layer 50. The bending of phosphor layer 40 blocks its lateral light guiding action and enhances the central light intensity.
The material of the insulating layer 50 includes, but is not limited to, one or more combinations of silicone, resin, glass glaze, liquid glass, ink, and paint. The insulating layer 50 may further be doped with inorganic powder including one or more of glass powder, ceramic powder, metal powder, alloy powder, oxide powder and nitride powder, which may have one or more of micrometer, submicron and nanometer particle sizes, according to necessity. The insulating layer 50 may be filled with a corresponding powder material according to the requirements of vulcanization resistance, halogenation resistance, oxidation resistance, moisture resistance and the like.
The light shielding layer 60 is provided on the phosphor layer 40 to further shield the side surface of the semiconductor light emitting chip 30. The opening of the light shielding layer 60 is located on the surface of the semiconductor light emitting chip 30, and does not affect the surface light emission of the semiconductor light emitting chip 30. The size of the opening may be set according to the area of the surface of the semiconductor light emitting chip 30 required to emit light.
The material of the light shielding layer 60 includes, but is not limited to, one or more combinations of aluminum and its alloys, gold and its alloys, silver and its alloys, nickel and its alloys, titanium and its alloys, glass enamel, ink, liquid glass, paint, titanium oxide, zinc oxide, silicon oxide, aluminum nitride, silicon nitride, aluminum oxide, and the like. Or the material of the light shielding layer 60 includes, but is not limited to, one or more combinations of silica gel, resin, liquid glass, glass glaze, ink, and paint, and is doped with inorganic powder including one or more combinations of glass powder, ceramic powder, metal powder, alloy powder, oxide powder, and nitride powder of micrometer, submicron, nanometer particle size.
The light shielding layer 60 has the side light preventing effect and the insulating effect, and can be added with corresponding powder according to the requirements of vulcanization resistance, halogenation resistance, oxidation resistance, moisture resistance and the like.
Further, the semiconductor light emitting device further includes a positive electrode pad 23 and a negative electrode pad 24 provided on the substrate 10, and the positive electrode pad 23 and the negative electrode pad 24 are insulated from each other. The positive electrode pad 23 is electrically connected to the positive electrode pad 21, and the negative electrode pad 24 is electrically connected to the negative electrode pad 22.
Specifically, in the present embodiment, the positive electrode pad 23 and the negative electrode pad 24 are disposed on the second surface of the substrate 10, the positive electrode pad 23 is electrically connected to the positive electrode pad 21 through the first conductive post 231, and the negative electrode pad 24 is electrically connected to the negative electrode pad 22 through the second conductive post 241. The first conductive posts 231 may penetrate the substrate 10 to connect the positive electrode pads 21 and 23, or be disposed at a side of the substrate 10 to connect the positive electrode pads 21 and 23. The second conductive post 241 may connect the negative electrode pad 22 and the negative electrode pad 24 through the substrate 10, or may be disposed at a side of the substrate 10 to connect the negative electrode pad 22 and the negative electrode pad 24.
Further, a heat conducting pad 25 is provided on the base plate 10 and can be matched and connected with a heat dissipating device.
Referring to fig. 3, a method of manufacturing a semiconductor light emitting device according to a second embodiment of the present invention includes at least the steps of:
s1, preparing a positive electrode pad 21 and a negative electrode pad 22, and also preparing a positive electrode pad 23 and a negative electrode pad 24 on the substrate 10.
The substrate 10 has opposite first and second surfaces, the positive electrode pad 21 being located on the first and/or second surface of the substrate 10, the negative electrode pad 22 being located on the first and/or second surface of the substrate 10.
The positive electrode pad 23 is electrically connected to the positive electrode pad 21, and the negative electrode pad 24 is electrically connected to the negative electrode pad 22. The positive electrode pad 23 may be on the same or different surface of the substrate 10 as the positive electrode pad 21, and both may be electrically connected through the first conductive post 231, and the negative electrode pad 24 may be on the same or different surface of the substrate 10 as the negative electrode pad 22, and both may be electrically connected through the second conductive post 241.
S2, the semiconductor light emitting chip 30 is fixed on the surface of the substrate 10, and the positive electrode 31 of the semiconductor light emitting chip 30 is electrically connected to the positive electrode pad 21, and the negative electrode 32 of the semiconductor light emitting chip 30 is electrically connected to the negative electrode pad 22.
In this embodiment, the semiconductor light emitting chip 30 is fixed on the first surface of the substrate 10.
The connection between the positive electrode 31 and the positive electrode pad 21 of the semiconductor light emitting chip 30 and the connection between the negative electrode 32 and the negative electrode pad 22 include, but are not limited to, one or more of eutectic soldering, bonding, reflow soldering, ultrasonic soldering, wire interconnection.
S3, an insulating layer 50 is formed by disposing an insulating liquid on part or all of the surface of the substrate 10 and/or part or all of the side surface of the semiconductor light emitting chip 30.
When the insulating feed liquid is prepared, the material adopts one or a plurality of combinations of silica gel, resin, glass glaze, liquid glass, printing ink and paint, and is prepared into insulating glue liquid or insulating slurry doped with or not containing inorganic powder according to the requirement, wherein the inorganic powder comprises one or a plurality of glass powder, ceramic powder, metal powder, alloy powder, oxide powder and nitride powder with micron, submicron and nanometer particle sizes.
The insulating layer 50 is formed by one or more of spraying, dispensing, spin coating, and printing.
And S4, disposing the fluorescent liquid on part or all of the exposed surface and the exposed side surface of the semiconductor light-emitting chip 30 and part or all of the surface of the insulating layer 50 to form the fluorescent powder layer 40 wrapping the semiconductor light-emitting chip 30. The insulating layer 50 is located between a part or all of the inner surface of the phosphor layer 40 and a part or all of the surface of the substrate 10, and/or the insulating layer 50 is located between a part or all of the inner surface of the phosphor layer 40 and a part or all of the side of the semiconductor light emitting chip 30.
When preparing the fluorescent liquid, the material adopts one or more of silica gel, resin, glass glaze, printing ink and paint to prepare fluorescent glue solution or fluorescent slurry doped with one or more fluorescent powder. The phosphor layer 40 is formed by one or more of spraying, molding, film pressing, dispensing, evaporation, printing.
When step S4 is performed, the substrate 10 may be heated as needed, so as to facilitate the encapsulation of the phosphor layer 40. Of course, the substrate 10 may not be heated.
In the manufacturing method of the embodiment, the insulating layer 50 is disposed on the side surface of the semiconductor light emitting chip 30 and extends to the first surface of the substrate 10, the height of the insulating layer 50 may gradually decrease from one end close to the side surface of the semiconductor light emitting chip 30 to the other end far from the side surface of the semiconductor light emitting chip 30, the insulating layer 50 may be a structural layer with equal height, and the overall height is not higher than the surface height of the semiconductor light emitting chip 30.
The phosphor layer 40 is disposed on the insulating layer 50 and the semiconductor light emitting chip 30, and the semiconductor light emitting chip 30 and the insulating layer 50 are wrapped therein.
S5, reserving an opening position on the fluorescent powder layer 40, and arranging a shading layer 60 on the surface of the fluorescent powder layer 40 outside the opening position, wherein an opening 61 of the shading layer 60 is formed at the opening position, and part of the fluorescent powder layer 40 is exposed.
The light shielding layer 60 is formed by one or more of evaporation, spraying, spin coating, printing, and dispensing. The opening is located above the surface of the semiconductor light emitting chip 30, so that the opening 61 is located on the surface of the semiconductor light emitting chip 30 to form a light emitting surface on the surface, and the light shielding layer 60 shields the side surface of the semiconductor light emitting chip 30 from light.
As shown in fig. 4, the semiconductor light emitting device of the third embodiment of the present invention includes a substrate 10, at least one positive electrode pad 21 and at least one negative electrode pad 22 provided on the substrate 10, at least one semiconductor light emitting chip 30 provided on the substrate 10, a phosphor layer 40 provided on the substrate 10 and surrounding the semiconductor light emitting chip 30, and an insulating layer 50 provided inside the phosphor layer 40 (toward the sides of the substrate 10 and the semiconductor light emitting chip 30), and the positive electrode 31 and the negative electrode 32 of the semiconductor light emitting chip 30 are electrically connected to the positive electrode pad 21 and the negative electrode pad 22, respectively. The insulating layer 50 is located between a part or all of the inner surface of the phosphor layer 40 and a part or all of the surface of the substrate 10, and/or the insulating layer 50 is located between a part or all of the inner surface of the phosphor layer 40 and a part or all of the side of the semiconductor light emitting chip 30.
Wherein the substrate 10 has opposite first and second surfaces, the positive electrode pad 21, the negative electrode pad 22, and the semiconductor light emitting chip 30 are selectively disposed on the first and/or second surfaces, and the positive electrode pad 21 and the negative electrode pad 22 are insulated from each other. In this embodiment, two (or more) semiconductor light emitting chips 30 are provided on the substrate 10, and the positive electrode pad 21, the negative electrode pad 22, and the semiconductor light emitting chips 30 are provided on the first surface of the substrate 10.
The semiconductor light emitting device further includes a positive electrode pad 23 and a negative electrode pad 24 disposed on the substrate 10, and the positive electrode pad 23 and the negative electrode pad 24 are insulated from each other. The positive electrode pad 23 is electrically connected to the positive electrode pad 21, and the negative electrode pad 24 is electrically connected to the negative electrode pad 22. In the present embodiment, the positive electrode pad 23 and the negative electrode pad 24 are respectively located on opposite sides of the two semiconductor light emitting chips 30, and are respectively disposed on the positive electrode pad 21 and the negative electrode pad 22, so as to achieve electrical connection.
A conductive circuit 26 is disposed between two opposite sides of the two semiconductor light emitting chips 30, and the conductive circuit 26 is disposed on the substrate 10 and electrically connected to the positive electrode 31 and the negative electrode 32 corresponding to the two semiconductor light emitting chips 30.
The phosphor layer 40 wraps the surface and the side of the semiconductor light emitting chip 30 away from the substrate 10. The insulating layer 50 is disposed inside the phosphor layer 40 so as to cover the lower portion of the phosphor layer 40, and is mainly used for shielding the side surface of the semiconductor light emitting chip 30, preventing the side of the semiconductor light emitting chip 30 from emitting light, and enhancing the surface light intensity.
Further, in the present embodiment, the phosphor layers 40 on each of the semiconductor light emitting chips 30 may be independent of each other, not connected, or the phosphor layers 40 on two adjacent semiconductor light emitting chips 30 may be connected as one body. The insulating layers 50 of two adjacent semiconductor light emitting chips 30 may also be connected to form one body.
The arrangement and material selection of the insulating layer 50 and the phosphor layer 40 may be described with reference to the first embodiment, and will not be described herein.
As shown in fig. 5, the semiconductor light emitting device of the fourth embodiment of the present invention includes a substrate 10, at least one positive electrode pad 21 and at least one negative electrode pad 22 provided on the substrate 10, at least one semiconductor light emitting chip 30 provided on the substrate 10, a phosphor layer 40 provided on the substrate 10 and surrounding the semiconductor light emitting chip 30, an insulating layer 50 provided inside the phosphor layer 40 (toward the substrate 10 and the side of the semiconductor light emitting chip 30), and at least one light shielding layer 60 provided on the phosphor layer 40.
The positive electrode 31 and the negative electrode 32 of the semiconductor light emitting chip 30 are electrically connected to the positive electrode pad 21 and the negative electrode pad 22, respectively. The insulating layer 50 is located between a part or all of the inner surface of the phosphor layer 40 and a part or all of the surface of the substrate 10, and/or the insulating layer 50 is located between a part or all of the inner surface of the phosphor layer 40 and a part or all of the side of the semiconductor light emitting chip 30. The light shielding layer 60 is provided with at least one opening exposing a portion of the phosphor layer 40.
Wherein the substrate 10 has opposite first and second surfaces, the positive electrode pad 21, the negative electrode pad 22, and the semiconductor light emitting chip 30 are selectively disposed on the first and/or second surfaces, and the positive electrode pad 21 and the negative electrode pad 22 are insulated from each other. In this embodiment, two (or more) semiconductor light emitting chips 30 are provided on the substrate 10, and the positive electrode pad 21, the negative electrode pad 22, and the semiconductor light emitting chips 30 are provided on the first surface of the substrate 10.
The semiconductor light emitting device further includes a positive electrode pad 23 and a negative electrode pad 24 disposed on the substrate 10, and the positive electrode pad 23 and the negative electrode pad 24 are insulated from each other. The positive electrode pad 23 is electrically connected to the positive electrode pad 21, and the negative electrode pad 24 is electrically connected to the negative electrode pad 22. In the present embodiment, the positive electrode pad 23 and the negative electrode pad 24 are respectively located on opposite sides of the two semiconductor light emitting chips 30, and are respectively disposed on the positive electrode pad 21 and the negative electrode pad 22, so as to achieve electrical connection.
A conductive circuit 26 is disposed between two opposite sides of the two semiconductor light emitting chips 30, and the conductive circuit 26 is disposed on the substrate 10 and electrically connected to the positive electrode 31 and the negative electrode 32 corresponding to the two semiconductor light emitting chips 30.
The phosphor layer 40 wraps the surface and the side of the semiconductor light emitting chip 30 away from the substrate 10. The insulating layer 50 is disposed inside the phosphor layer 40 so as to cover the lower portion of the phosphor layer 40, and is mainly used for shielding the side surface of the semiconductor light emitting chip 30, preventing the side of the semiconductor light emitting chip 30 from emitting light, and enhancing the surface light intensity.
The light shielding layer 60 is provided on the phosphor layer 40 to further shield the side surface of the semiconductor light emitting chip 30. The opening of the light shielding layer 60 is located on the surface of the semiconductor light emitting chip 30, and does not affect the surface light emission of the semiconductor light emitting chip 30. The size of the opening may be set according to the area of the surface of the semiconductor light emitting chip 30 required to emit light.
Further, in the present embodiment, the phosphor layers 40 on each of the semiconductor light emitting chips 30 may be independent of each other, not connected, or the phosphor layers 40 on two adjacent semiconductor light emitting chips 30 may be connected as one body. The insulating layer 50 and the light shielding layer 60 of two adjacent semiconductor light emitting chips 30 may be connected to form a single body.
The arrangement and material selection of the insulating layer 50, the phosphor layer 40 and the light shielding layer 60 may be described with reference to the second embodiment, and will not be described herein.
In addition, the manufacturing methods of the semiconductor light emitting device according to the third embodiment and the fourth embodiment can also refer to the manufacturing methods of the first embodiment and the second embodiment, and are not described herein again.
In summary, the manufacturing method of the semiconductor light-emitting device has short flow, simple process and low manufacturing cost, and is suitable for mass industrialized production in large area.
The foregoing description is only illustrative of the present invention and is not intended to limit the scope of the invention, and all equivalent structures or equivalent processes or direct or indirect application in other related technical fields are included in the scope of the present invention.
Claims (7)
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| CN111162065A (en) * | 2020-01-21 | 2020-05-15 | 深圳大道半导体有限公司 | Semiconductor light-emitting device and method of manufacturing the same |
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