CN107810600A - 具有单端输入的平衡差分跨阻放大器以及平衡方法 - Google Patents
具有单端输入的平衡差分跨阻放大器以及平衡方法 Download PDFInfo
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- CN107810600A CN107810600A CN201680020336.1A CN201680020336A CN107810600A CN 107810600 A CN107810600 A CN 107810600A CN 201680020336 A CN201680020336 A CN 201680020336A CN 107810600 A CN107810600 A CN 107810600A
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- H03F2203/45—Indexing scheme relating to differential amplifiers
- H03F2203/45594—Indexing scheme relating to differential amplifiers the IC comprising one or more resistors, which are not biasing resistor
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- H03F2203/00—Indexing scheme relating to amplifiers with only discharge tubes or only semiconductor devices as amplifying elements covered by H03F3/00
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- H03F2203/45652—Indexing scheme relating to differential amplifiers the LC comprising one or more further dif amp stages, either identical to the dif amp or not, in cascade
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- H—ELECTRICITY
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- H03F2203/00—Indexing scheme relating to amplifiers with only discharge tubes or only semiconductor devices as amplifying elements covered by H03F3/00
- H03F2203/45—Indexing scheme relating to differential amplifiers
- H03F2203/45682—Indexing scheme relating to differential amplifiers the LC comprising one or more op-amps
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- H03F—AMPLIFIERS
- H03F2203/00—Indexing scheme relating to amplifiers with only discharge tubes or only semiconductor devices as amplifying elements covered by H03F3/00
- H03F2203/45—Indexing scheme relating to differential amplifiers
- H03F2203/45702—Indexing scheme relating to differential amplifiers the LC comprising two resistors
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Abstract
在输入信号的动态范围的宽变化上可工作的具有单端输入的平衡差分跨阻放大器。采用阈值电路以实现以下中的一项或组合:(1)生成变化的决策阈值来确保在输入电流信号电平的宽范围上的正确划分;以及(2)生成施加到跨阻级的输入的偏置电流和电压以消除跨阻级电压输入对输入电流信号电平的依赖。
Description
相关申请的交叉引用
本申请要求2015年4月3日提交的美国临时申请No.62/142,558和2015年7月30日提交的美国非临时申请No.14/814,080的权益,其完整内容在此通过引用并入本文。
技术领域
本文的主题总体上涉及数字电路和模拟电路以及信号和关联的放大技术。具体地,本发明涉及用于放大数字信号和模拟信号的跨阻放大器。
背景技术
在各种应用中,期望进行电子数字信号和模拟信号的放大。在光电子应用中,输入电子信号可能是例如由光电二极管生成的电流。可以还期望放大处理生成输出电压信号。为了从输入电流信号生成输出电压信号,可以利用跨阻放大器。
图1描绘了使用双极技术的单端跨阻放大器的示意图。双极晶体管104经由电压源112和108偏置。处于从双极晶体管104的输出节点110到双极晶体管104的输入节点116的反馈配置的电阻器114提供双极晶体管104的改进的带宽和其他放大特性。输入电流102在输入节点116提供到双极晶体管104,其生成电阻器106上的输出电流(未示出),该输出电流转而在节点110处生成跨电阻器106的输出电压。
通常重要的是跨阻放大器能够放大跨越宽频率范围的输入信号,并且因此该放大器呈现宽的带宽。这是例如在高速数字基带通信信道中是有用的。用于增大跨阻放大器的带宽的一种方法涉及利用位于放大器的输入处的电流缓冲器,该电流缓冲器将在放大器的输入处呈现的源阻抗与趋向于主导跨阻放大器的输入阻抗的反馈电阻解耦。电流缓冲器可以显著减小跨阻放大器的输入阻抗,降低输入处的电容性负载对放大器的带宽的影响。例如,美国专利6,801,084描述一种单端跨阻放大器,其中,通过使用输入电流缓冲器提高放大器的工作带宽。
然而,由于在节点110处的输出电压摆动降低了装置104的VCE,诸如图1所示的单端跨阻放大器一般不良好适用于必须放大跨宽动态范围的输入信号的应用。随着输入电流、以及对应的输出电压变大,装置104的VCE不再足以维持类别A线性工作并且导致输出波形的变形。
发明内容
本文的实施方式描述一种具有单端输入的平衡差分跨阻放大器,该平衡差分跨阻放大器包括:差分跨阻级,该差分跨阻级进一步包括第一输入和第二输入;输入电流缓冲器级,其中,所述输入电流缓冲器级的输出耦接到所述跨阻级的所述第一输入;以及阈值电路,该阈值电路用于生成阈值电压,该阈值电压用于平衡所述差分跨阻级,其中,所述阈值电路的输出耦接到所述跨阻级的所述第二输入。
本文的实施方式还描述一种具有单端输入的平衡差分跨阻放大器,该平衡差分跨阻放大器包括:跨阻级,该跨阻级包括差分对,该差分对进一步包括第一输入、第二输入、第一输出和第二输出;输入电流缓冲器级,其中所述输入电流缓冲器级的输出耦接到所述跨阻级的所述第一输入;以及阈值电路,该阈值电路还包括电压平均电路,其中,所述电压平均电路的输出耦接到所述跨阻级的所述第二输入,并且所述跨阻级的所述第一输出和所述第二输出耦接到所述电压平均电路的相应的第一输入和第二输入。
本文的实施方式还描述一种具有单端输入的平衡差分跨阻放大器,该平衡差分跨阻放大器包括:跨阻级,该跨阻级包括差分对,该差分对进一步包括第一输入以及第二输入,输入电流缓冲器,该输入电流缓冲器包括第一输入和第二输入,其中,输入电流源耦接到所述输入电流缓冲器的所述第一输入,并且所述输入电流缓冲器的输出耦接到所述跨阻级的所述第一输入;电流平均电路,该电流平均电路串联耦接在所述输入电流源和所述输入电流缓冲器的所述第二输入之间,其中,所述电流平均电路接收所述输入电流源并且基于所述输入电流源生成直流(DC)时间平均信号;以及阈值电路,其中,所述阈值电路的输出耦接到所述跨阻级的所述第二输入。
附图说明
图1描绘了使用双极技术的现有技术的单端跨阻放大器的示意图。
图2A是根据一个实施方式的具有单端输入的平衡差分跨阻放大器的框图。
图2B是根据一个实施方式的利用适当阈值电压的具有单端输入的平衡差分共发射极跨阻放大器的示意图。
图3A是根据一个实施方式的利用电流平均阈值电路的具有单端输入的平衡差分跨阻放大器的框图。
图3B是根据一个实施方式的利用电流平均阈值电路的具有单端输入的平衡差分共发射极跨阻放大器的示意图。
图4A是根据一个实施方式的利用电压平均阈值电路的具有单端输入的平衡差分跨阻放大器的框图。
图4B是根据一个实施方式的利用电压平均阈值电路的具有单端输入的平衡差分共发射极跨阻放大器的示意图。
图5A是根据一个实施方式的利用电流平均电路来控制输入电流缓冲器的偏置和固定阈值电路的具有单端输入的平衡差分跨阻放大器的框图。
图5B是根据一个实施方式的利用电流平均电路来控制输入电流缓冲器的偏置和固定阈值电路的具有单端输入的平衡差分跨阻放大器的示意图。
图6A是根据一个实施方式的利用电流平均电路来控制输入电流缓冲器的偏置和电压平均阈值电路这两者的具有单端输入的平衡差分跨阻放大器的框图。
图6B是根据一个实施方式的利用主共基极输入缓冲器的镜像副本来控制主输入电流缓冲器的偏置和电压平均阈值电路这两者的具有单端输入的平衡差分跨阻放大器的示意图。
具体实施方式
本文描述用于放大跨宽动态范围的输入信号的具有单端输入的平衡差分跨阻放大器的示例性实施方式。
除了带宽考虑,在诸如光电子系统这样的应用中,重要的是跨阻放大器呈现宽动态范围,使得其能够放大跨宽振幅范围的输入信号。此外,由于差分信号针对诸如高速数据通信这样的应用的固有的信号完整性和传输优点,可以期望采用差分跨阻放大器。例如,光纤信号的放大通常要求通过扩展小信号噪声/带宽限制来使动态范围最大化以及相对于传统拓扑使大的信号过载能力的最大化这两者。这直接转换为减小的光学驱动功率要求,这对于减小功率消耗和增大可靠性和/或增大传输距离是期望的。
图2A是根据一个实施方式的具有单端输入的平衡差分跨阻放大器的框图。平衡差分跨阻放大器200可以包括输入电流缓冲器204、阈值电路206和差分跨阻放大器208。
差分跨阻放大器208经由第一差分输入212(a)和第二差分输入212(b)接收差分输入信号(图2A中未示出)以经由差分输出214(a)和214(b)生成差分输出信号(图2A中未示出)。通常差分跨阻放大器208可以在差分输入212(a)接收单端输入电流。差分放大器208可以还在差分输入212(b)接收DC阈值电压。根据一个实施方式,在输入212(b)接收的DC阈值电压可以与施加到差分输入212(a)的输入电流的DC平均值有关。响应于施加到输入212(a)和212(b)的输入信号,差分跨阻放大器经由差分输入214(a)和214(b)生成差分输入电压。
输入电流缓冲器204可以改进差分跨阻放大器208的带宽特性,通过,例如,将呈现于放大器的输入处的输入源阻抗与放大器自身的输入阻抗解耦。参照图2A,输入电流缓冲器204经由缓冲器输入220电流接收输入信号202并且经由电流缓冲器输出218生成输出信号(图2A中未示出)。电流缓冲器输出218耦接到差分跨阻放大器208的第一差分输入212(a)。
通常,差分跨阻放大器208不能够容许输入212(a)处的输入信号的宽动态范围。根据一个实施方式,为了增大此工作范围,阈值电路206通过确定在输入信号电平的宽范围上针对差分跨阻放大器208的最优阈值,提供针对差分跨阻放大器208的平衡操作。具体地,关于在图2A中描绘的实施方式,阈值电路206相对于输入信号生成固定电压信号,该固定电压信号施加到差分跨阻放大器208的输入212(b)。
阈值电路206经由阈值电路输出216生成输出信号(图2A中未示出),该输出信号提供到差分跨阻放大器208的输入212(b)。同时,输入电流缓冲器的输出信号(图2A中未示出)提供到差分跨阻放大器208的第一输入212(a)。
虽然如在图2A中描绘的实施方式中所示,如例如在阈值电路206相对于输入信号生成固定电压信号的情况下阈值电路206可以不接收任何输入信号,但在另选实施方式中,阈值电路206可以接收一个或更多个输入信号以进行针对差分跨阻放大器208的平衡操作。如在以下各个实施方式中描述的,为了进行此平衡操作,阈值电路206可以对平衡差分跨阻放大器200内部或外部的电流、电压或一些其他信号进行平均。
例如,根据如本文所描述的实施方式,阈值电路206可以接收包括平衡差分跨阻放大器200内部或外部的电流或电压信号在内的输入信号。阈值电路206接收一个或更多个输入信号的实施方式的示例参照图3A到图4B和图6A到图6B描述。
图2B是根据一个实施方式的利用适当阈值电压的具有单端输入的平衡差分共发射极跨阻放大器的示意图。在图2B中示出的实施方式可以被利用以放大诸如由光电二极管(图2B中未示出)生成的从光信号生成的电流。如在图2B中所描绘的,跨阻放大器200可以被采用以将单端电流信号202转换为输出214a、214b处的差分输出电压,诸如用于光纤接收器中的应用。然而,很多其他应用是可能的。在图2B中描绘的拓扑相比于传统单端反馈跨阻放大器具有很多优点,如将在以下描述。
参照图2B,平衡差分跨阻放大器200包括差分跨阻放大器208、输入电流缓冲器204和阈值电路206。
根据一个实施方式,差分跨阻放大器208是差分对,该差分对包括第一共发射极220(a)和第二共发射极220(b)。第一共发射极220(a)包括双极晶体管104(b)、反馈电阻器106(d)和负载电阻器106(b)。第二共发射极220包括双极晶体管104(c)、反馈电阻器106(e)和负载电阻器106(c)。两个共发射极104(b)和104(c)共享单个尾巴电流偏置源222并且可以作为线性差分对或开关差分对工作。差分对(220(a)和220(b))过渡到压缩开关模式的能力去除了当跨阻放大器必须维持在线性工作模式时出现的对跨阻增益/最大输入信号电平的传统的限制。
如本文对于图2B中描绘的实施方式以及在图3B、图4B、图5B和图6B中描绘的实施方式中提到的,在双极器件的基极104(b)处对共发射极220(a)的输入称为被驱动输入,而在双极器件的基极140(c)处对共发射极220(b)的输入被称为非被驱动输入。
根据图2B所示的实施方式,输入电流缓冲器204是公基极级。输入电流缓冲器204将与输入源202关联的输入源阻抗和差分跨阻放大器208的输入阻抗解耦,该输入阻抗趋向于由反馈电阻器106(d)的值主导。这种采用输入电流缓冲器204允许利用具有较大值的反馈电阻器来在没有与输入分流电容的合并关联的通常带宽减小和输入阻抗增大的情况下,改进受噪声限制的灵敏度。
此外,根据在图2B中描绘的实施方式,阈值电路206包括固定电压源108,其适合于使在被驱动输入处呈现的输入信号平衡。该阈值电压可以通过多种方式得到,包括以下实施方式中所展现的方式。
共发射极220(a)由输入电流缓冲器204的输出驱动。在另一方面,共发射极220(b)耦接到阈值电路206(非被驱动输入),阈值电路206在本实施方式中向第二共发射极220(b)的输入提供固定电压阈值108。
具体地,输入电流信号202被提供到输入电流缓冲器204(共基极级)的输入。输入电流缓冲器204生成输出信号(图2B中未示出),其被提供以在双极晶体管104(b)的基极处驱动共发射极220(a)的输入。在另一个方面,阈值电路206经由电压源108生成固定电压信号,其被提供到共发射极220(b)的输入(基极)。
差分跨阻放大器208根据在双极晶体管相应的相应基极104(b)和104(c)处接收的差分输入信号,生成跨节点214(a)和214(b)的差分输出信号。具体地,共发射极220(a)在输出节点214(a)处生成跨负载电阻器106(b)的输出电压。类似地,共发射极220(b)在输出节点106(c)处生成跨负载电阻器106(c)的输出电压。
除了以上关于图2B描绘的拓扑描述的优点,共发射极差分对从线性到开关工作模式的过渡允许增大的大信号能力,增大了动态范围。此外,跨阻放大器208自身处理单端到差分的转换,这通常要求附加电路。
尽管图2B描绘双极实现方式,根据另选实施方式,图2B所示的示意图可以使用共栅极输入缓冲器和差分共漏极级在金属氧化物半导体(MOS)技术中实现。
在特定应用中,输入信号202可以在电路的工作动态范围上在多个数量级上改变。随着共发射极220(a)中的被驱动双极晶体管104(b)的平均基极电压与平均输入电流直接成比例,在没有正确处理的情况下使用简单固定阈值电压108用于如图2B所描绘的阈值电路206经常是不实际的。具体地,使用固定电压源108确定划分阈值会导致受限制的动态范围和/或跨差分输出214(a)和214(b)的输出电压波形的显著变形。
为了减轻该潜在问题,在图3A至图6B例示的各个实施方式在预期平均输入电流202的宽变化上可操作,该宽变化表征在诸如光电子这样的各种应用中预期的工作动态范围。
根据在图3A至图4B描绘的实施方式例示的一种方案,变化的决策阈值被生成以确保在输入电流信号电平的宽范围上的正确划分。
根据在图5A至图5B描绘的实施方式中例示的另一种方案,共基极级的偏置电流和基极电压被操纵以消除被驱动共发射极装置基极电压对输入电流信号电平的依赖。该方案可以还容易应用于MOS技术中,其中,类似地共源极级的栅极电压可以被操纵以消除被驱动共栅极级的依赖。
图6A至图6B例示了同时应用两种方案的实施方式。
图3A是根据一个实施方式的利用电流平均阈值电路的具有单端输入的平衡差分跨阻放大器的框图。如图3A所描绘的,平衡差分跨阻放大器200可以包括输入电流缓冲器204、阈值电路206和差分跨阻放大器208。
在图3A描绘的实施方式中,阈值电路206包括电流平均电路302和副本电流缓冲器304。输入信号202提供到输入电流缓冲器204,其在输入电流缓冲器输出218处生成输出信号(在图3A中未示出),该输出信号接着经由输入212(a)提供到差分跨阻放大器208。
如图3A所示,输入信号202同时提供到包括电流平均电路302和副本电流缓冲器304在内的阈值电路206。根据一个实施方式,电流平均电路302可以对输入信号202滤波以生成输入信号202的时间平均DC分量(图3A中未示出),该DC分量被提供到副本电流缓冲器304。根据一个实施方式,副本电流缓冲器304是具有与输入电流缓冲器204类似或相同的特性的电流缓冲器。副本电流缓冲器304经由阈值电路输出216生成输出信号,该输出信号提供到差分跨阻放大器208的输入212(b)。
差分跨阻放大器208按照前面关于图2A描述的来操作。具体地,差分跨阻放大器208经由第一差分输入212(a)和第二差分输入212(b)接收差分输入信号(图2A中未示出)以经由差分输出214(a)和214(b)生成差分输出信号(图2A中未示出)。
根据一个实施方式,输入电流缓冲器204和副本电流缓冲器304假定为相同的,并且均被呈现相同的经滤波或未经滤波的输入电流信号202。因此,对差分跨阻放大器208的输入以及其随后的输出固有地是平衡的,得到在输入电流电平的宽范围上的正确操作。
图3B是根据一个实施方式的利用电流平均阈值电路的具有单端输入的平衡差分共发射极跨阻放大器的示意图。图3B示出输入电流202可以例如从光电二极管(未示出)生成。根据此实施方式,副本共基极输入级304和平均输入电流(图3B中未示出)的镜像拷贝被利用以在共发射极220(b)输入(非被驱动)处生成阈值电压,以基于输入电流信号202设定针对差分对208的位于中间点的划分阈值。
参照图3B,输入电路缓冲器204被实现为在此称为“主共基极级”,其包括双极晶体管104(a)和电阻器106(f)。根据此实施方式,在此称为“副本共基极级”的副本电流缓冲器304利用双极晶体管104(d)和电阻器106(g)被实现为共基极级,双极晶体管104(d)和电阻器106(g)具有与主共基极级204(a)对应且相应的部件(即双极晶体管104(a)和电阻器106(f))相等的尺寸和特性。
包括p沟道场发射晶体管(PFET)330(b)、330(c)和330(d)的共基极级偏置镜340与晶体管104(a)和104(d)的共享基极电压组合造成主共基极级204和副本共基极级304被相同偏置。
图3B还示出包括PFET 330(a)和330(e)的检测器电流镜342。检测器电流镜342将输入电流的DC时间平均值的经滤波拷贝输入到副本共基极级304。
根据一个实施方式,检测器电流镜342的PFET假设为具有比输入源(图3B中未示出)生成的输入电流数据的最小数据频率含量低的多的频率响应,该输入源生成输入电流202。如果不是这种情况,则检测器电流镜342PFET器件330(a)的栅极/漏极可以被电容性地加载,确保注入到副本共基极级204(b)的电流等于输入电流的DC平均值并且交流电流(AC)含量被充分滤除。
根据一个实施方式,差分跨阻放大器208是差分对,该差分对包括第一共发射极220(a)和第二共发射极220(b)。第一共发射极220(a)包括双极晶体管104(b)、反馈电阻器106(d)和负载电阻器106(b)。第二共发射极220包括双极晶体管104(c)、反馈电阻器106(e)和负载电阻器106(c)。
假设由例如光电二极管生成的输入信号202中的输入数据含量是DC平衡的,到副本共基极级304的电流将等于由电流源202提供的输入电流摆动的中间点。这将得到到共发射极220(a)和220(b)两者的输入信号和输出电压214(a)和214(b)的平衡。因此,输出电压214(a)和214(b)将对于输入电流振幅的宽范围是对称且良好平衡的并且与差分跨阻放大器208是工作在线性还是在开关模式无关。
虽然图3B描绘了双极实现方式,但根据另选实施方式,图3B所示的示意图还可以使用共栅极级、副本共栅极级和差分共源极级在MOS技术中实现。
图4A是根据一个实施方式的利用电压平均阈值电路的具有单端输入的平衡差分跨阻放大器的框图。如图4A所示,平衡差分跨阻放大器200可以包括输入电流缓冲器204、阈值电路206和差分跨阻放大器208。
差分跨阻放大器208按照前面关于图2A描述的来操作。具体地,差分跨阻放大器208经由第一差分输入212(a)和第二差分输入212(b)接收差分输入信号(图4A中未示出),以经由差分输出214(a)和214(b)生成差分输出信号(图2A中未示出)。
根据一个实施方式,阈值电路206可以包括电压平均电路402,其允许生成适当变化的决策阈值,该阈值要施加于差分跨阻放大器208来确保在电流信号电平的宽范围上的正确划分。根据一个实施方式,电压平均电路402对经由差分输出214(a)和214(b)从跨阻放大器208接收的差分输出信号进行平均。关于图4B描述用于进行电压平均的示例性实施方式和拓扑。
差分跨阻放大器208的差分输出信号214(a)和214(b)提供到阈值电路206中的电压平均电路402。电压平均电路402生成阈值电路206的输出216处的平均电压信号(图4A中未示出),该平均电压信号接着提供到差分跨阻放大器208的输入212(b),因而建立用于放大输入信号202的适当划分阈值。
输入信号202提供到输入电流缓冲器204,电流缓冲器204在输出218处生成输出信号(在图4A中未示出),该输出信号接着经由输入212(a)提供到差分跨阻放大器208。
图4B是根据一个实施方式的利用电压平均阈值电路的具有单端输入的平衡差分共发射极跨阻放大器的示意图。如前面关于图2B和图3B描述的,差分跨阻放大器208可以被实现为差分对,该差分对包括第一共发射极220(a)和第二共发射极220(b)。第一共发射极220(a)包括双极晶体管104(b)、反馈电阻器106(d)和负载电阻器106(b)。第二共发射极220包括双极晶体管104(c)、反馈电阻器106(e)和负载电阻器106(c)。
如图4B所示,阈值电路206生成在共发射极220(b)的输入处的可变的阈值电压,以在输入信号电平的宽范围上维持用于差分对208的居中的划分电平。
根据一个实施方式,阈值电路206包括处于低频率反馈环中的一个或更多个放大器,以生成正确阈值电压来维持平衡输出。具体地,根据图4B所示的实施方式,阈值电路206包括采样电路424和增益电路422。采样电路424可以包括高阻抗运算放大器,该高阻抗运算放大器接收差分输入信号并且生成单端输出信号。可选的增益电路422包括任意数量的增益级,增益级可以也被实现为差分放大器,诸如可以被要求来向采样电路424呈现充分的输入电压振幅来生成在共发射极220(b)(非被驱动)的输入的适当阈值电压。
如果阈值电路206被实现为可能包括如图4B所描绘的采样电路424和增益电路422在内的一个或更多个运算放大器,则阈值电路206将尝试创建将其输入214(a)、214(b)之间的差驱动到零的输出电压。只要包括阈值电路206的这种运算放大器的频率响应比输入信号202中的最小数据频率含量低的多,则阈值电路206将对在其输入214(a)、214(b)处的时间变化电压信号的仅DC平均值做出响应。利用这个设置,阈值电路206包括低频率反馈环,该低频率反馈环将针对在共发射极220(a)(被驱动)输入处的宽范围的输入电流信号电平202以及输入电压创建针对差分对208的正确的中间点阈值/划分电压。
图5A是根据一个实施方式的利用电流平均电路来控制输入电流缓冲器的偏置和固定阈值电路的具有单端输入的平衡差分跨阻放大器的框图。根据此实施方式,电流平均电路302按照前面关于图3A描述的来工作,并且关于输入电路缓冲器204设置,以消除差分跨阻放大器208的输入处的对输入信号202的振幅或平均值的任何依赖。
具体地,参照图5A,输入信号202施加到电流平均电路302的输入502,电流平均电路302对输入信号电流202进行平均。电流平均电路302的输出506被耦接到输入电流缓冲器的输入504(a)。根据一个实施方式,输入504(a)可以用于控制与输入电流缓冲器204关联的偏置源。输入电流缓冲器204的输出218耦接到差分跨阻放大器208的输入212(a)。阈值电路206包括固定阈值电路506,该固定阈值电路506可以例如是恒定电压源。
输入信号202还施加到输入电路缓冲器204的输入504(b)。基于如图5A所描绘的电流平均电路302和输入电流缓冲器204的耦接设置,使在差分跨阻放大器208的输入212(a)处的输入信号(图5A中未示出)独立于输入信号电流202的平均(共模)值的变化。
只要使呈现给差分跨阻放大器208的被驱动输入212(a)的输入振幅的平均值独立于输入电流202的平均值,前面关于图2A和图2B讨论的关于动态范围的使用固定电压阈值的限制被有效地消除。
图5B是根据一个实施方式的利用电流平均电路来控制输入电流缓冲器的偏置和固定阈值电路的具有单端输入的平衡差分跨阻放大器的示意图。在图5B中反映的输入电流202在此称为IIN。图5B所示的实施方式利用主共基极级204(a)的副本共基极基极204(b)来控制主共基极级204(a)的基极电压/偏置。为了在由例如光电二极管生成的输入电流202电平的宽范围上维持恒定的平均电流和输出电压,与输入电流IIN的DC(或平均AC)成比例的附加电流添加到副本共基极级204(b)的偏置。具体地,根据图5B所示的实施方式,利用恒定DC分量和与如电流平均电路302提供的输入电流IIN的DC平均成比例的分量对副本共基极级204(b)进行偏置。如本文将讨论的,与输入电流IIN的DC平均成比例的附加分量经由检测器电流镜522引入。
如前面根据图2B、图3B和图4B描述的,差分跨阻放大器208可以被实现为差分对,该差分对包括第一共发射极220(a)和第二共发射极220(b)。第一共发射极220(a)包括双极晶体管104(b)、反馈电阻器106(d)和负载电阻器106(b)。第二共发射极包括双极晶体管104(c)、反馈电阻器106(e)和负载电阻器106(c)。
主共基极级204(a)包括双极晶体管104(a)和电阻器106(a)。副本共基极级204b包括双极晶体管204(d)和电阻器206(e)。包括PFET 330(g)、330(h)和330(i)在内的偏置镜520造成主共基极级204(a)和副本共基极级204(b)针对没有输入而利用相同的DC电流偏置。PFET 330(h)和330(i)作为镜像电流源工作。包括PFET 330(f)和330(j)的检测器电流镜522向副本共基极级204(b)提供与如由电流平均电路302生成的平均DC输入电流202(IIN)成比例的附加输入电流。如图5B所示,阈值电路206包括固定电压源108。
在没有引入检测器电流镜522的情况下,主共基极级204(a)中的双极晶体管104(a)中的平均电流将根据I′BIAS=IBIAS-IIN降低,以增大DC或平均瞬时输入电流。这将导致出自镜像电流源330(h)的恒定电流的增大部分流入共发射极220(a)的输入,造成输入电压升高。这将导致差分对208的不平衡,除非增大了阈值电路206中的阈值电压108而进行补偿。
根据图5B描绘的实施方式为了补偿这个潜在的不平衡,通过引入检测器电流镜522,将与电流IIN的DC(或平均AC)分量成比例的附加电流被引入副本共基极级204(b)的偏置。检测器电流镜522按照I″BIAS=IBIAS+IIN添加到副本共基极基极204(b)的双极晶体管104(d)中的偏置电流中。
因为副本共基极级204(b)中的双极晶体管104(d)设定主共基极级204(a)中的双极晶体管104(a)的基极电压,其将尝试将双极晶体管104(a)中的电流偏置设定为IBIAS+IIN。检测器电流镜522和偏置镜520的操作是线性的,因此组合效果是这两者叠加,使得主电流缓冲器级204(a)中的双极晶体管140(a)中的净电流为:I′BIAS=I″BIAS-IIN=IBIAS+IIN-IIN=IBIAS
因此,引入检测器电流镜522造成主电流缓冲器级204(a)的双极器件104(a)中的平均电流独立于电流202(IIN)的DC或AC振幅。因此,也使呈现给差分跨阻放大器208的共发射极220(a)(被驱动)的输入的输出电压独立于平均输入电流202(IIN)。由于非居中划分电平消除了关于图2A至图2B描述的实施方式提到的限制,这允许在不限制电路的动态范围或造成变形的情况下,在对共发射极220(b)的输入(非被驱动输入)处利用由阈值电路206生成的固定阈值电压108。
如关于图3B讨论的,电流平均电路302中的PFET 330(f)预设为具有比输入电流信号202(IIN)的最小数据频率低的多的频率响应。如果不是这种情况,则电流平均电路302的PFET器件330(a)的栅极/漏极可以被电容性地加载,确保注入到副本共基极级204(b)的电流等于输入电流IIN的dc平均值。
副本共基极级204(b)中的双极器件104(d)和电阻器106(e)的特性和尺寸可以被设定为与主共基极级204(a)中的相应对应器件104(a)和106(a)相同,或可以等比例缩放以利用较小净空电流和/或功率产生相同行为,只要偏置镜520和检测器镜522中的PFET器件330(i)和330(j)分别也相对于330(h)和330(f)等比例缩放。尽管图5B中描绘的实施方式使用双极互补MOC(BICMOS技术)实现,其也可以使用互补MOS(CMOS)技术或仅双极器件实现。
图6A是根据一个实施方式的利用电流平均电路302以控制输入电流缓冲器204的偏置和电压平均阈值电路402两者的具有单端输入的平衡差分跨阻放大器的框图。将电流平均电路302和电压平均电路402组合提供了在存在非理想器件的情况下维持精确阈值电压/划分电平的优点并且还减小对运算放大器环的跟踪范围要求。这些优点将关于图6B以及关联的描述变得明显。
具体地,参照图6A,输入信号202施加到电流平均电路302的输入502,电流平均电路302对输入信号电流202进行平均。电流平均电路302的输出506被耦接到输入电流缓冲器204的输入504(a)。根据一个实施方式,输入504(a)可以用于控制与输入电流缓冲器204关联的偏置信号。输入电流缓冲器204的输出218耦接到差分跨阻放大器208的输入212(a)。
阈值电路206包括电压平均电路402,该电压平均电路402允许生成适当变化的决策阈值以施加于差分跨阻放大器208来确保在电流信号电平的宽范围上的正确划分。根据一个实施方式,电压平均电路402对经由差分输出214(a)和214(b)从跨阻放大器208接收的差分输出信号进行平均。在图4B中描绘了用于进行电压平均的示例性拓扑。
差分跨阻放大器208的差分输出信号214(a)和214(b)提供到阈值电路206中的电压平均电路402。电压平均电路402生成在阈值电路206的输出216处的平均电压信号(图4A中未示出),该平均电压信号接着提供到差分跨阻放大器208的输入212(b),因而建立用于放大输入信号202的适当划分阈值。
输入信号202还施加到输入电路缓冲器204的输入504(b)。基于如图6A所描绘的电压平均电路402和输入电流缓冲器204的耦接设置,使在差分跨阻放大器208的输入212(a)处的输入信号(图6A中未示出)独立于输入信号电流202的平均(共模)值的变化。
图6B是根据一个实施方式的利用主共基极输入缓冲器的镜像副本来控制主输入电流缓冲器的偏置和电压平均阈值电路两者的具有单端输入的平衡差分跨阻放大器的示意图。具体地,图6B中描绘的实施方式组合共基极缓冲器级的镜像副本,以类似于关于图5B描述的实施方式,关于输入电流电平使得电压变化最小化。另外,图6B中描绘的实施方式采用运算放大器低频率反馈环来类似于关于图4B所示出和描述的实施方式在存在非理想器件的情况下生成正确阈值电压/划分电平。
类似于图5B所示的实施方式,图6B中描绘的实施方式利用主共基极级204(a)的副本共基极级204(b)来控制主共基极级204(a)的基极电压/偏置。为了在例如由光电二极管生成的输入电流202电平的宽范围上维持恒定的平均电流和输出电压,副本共基极级204(b)利用恒定DC分量和与如由电流平均电路302提供的输入电流的DC平均成比例的分量来偏置。
另外,类似于图4B所描绘的实施方式,图6B中描绘的实施方式采用阈值电路206,其在共发射极220(b)的输入处生成可变的阈值电压,以在输入信号电平的宽范围上维持用于差分对208的居中划分电平。
根据一个实施方式,阈值电路206包括处于低频率反馈环的一个或更多个放大器,以生成正确的阈值电压来维持平衡输出。具体地,类似于图4B所示的实施方式,图6B的阈值电路206可以包括采样电路424和增益电路422。采样电路424可以包括高阻抗运算放大器,该高阻抗运算放大器接收差分输入信号并且生成单端输出信号。可选的增益电路422包括任意数量的增益级,增益级可以也被实现为差分放大器,诸如可以被要求来向采样电路424呈现充分的输入电压振幅来生成在共发射极220(b)(非被驱动)的输入处的适当阈值电压。
尽管已经参照附图中例示的优选模式具体示出并且描述了本发明,本领域技术人员应理解的是在不背离如权利要求限定的精神和范围的情况下可以从其中实现各种具体变化。
Claims (20)
1.一种具有单端输入的平衡差分跨阻放大器,该平衡差分跨阻放大器包括:
a)差分跨阻级,该差分跨阻级进一步包括第一输入和第二输入;
b)输入电流缓冲器级,其中,所述输入电流缓冲器级的输出耦接到所述跨阻级的所述第一输入;以及
c)阈值电路,该阈值电路用于生成阈值电压,该阈值电压用于平衡所述差分跨阻级,其中,所述阈值电路的输出耦接到所述跨阻级的所述第二输入。
2.根据权利要求1所述的平衡差分跨阻放大器,其中,所述阈值电路接收至少一个输入信号并且对所述至少一个输入信号进行平均操作以生成所述阈值电路的所述输出。
3.根据权利要求1所述的平衡差分跨阻放大器,其中,所述阈值电压是固定电压。
4.根据权利要求1所述的平衡差分跨阻放大器,其中,所述输入电流缓冲器级是共基极级和共栅极级中的一种。
5.根据权利要求1所述的平衡差分跨阻放大器,其中,所述差分对包括共发射极级差分对和共源极差分对中的一种。
6.根据权利要求1所述的平衡跨阻放大器,其中,所述输入电流缓冲器级被设置以将与所述差分跨阻级关联的电阻和与输入电流源关联的电容解耦。
7.根据权利要求1所述的平衡差分放大器,其中,所述阈值电路还包括平均电路和副本电流缓冲器,所述平均电路与所述副本电流缓冲器串联耦接,并且所述副本电流缓冲器与所述跨阻级的所述第二输入串联耦接。
8.根据权利要求7所述的平衡差分放大器,其中,所述电流平均电路接收输入信号并且根据该输入信号生成DC时间平均信号。
9.一种具有单端输入的平衡差分跨阻放大器,该平衡差分跨阻放大器包括:
a)跨阻级,该跨阻级包括差分对,该差分对进一步包括第一输入、第二输入、第一输出和第二输出;
b)输入电流缓冲器级,其中,所述输入电流缓冲器级的输出耦接到所述跨阻级的所述第一输入;以及
c)阈值电路,该阈值电路还包括电压平均电路,其中,所述电压平均电路的输出耦接到所述跨阻级的所述第二输入,并且所述跨阻级的所述第一输出和所述第二输出耦接到所述电压平均电路的相应的第一输入和第二输入。
10.根据权利要求9所述的平衡差分跨阻放大器,其中,所述电压平均电路还包括采样电路和增益电路。
11.根据权利要求10所述的平衡差分跨阻放大器,其中,所述采样电路包括高阻抗运算放大器,该高阻抗运算放大器接收差分输入信号并且生成单端输出信号。
12.根据权利要求10所述的平衡差分跨阻放大器,其中,所述增益电路包括多个增益级,所述多个增益级被实现为差分放大器。
13.根据权利要求9所述的平衡差分跨阻放大器,其中,所述差分对包括共发射极差分对。
14.根据权利要求9所述的平衡跨阻放大器,其中,所述输入电流缓冲器级被设置为将与所述差分跨阻级关联的电阻和与输入电流源关联的电容解耦。
15.一种具有单端输入的平衡差分跨阻放大器,该平衡差分跨阻放大器包括:
a)跨阻级,该跨阻级包括差分对,该差分对进一步包括第一输入和第二输入;
b)输入电流缓冲器,该输入电流缓冲器包括第一输入和第二输入,其中,输入电流源耦接到所述输入电流缓冲器的所述第一输入,并且所述输入电流缓冲器的输出耦接到所述跨阻级的所述第一输入;
c)电流平均电路,该电流平均电路串联耦接在所述输入电流源和所述输入电流缓冲器的所述第二输入之间,其中,所述电流平均电路接收所述输入电流源并且基于所述输入电流源生成DC时间平均信号;以及
d)阈值电路,其中,所述阈值电路的输出耦接到所述跨阻级的所述第二输入。
16.根据权利要求15所述的平衡差分跨阻放大器,其中,所述阈值电路是固定阈值电路。
17.根据权利要求15所述的平衡差分跨阻放大器,其中,所述阈值电路是电压平均电路。
18.根据权利要求17所述的平衡差分跨阻放大器,其中,所述电压平均电路接收所述跨阻级的第一电压输出和第二电压输出,并且基于所述第一电压输出和所述第二电压输出生成平均电压信号。
19.根据权利要求15所述的平衡差分跨阻放大器,其中,所述差分对是共发射级差分对和共源极差分对中的一种。
20.根据权利要求15所述的平衡跨阻放大器,其中,所述电流缓冲器级被设置以将与所述跨阻级关联的电阻和与所述输入源关联的电容解耦。
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| US201562142558P | 2015-04-03 | 2015-04-03 | |
| US62/142,558 | 2015-04-03 | ||
| US14/814,080 | 2015-07-30 | ||
| US14/814,080 US9843297B2 (en) | 2015-04-03 | 2015-07-30 | Balanced differential transimpedance amplifier with single ended input and balancing method |
| PCT/US2016/025542 WO2016161277A1 (en) | 2015-04-03 | 2016-04-01 | Balanced differential transimpedance amplifier with single ended input and balancing method |
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| EP (1) | EP3278451A1 (zh) |
| CN (1) | CN107810600A (zh) |
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| CN109861652A (zh) * | 2019-02-21 | 2019-06-07 | 电子科技大学 | 一种应用于大输入电容的高带宽高增益跨阻放大器 |
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| KR20220033550A (ko) | 2020-09-07 | 2022-03-17 | 삼성전자주식회사 | 이미지 센서 |
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| TW201644188A (zh) | 2016-12-16 |
| WO2016161277A1 (en) | 2016-10-06 |
| US9843297B2 (en) | 2017-12-12 |
| US20160294336A1 (en) | 2016-10-06 |
| EP3278451A1 (en) | 2018-02-07 |
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