CN107633815A - Collocation structure, drive circuit module and the display panel of drive circuit - Google Patents

Abstract

The invention belongs to the field of display technology, and in particular relates to a compensation structure of a driving circuit, a driving circuit module and a display panel. The compensation structure of the driving circuit includes a current amplification circuit and a cross-group amplification circuit, the current amplification circuit is connected to the output end of the driving circuit, and is used to amplify the driving current output by the driving circuit by a set factor; the cross-group The amplifying circuit is connected to the output terminal of the current amplifying circuit, and is used for matching the resistances of different channels and different thin film transistors in the driving circuit, and converting the driving current into a corresponding driving voltage. The compensation structure directly senses the driving current of the pixel data in the display panel, avoids the problem that the voltage signal is easily disturbed during the wiring process, improves the sensing accuracy, and shortens the sensing time; at the same time, the cross-group amplification circuit is adopted, through The fine-tuning of the fuse technology makes the resistance of all amplifiers across the group consistent, thereby realizing the calibration function and avoiding the problem of process deviation.

Description

Compensation structure of driving circuit, driving circuit module and display panel

technical field

The invention belongs to the field of display technology, and in particular relates to a compensation structure of a driving circuit, a driving circuit module and a display panel.

Background technique

LCD (Liquid Crystal Display, Liquid Crystal Display) and OLED (Organic Light-Emitting Diode: Organic Light-Emitting Diode) display devices have become popular flat panel display devices today. In particular, active matrix organic light emitting diodes (Active Matrix OLED, referred to as AMOLED) have been used in high-end TVs and mobile devices due to their advantages such as ultra-thin, high color gamut, high contrast, wide viewing angle, and fast response.

AMOLED is a current mode (Current mode) active drive, which includes thin film transistors (Thin Film Transistor, referred to as TFT) for driving. Due to the deviation of the TFT process, the parameters such as the threshold voltage and electron mobility of each drive transistor may not be complete. Consistency will cause serious display non-uniformity. At the same time, the voltage drop (IR Drop) on the display panel (Panel) will cause the non-uniformity of OLED driving voltage to be reflected in the difference of Vds, which will affect the display uniformity. Therefore, in the pixel design based on AMOLED, it is necessary to use compensation technology to compensate for the non-ideal characteristics of the process. In the prior art, compensation methods include internal compensation (internal compensation) and external compensation (external compensation) methods. Internal compensation is to use TFT to construct sub-circuits inside the pixel for compensation; external compensation is to extract TFT or AMOLED information to the outside of the display panel, and then perform compensation through application-specific integrated circuits (ASICs).

Internal compensation, because the pixel structure and driving method of internal compensation are relatively complex, and it only has a compensation effect on TFT threshold voltage non-uniformity and IR, and cannot solve problems such as afterimages; at the same time, in large-scale high-resolution display applications , the way of internal compensation will result in low aperture ratio and slow driving speed. Relatively speaking, external compensation is considered to be a better compensation method. Most of the external compensation currently used is a voltage-type external compensation, that is, the pixel voltage is extracted in a certain way, and converted into a digital signal for processing, thereby realizing compensation. Although this voltage-type external compensation method has the advantages of fast driving speed and good compensation effect, the voltage signal is easily disturbed; in addition, with the increase in size and resolution, the parasitic capacitance of the display panel is getting larger and larger, and the fixed time The voltage value of the sensing (sense) pixel in the sensor becomes lower, and the requirement for the accuracy of the analog-to-digital conversion is getting higher and higher.

How to compensate the drive circuit and improve the compensation accuracy has become a technical problem to be solved urgently.

Contents of the invention

The technical problem to be solved by the present invention is to provide a compensation structure for a driving circuit, a driving circuit module and a display panel for the above-mentioned shortcomings in the prior art. The compensation junction can effectively compensate the driving circuit and ensure compensation accuracy.

The technical solution adopted to solve the technical problem of the present invention is the compensation structure of the drive circuit, which is used to provide compensation current for the drive circuit, which includes a current amplification circuit and a cross-group amplification circuit, wherein:

The current amplification circuit is connected to the output terminal of the driving circuit, and is used to amplify the driving current output by the driving circuit by a set factor;

The cross-group amplifying circuit is connected to the output terminal of the current amplifying circuit, and is used for matching the resistance in the compensation structure, and converting the driving current into a corresponding driving voltage.

Preferably, the current amplifying circuit includes a first current mirror and a second current mirror, the input end of the first current mirror is connected to the output end of the second current mirror, and the output end is connected to the cross-group amplifying circuit. an input terminal; the input terminal of the second current mirror is connected to the output terminal of the driving circuit.

Preferably, the first current mirror includes a first transistor, a second transistor, a third transistor, a fourth transistor and a first operational amplifier, wherein:

For the first transistor, the control pole is connected to the control pole of the second transistor, the first pole is connected to an analog power supply, and the second pole is connected to the positive input terminal of the first operational amplifier and the first pole of the third transistor;

The first pole of the second transistor is connected to an analog power supply, and the second pole is connected to the negative input terminal of the first operational amplifier and the first pole of the fourth transistor;

The control electrode of the third transistor is connected to its second pole and the control pole of the first transistor, and the second pole is also connected to the input terminal of the second power mirror;

The control electrode of the fourth transistor is connected to the output terminal of the first operational amplifier, and the second electrode is connected to the cross-group amplifying circuit.

Preferably, the first transistor, the second transistor, the third transistor, and the fourth transistor are P-type transistors, and the aspect ratio of the second transistor is equal to the width and length of the first transistor. than N times.

Preferably, the second current mirror includes a fifth transistor, a sixth transistor, a seventh transistor, an eighth transistor, a ninth transistor, a tenth transistor and a second operational amplifier, wherein:

The control electrode of the fifth transistor is connected to the control electrode of the sixth transistor, the first electrode is connected to the positive input terminal of the second operational amplifier and the second electrode of the seventh transistor, and the second electrode is connected to the reference ground;

The first pole of the sixth transistor is connected to the negative input terminal of the second operational amplifier and the second pole of the eighth transistor, and the second pole is connected to the reference ground;

The control electrode of the seventh transistor is connected to its first electrode and the second electrode of the ninth transistor;

For the eighth transistor, the control pole is connected to the output terminal of the second operational amplifier, and the first pole is connected to the second pole of the tenth transistor;

The control pole of the ninth transistor is connected to the start signal, the first pole is connected to the output terminal of the driving circuit, and the second pole is also connected to the control pole of the fifth transistor;

The control electrode of the tenth transistor is connected to the start signal, the first electrode is connected to the input terminal of the first current source mirror, and the second electrode is connected to the first electrode of the eighth transistor.

Preferably, the fifth transistor, the sixth transistor, the seventh transistor, and the eighth transistor are N-type transistors, and the width-to-length ratio of the sixth transistor is equal to the width-to-length ratio of the fifth transistor. M times of the ratio; the ninth transistor and the tenth transistor are N-type transistors or P-type transistors.

Preferably, the cross-group amplifying circuit includes a third operational amplifier and a matching structure, wherein:

The matching structure includes a reference current source and an adjustment resistance unit, and the adjustment resistance of the adjustment resistance unit is respectively connected to the negative input terminal and the output terminal of the third operational amplifier, so as to make different across-group amplification circuits Impedance matching;

In the third operational amplifier, its positive input terminal is connected to a reference voltage, and its negative input terminal is also connected to one of the reference current source or the output terminal of the current amplifying circuit, and the output terminal is used for output and the current amplification circuit. The driving current of the circuit corresponds to the driving voltage.

Preferably, the reference current source is used to provide a reference current for the selected and matched adjusting resistor, and the adjusting resistor unit includes multiple sets of gating modules and multiple sets of output modules corresponding to the gating modules, wherein:

Each of the gating modules includes a first gating transistor, a second gating transistor, a configuration resistor and a fuse, the control pole of the first gating transistor is connected to the first gating voltage, and the second pole is grounded. The first pole is connected to one end of the configuration resistor; the control pole of the second gate transistor is grounded, the first pole is connected to the second gate voltage, the second pole is connected to one end of the fuse, and the other end of the fuse One end is connected to the other end of the configuration resistor;

The output module includes an inverter, an output transistor and an output resistor, the inverter connects the fuse and the connecting end of the configuration resistor, the output end of the inverter or the fuse and the The connection end of the configuration resistor is connected to the control pole of the output transistor; the first pole and the second pole of the output transistor are respectively connected to both ends of the output resistor, and a plurality of the output resistors are connected in series;

According to the potential of the configuration resistor in the gating module and the fuse, the corresponding output resistor in the output module is selected, and the sum of the resistance values of the selected output resistors is connected to The magnitude of the adjustment resistor between the negative input terminal and the output terminal of the third operational amplifier.

Preferably, the first pass transistor and the output transistor are N-type transistors, and the second pass transistor is a P-type transistor;

A plurality of said output resistors are connected in series in order of size ²ⁿ .

A drive circuit module, including a drive circuit, and the above-mentioned compensation structure for the drive circuit.

A display panel further includes the above driving circuit module.

The beneficial effects of the present invention are: the compensation structure of the driving circuit directly senses the driving current of the pixel data in the display panel, avoids the problem that the voltage signal is easily disturbed during the wiring process, and overcomes the deficiency of the sensing voltage drop, The sensing accuracy is improved and the sensing time is shortened; at the same time, the cross-group amplifier circuit is adopted, and the resistance of all cross-group amplifiers is made consistent by fine-tuning through the fuse technology, thereby realizing the calibration function and avoiding the problem of process deviation.

Description of drawings

1 is a schematic diagram of the compensation structure of the drive circuit in Embodiment 1 of the present invention;

FIG. 2 is a schematic diagram of the matching structure in Embodiment 1 of the present invention;

Figure 3 is a reference diagram for fuse matching;

4 is a schematic diagram of a current-type external circuit compensation circuit in Embodiment 2 of the present invention;

In the accompanying drawings:

1-current amplification circuit; 11-first current mirror; 12-second current mirror;

2-Amplifying circuit across groups; 21-Matching structure; 211-Gating module; 212-Output module;

3- drive circuit;

4 - Analog-to-Digital Converter;

5-Sequence controller.

detailed description

In order to enable those skilled in the art to better understand the technical solution of the present invention, the compensation structure of the driving circuit, the driving circuit module and the display panel of the present invention will be further described in detail below in conjunction with the accompanying drawings and specific embodiments.

Example 1:

This embodiment aims at the problems existing in voltage-type external compensation, and provides a compensation structure for a current-type driving circuit. The compensation junction can effectively compensate the driving circuit and ensure compensation accuracy.

The compensation structure of the drive circuit is used to provide compensation current for the drive circuit, as shown in Figure 1, which includes a current amplification circuit 1 and a cross-group amplification circuit 2, wherein:

The current amplification circuit 1 is connected to the output end of the driving circuit, and is used to amplify the driving current output by the driving circuit by a set factor;

The cross-group amplifying circuit 2 is connected to the output terminal of the current amplifying circuit 1, and is used for matching the resistance in the compensation structure and converting the driving current into a corresponding driving voltage. Usually, an operational amplifier whose input is a current signal and whose output is a voltage signal is defined as a cross-group amplifier circuit.

Among them, the current amplification circuit 1 passes through a high-precision current mirror, and uses the current mirror to directly sense the pixel current (that is, the current caused by the pixel data) and amplify the pixel current instead of the voltage, thereby overcoming the lack of sensing voltage and realizing accurate amplification of the sensing pixel current. The current amplification circuit 1 includes a first current mirror 11 and a second current mirror 12, the input end of the first current mirror 11 is connected to the output end of the second current mirror 12, and the output end is connected to the input end of the cross-group amplifying circuit 2; The input end of the current mirror 12 is connected to the output end of the driving circuit.

In FIG. 1, the second current mirror 12 includes a fifth transistor MN0, a sixth transistor MN1, a seventh transistor MN2, an eighth transistor MN3, a ninth transistor MN4, a tenth transistor MN5 and a second operational amplifier A2, wherein:

The control pole of the fifth transistor MN0 is connected to the control pole of the sixth transistor MN1, the first pole is connected to the positive input terminal of the second operational amplifier A2 and the second pole of the seventh transistor MN2, and the second pole is connected to the reference ground;

The sixth transistor MN1, the first pole is connected to the negative input terminal of the second operational amplifier A2 and the second pole of the eighth transistor MN3, and the second pole is connected to the reference ground;

The seventh transistor MN2, the control pole is connected to its first pole and the second pole of the ninth transistor MN4;

The eighth transistor MN3, the control pole is connected to the output terminal of the second operational amplifier A2, and the first pole is connected to the second pole of the tenth transistor MN5;

The control pole of the ninth transistor MN4 is connected to the start signal, the first pole is connected to the output end of the driving circuit, and the second pole is also connected to the control pole of the fifth transistor MN0;

The control electrode of the tenth transistor MN5 is connected to the start signal, the first electrode is connected to the input terminal of the first current source mirror, and the second electrode is connected to the first electrode of the eighth transistor MN3.

MP4 and MP5 are switching tubes, the control poles (i.e. gates) of both are connected to SW1, and the drains are respectively connected to the drains of MN2 and MN3. MN0, MN1, MN2, and MN3 form a cascode current mirror , where the W/L of MN1 is M times of the W/L of MN0 and MN0 respectively, and the output impedance is r _o1 g _m3 r _o3 , in order to further increase the output impedance and achieve accurate current amplification, an operational amplifier input is connected to MN0 and MN1 respectively The drain, the output is connected to the gate of MN1, then the output impedance is increased to Ar _o1 g _m3 r _o3 , where A is the gain of the operational amplifier, gm is the transconductance of the transistor, and ro is the internal resistance, so that the current mismatch is reduced It is 1/Ag _m3 r _o3 times of the single tube current.

Preferably, the fifth transistor MN0 , the sixth transistor MN1 , the seventh transistor MN2 and the eighth transistor MN3 are N-type transistors, and the aspect ratio of the sixth transistor MN1 is M times that of the fifth transistor MN0 . The ninth transistor and the tenth transistor are N-type transistors or P-type transistors. When using different types of transistors, it is only necessary that the signals given by SW1 are opposite. In this embodiment, the ninth transistor MN4 and the tenth transistor MN5 are used as N-type transistors As a hint.

In FIG. 1, the first current mirror 11 includes a first transistor MP0, a second transistor MP1, a third transistor MP2, a fourth transistor MP3 and a first operational amplifier A1, wherein:

The control pole of the first transistor MP0 is connected to the control pole of the second transistor MP1, the first pole is connected to the analog power supply AVDD, and the second pole is connected to the positive input terminal of the first operational amplifier A1 and the first pole of the third transistor MP2;

The second transistor MP1, the first pole is connected to the analog power supply AVDD, the second pole is connected to the negative input terminal of the first operational amplifier A1 and the first pole of the fourth transistor MP3;

The control pole of the third transistor MP2 is connected to its second pole and the control pole of the first transistor MP0, and the second pole is also connected to the input terminal of the second power mirror;

The control pole of the fourth transistor MP3 is connected to the output terminal of the first operational amplifier A1 , and the second pole is connected to the cross-group amplifying circuit 2 .

MP0, MP1, MP2, MP3 and the first operational amplifier form a new current mirror, the principle of which is the same as that of the first current mirror. Preferably, the first transistor MP0, the second transistor MP1, the third transistor MP2, and the fourth transistor MP3 are P-type transistors, and the aspect ratio of the second transistor MP1 is N times that of the first transistor MP0, so The drive current is accurately amplified by M*N times.

In this embodiment, a cross-group amplifying circuit is used, which can greatly shorten the time for sensing the pixel current. In Fig. 1, the cross-group amplifying circuit 2 includes a third operational amplifier A3 and a matching structure 21, wherein:

The matching structure 21 includes a reference current source and an adjustment resistance unit, and the adjustment resistance R0 of the adjustment resistance unit is respectively connected to the negative input terminal and the output end of the third operational amplifier A3, so as to match the impedances of different cross-group amplifying circuits 2;

The third operational amplifier A3, its positive input terminal is connected to the reference voltage Vref, and its negative input terminal is also connected to the reference current source or the output terminal of the current amplifying circuit 1 (through SW2), and the output terminal is used for output and current amplifying circuit 1. The drive voltage corresponding to the drive current.

The positive input terminal of the operational amplifier is connected to a reference voltage Vref, the negative input terminal is connected to a precise reference current Iref, the negative input terminal and the output terminal are respectively connected to both ends of a resistor R0, and the output voltage is Vout=Vref-IR0, where I is After the amplified pixel current, in order to overcome the fluctuation of the resistance value caused by the process deviation, the fuse of the resistor R0 is adjusted, as shown in FIG. 2 .

The reference current source is used to provide a reference current for selecting a matching adjusting resistor. The adjusting resistor unit shown in FIG. 2 includes multiple groups of gating modules 211 and multiple groups of output modules 212 corresponding to the gating modules 211, wherein:

Each gating module 211 includes a first gating transistor, a second gating transistor, a configuration resistor and a fuse, the control pole of the first gating transistor is connected to the first gating voltage Vb, the second pole is grounded, and the first gating transistor The electrode is connected to one end of the configuration resistor; the control electrode of the second strobe transistor is grounded, the first electrode is connected to the second strobe voltage, the second electrode is connected to one end of the fuse, and the other end of the fuse is connected to the other end of the configuration resistor;

The output module 212 includes an inverter, an output transistor and an output resistor, the inverter is connected to the connection end of the fuse and the configuration resistor, and the output terminal of the inverter or the connection end of the fuse and the configuration resistor is connected to the control pole of the output transistor; the output The first pole and the second pole of the transistor are respectively connected to both ends of the output resistor, and multiple output resistors are connected in series;

According to the potentials of the configuration resistors and fuses in the gating module 211, the corresponding output resistors in the gating output module 212 are selected, and the sum of the resistance values of the selected output resistors is connected to the negative input terminal of the third operational amplifier A3 and the size of the adjustment resistance between the output terminal, that is, the sum of the resistances between A and B in Figure 2.

The compensation structure of the driving circuit in this embodiment can implement chip packaging, which is convenient for subsequent use. Here, the fuse is not a rewritable fuse in a digital circuit, but a one-off fuse that can be blown. Using this fuse, the target resistance of each chip can be adjusted to the same resistance value R0. If the resistance is found to be smaller or larger than RO due to the process, then the fuse can be adjusted to increase or decrease. Once blown, it cannot be recovered. In Figure 2, the configuration resistors connected to the fuses Fu0-Fu7 are all r1, and the resistance of the fuse itself can be ignored.

Preferably, the first selection transistor and the output transistor are N-type transistors, and the second selection transistor is a P-type transistor; and a plurality of output resistors are connected in series in order of size 2 ⁿ .

It should be understood here that, for an N-type transistor, its first pole may be a drain, and its second pole may be a source; or, for a P-type transistor, its first pole may be a source, and its second pole may be a drain pole. When selecting transistors, the fixed type transistors are not limited, only the port polarities of the selected types of transistors need to be correspondingly connected according to the port polarities of the transistors in this embodiment, and will not be detailed here. stated.

With the compensation structure of the driving circuit in this embodiment, the current charging resistance across the group amplifiers is very fast, and the output is quickly stable. Compared with the capacitive integrator structure, charging the capacitor with the same current will be much slower, that is, it will take longer for the output voltage to stabilize. Therefore, a cross-group amplification circuit is used instead of a capacitor integrator, which greatly reduces the time for sensing the pixel current; moreover, during calibration, a reference current source is provided externally, and the fuse technology is used to fine-tune the adjustment resistor, so that different channels (channel) The output voltage between different chips is consistent, so as to ensure the accuracy of calibration.

According to Figure 2, the initial value of R0 is set to 12R, and it is designed to be bidirectionally adjustable, with an adjustable range of 8R-15.97R, a minimum step size of 1/32R, and an accuracy of 0.26%. The state of the fuse is 0, and the state is 1. Before normal operation, the adjustment resistor R0 (composed of multiple output resistors in series) can be calibrated. The calibration method is to connect the switch SW2 to an external given reference current, measure the output voltage of all the cross-group amplifying circuits at the same time, measure the actual value of R0 according to the voltage formula Vout=Vref-Iref*R0, and finally according to (12R/ R0)-1 Calculate the resistance change rate, and finally determine whether each fuse of FU0-FU7 is blown or not according to the fuse matching reference table shown in Figure 3 (only part), so as to overcome the process deviation and achieve calibration. Among them, according to the matching fuse shown in Figure 3, according to different circuit designs, the matching resistance value can be quickly searched to improve speed and efficiency.

Depending on the adjustment range, an inverter can be set in front of the corresponding output resistor of the output module to obtain different upward or downward adjustment resistance ranges. In this embodiment, an example is provided by setting only an inverter corresponding to an output resistance of 4R. In this adjustment mode, the range of upward adjustment and downward adjustment is the same, and the adjustment range is about 4R. In Figure 2, only the group of output modules connected to FU7 is equipped with an inverter, and the resistance value of the output resistor controlled by this group of output modules is 4R; The output resistance controlled by the seven groups of output modules adds up to 3.968R (approximately 4R). In the initial state, because the inverter exists, the 4R resistor is short-circuited, and the maximum value of the resistor R0 between A and B is (8+3.968)R. If you need to reduce the resistance value, you can blow the fuse in the gating module as needed FU0-FU6, the minimum value can be 8R; if you need to increase the resistance, you can blow off FU7, at this time 4R resistors are added to the entire resistor string, and the adjustment range becomes 12R-(12+3.968)R, so it is exactly This inverter exists, so that the resistance of R0 can be adjusted bidirectionally on the basis of 12R, and the adjustment range is equivalent, up to 15.968R, down to 8R. Of course, in order to obtain the above adjustment mode, it is also possible not to set an inverter in front of the corresponding 4R output resistance, but to set an inverter in front of the seven output resistances of 2R-1/32R, which can be flexible in the specific implementation process Choose, there is no limit here.

After the calibration of the adjustment resistor R0 is completed, disconnect SW2 from Iref (that is, connect SW2 to the current mirror circuit without Iref, specifically the drain of MP3), and connect it to the previous power mirror circuit. According to the principle of transconductance amplification, the input current is converted into voltage output for subsequent drive processing.

In the implementation process, the driving circuit and the compensation structure may not be one-to-one, and multiple channels may share one compensation circuit in time-sharing. For the external compensation structure independent of the pixel driving circuit (the compensation structure can be configured inside the chip) , usually 10-20 compensation structures are made in one chip, which can handle 960 channels (channel), and each channel corresponds to a pixel.

The compensation structure of the driving circuit in this embodiment directly senses the driving current of the pixel data in the display panel, avoids the problem that the voltage signal is easily disturbed during the wiring process, overcomes the deficiency of the sensing voltage reduction, and improves the sensing performance. The measurement accuracy is shortened, and the sensing time is shortened; at the same time, the cross-group amplifier circuit is used, and the resistance of all cross-group amplifiers is made consistent by fine-tuning through the fuse technology, thereby realizing the calibration function and avoiding the problem of process deviation. It can be seen that the compensation structure of the driving circuit in this embodiment can overcome the mismatch caused by the process deviation, and at the same time, it has a good current-type compensation effect, and is conducive to the realization of larger size and higher resolution. It is especially suitable for AMOLED current external Compensation method and system.

Example 2:

This embodiment provides a driving circuit module, which includes a driving circuit and the compensation structure of the driving circuit in Embodiment 1, which has a better driving effect.

In the driving circuit module, there is no limitation on the structure of the driving circuit therein. As an example, as shown in FIG. 4, the driving circuit 3 is a common 2T1C pixel circuit, and T1 is a scanning switch tube, which is responsible for writing the driving voltage data (Data) into the gate of the driving tube T2 row by row; T2 is The drive tube converts the voltage signal into current and supplies it to the OLED device. The gate of T1 is connected to the scan signal, the source is connected to Data data; the gate of T2 is connected to the drain of T1, the source is connected to OVDD, the drain is connected to the anode of OLED, the anode of the OLED device is connected to the drain of T2, and the cathode is grounded.

When the current-type external compensation structure of Embodiment 1 is adopted, the compensation structure includes a high-precision current amplifying circuit 1 and a cross-group amplifying circuit 2 . In order to make up for the challenge of signal processing caused by the small pixel current value, in the time stage of sensing the pixel current, the current in the pixel circuit is passed through a high-precision current amplifier to amplify the driving current by a certain factor, and then input to the integral operational amplifier; Since the currents of different TFT drive tubes are different, the output voltages of the cross-group amplifying circuits are also different within a fixed period of time, and the output voltages are then passed through the analog-to-digital converter 4 (ADC) to convert the output voltage signal into an N bit data signal and pass it to the timing control The device 5 (T-CON), the FPGA in the timing controller 5 collects the current pixel data information on the data line that needs to be output, and provides fine-tuned data driving for different driving currents, so as to realize current compensation.

In addition, because the compensation structure of the drive circuit used by it is aimed at the resistance mismatch caused by the poor process of various chips, it is calibrated by matching and adjusting the resistance R0 through the fuse technology, so that accurate calibration is realized. After the calibration is completed, SW2 and Iref are disconnected. Open and connect with the mirror circuit in front. According to the principle of transconductance amplification, the input current is converted into a voltage output, and the output is converted into a digital signal through the ADC, and sent to the T-CON board for processing, and the data data is fine-tuned to achieve the compensation effect.

It can be seen that based on the compensation structure of the driving circuit, the driving current of each channel of the driving circuit module is accurately amplified and maintains good uniformity.

Example 3:

This embodiment provides a display panel, which further includes the compensation structure of the driving circuit in the second embodiment.

The display panel can be: desktop computer, tablet computer, notebook computer, mobile phone, PDA, GPS, vehicle display, projection display, video camera, digital camera, electronic watch, calculator, electronic instrument, instrument, LCD panel, electronic paper, TV Computers, monitors, digital photo frames, navigators and other products or components with display functions can be applied to multiple fields such as public display and virtual display.

It can be understood that, the above embodiments are only exemplary embodiments adopted for illustrating the principle of the present invention, but the present invention is not limited thereto. For those skilled in the art, various modifications and improvements can be made without departing from the spirit and essence of the present invention, and these modifications and improvements are also regarded as the protection scope of the present invention.

Claims (11)

1. A kind of 1. collocation structure of drive circuit, for providing compensation electric current for drive circuit, it is characterised in that put including electric current Big circuit and across a group amplifying circuit, wherein：

   The current amplification circuit, the output end of the drive circuit is connected to, for the driving current for exporting drive circuit Amplification setting multiple；

   It is described across a group amplifying circuit, the output end of the current amplification circuit is connected to, for entering to the resistance in collocation structure Row matching, and driving current is converted into corresponding driving voltage.
2. 2. collocation structure according to claim 1, it is characterised in that the current amplification circuit include the first current mirror and Second current mirror, the input of first current mirror connect the output end of second current mirror, output end connection it is described across The input of group amplifying circuit；The input of second current mirror connects the output end of the drive circuit.
3. 3. collocation structure according to claim 2, it is characterised in that first current mirror includes the first transistor, the Two-transistor, third transistor, the 4th transistor and the first operational amplifier, wherein：

   The first transistor, control pole connect the control pole of the second transistor, the first pole connection analog power, the second pole Connect the positive input terminal of first operational amplifier and the first pole of the third transistor；

   The second transistor, the first pole connection analog power, the second pole connects the negative input end of first operational amplifier With the first pole of the 4th transistor；

   The third transistor, control pole connect the control pole of its second pole and the first transistor, and the second pole is also connected with institute State the input of second source mirror；

   4th transistor, control pole connect the output end of first operational amplifier, put described in the connection of the second pole across group Big circuit.
4. 4. collocation structure according to claim 3, it is characterised in that the first transistor, the second transistor, institute State third transistor, the 4th transistor is P-type transistor, the breadth length ratio of the second transistor is the first transistor N times of breadth length ratio.
5. 5. collocation structure according to claim 2, it is characterised in that second current mirror includes the 5th transistor, the Six transistors, the 7th transistor, the 8th transistor, the 9th transistor, the tenth transistor and the second operational amplifier, wherein：

   5th transistor, control pole connect the control pole of the 6th transistor, and the first pole connects second computing and put The big positive input terminal of device and the second pole of the 7th transistor, the second pole connection reference ground；

   6th transistor, the first pole connect second operational amplifier negative input end and the 8th transistor the Two poles, the second pole connection reference ground；

   7th transistor, control pole connect its first pole and two poles of the 9th transistor；

   8th transistor, control pole connect the output end of second operational amplifier, and the first pole connection the described tenth is brilliant Second pole of body pipe；

   9th transistor, its control pole connection open signal, the first pole connects the output end of the drive circuit, the second pole It is also connected with the control pole of the 5th transistor；

   Tenth transistor, its control pole connection open signal, the first pole connect the input of the first current source mirror, the Two poles connect the first pole of the 8th transistor.
6. 6. collocation structure according to claim 5, it is characterised in that the 5th transistor, the 6th transistor, institute State the 7th transistor, the 8th transistor, be N-type transistor, the breadth length ratio of the 6th transistor is the 5th crystal M times of the breadth length ratio of pipe；9th transistor and the tenth transistor are N-type transistor or P-type transistor.
7. 7. collocation structure according to claim 1, it is characterised in that described to include the 3rd operation amplifier across group amplifying circuit Device and mating structure, wherein：

   The mating structure, including reference current source and regulation resistance unit, the regulation resistance difference of the regulation resistance unit The negative input end and output end of the 3rd operational amplifier are connected to, for causing described in difference across the impedance of group amplifying circuit Matching；

   3rd operational amplifier, its positive input terminal connection reference voltage, negative input end also with the reference current source or institute The output end for stating current amplification circuit selects a connection, and the output end is used to export the driving current with the current amplification circuit Corresponding driving voltage.
8. 8. collocation structure according to claim 7, it is characterised in that the reference current source is used for the institute for selection matching State regulation resistance and reference current is provided, the regulation resistance unit includes multigroup gating module and corresponding with the gating module Multigroup output module, wherein：

   Each gating module includes the first gating gating transistor, the second gating transistor, configuration resistance and fuse, described The control pole of first gating transistor connects the first gate voltage, and the second pole ground connection, the connection of the first pole is described to configure the one of resistance End；The control pole ground connection of second gating transistor, the first pole connect the second gate voltage, and the second pole connects the fuse One end, the other end of the other end connection configuration resistance of the fuse；

   The output module includes phase inverter, output transistor and output resistance, and the phase inverter connects the fuse and described Described in the connection end of configuration resistance, the output end of the phase inverter or the fuse connect with the connection end of the configuration resistance The control pole of output transistor；The first pole and the second pole of the output transistor connect the both ends of the output resistance respectively, Multiple output resistances are connected in series；

   The current potential of resistance and the fuse is configured according to the gating module, gates corresponding institute in the output module Output resistance is stated, the resistance sum for the multiple output resistances being strobed is then only connected to the negative defeated of the 3rd operational amplifier Enter the size of the regulation resistance between end and output end.
9. 9. collocation structure according to claim 8, it is characterised in that first gating transistor, the output crystal It is P-type transistor to manage as N-type transistor, second gating transistor；

   Multiple output resistances are with 2ⁿSize order is connected in series.
10. 10. a kind of drive circuit module, including drive circuit, it is characterised in that also including described in claim any one of 1-9 The collocation structure of drive circuit.
11. 11. a kind of display panel, it is characterised in that also including the drive circuit module described in claim 10.