CN107437989B - Circuit for linearizing Sprott B chaotic system into first and third terms - Google Patents
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Abstract
The invention discloses a linearization method and a linearization circuit of a Sprotet B chaotic system, wherein the circuit consists of a resistor, a capacitor, a diode, an operational amplifier (L F347BN) and a multiplier (AD633JN), the resistor and the operational amplifier (L F347BN) realize inverse addition, inverse operation and symbolic operation, the capacitor and the operational amplifier (L F347BN) realize integral operation, the resistor, the diode and the operational amplifier (L F347BN) realize absolute value operation, and the multiplication is realized by the multiplier AD633 JN.
Description
Technical Field
The invention relates to a linearization chaotic system, in particular to a circuit with a linearization Sprott B chaotic system as a first order item and a third order item.
Background
In recent years, chaotic signals (or systems) have been receiving increasing attention from the theoretical and engineering communities, wherein the analysis and control of chaotic signals are the focus of attention. As is known, a chaotic signal is a complex intrinsic nonlinear signal, no mature theory exists at present for controlling the signal, and the invention provides a novel chaotic signal linearization method based on a differential geometric theory. As long as the chaotic signal has relative order, any chaotic signal can be partially linearized or accurately linearized through local coordinate transformation and feedback transformation without losing any information of the original signal.
Disclosure of Invention
1. The linear Sprott B chaotic system is a circuit with first and third terms, and is characterized in that:
(1) the original Sprott B chaotic system i is as follows:
in the formula, x, y and z are state variables, and a and m are parameters; system i has two balance points
And
the characteristic values at the equilibrium points are each lambda1＝-1.3532,λ2,30.1766 ± 1.2028j and λ1＝-1.3532,λ2,30.1766 + -1.2028 j, Lee index L1＝0.2101,L2＝0,L3-1.2102, fractal dimension 2.1736;
(2) the first equation is linearized into a first order term, and the third equation is a third order term: system i becomes
In the formula, x, y and z are state variables, and a and m are parameters; system ii has three equilibrium points
And
characteristic value at equilibrium point is λ1＝-1.8637,λ2,3＝0.4319±1.1930j，λ1＝0,λ2＝0，λ 31 and λ ═ 1 and1＝-1.8637,λ2,30.4319 ± 1.1930j, and a lith index of L1＝0.1486,L2＝0,L3-1.1486, fractal dimension 2.1294;
designing a circuit according to the chaotic system ii, wherein the circuit consists of three resistors, a capacitor and operational amplifier L F347BN and a multiplier AD633JN, the resistor and operational amplifier L F347BN realizes inverse addition and inverse operation, the capacitor and operational amplifier L F347BN realizes integral operation, and the multiplication is realized by the multiplier AD633 JN;
the input end of the second path of inverting adder is connected with the function S through a resistor R, the input end of the second path of inverting adder is connected with the other input end of the multiplier (A) through a resistor R, the integral output end of the second path of inverting adder is connected with the other input end of the multiplier (A) and is connected with one input end of the multiplier (A), the inverting output end of the second path of inverting adder is connected with the negative input end of the operational amplifier F347 (U4) and is connected with one input end of the multiplier (A), the inverting output end of the second path of inverting adder is connected with the negative input end of the operational amplifier F347 (U5) through a resistor R, the inverting output end of the operational amplifier F347 (U5) is connected with the other input end of the multiplier (A), the inverting input end of the third path of inverting adder is connected with the function F x through a resistor R, the inverting output end of the operational amplifier F347 (U5) is connected with the other input end of the multiplier (A), and the inverting adder (A) is connected with the other input end of the third path of inverting adder (R);
the sign circuit is designed according to the chaotic system ii, and comprises a resistor, an operational amplifier L F347BN and a multiplier, wherein the output end of the operational amplifier L F347BN (U4A) is connected with the negative input end of the operational amplifier L0F 347BN (U4B) through a resistor R20, the negative input end of the operational amplifier L F347BN (U4B) is connected with the output end of the operational amplifier L F347BN (U4B) through a resistor R22, the output end of the operational amplifier L F347BN (U4B) is connected with the other input end of the multiplier (A1), the output end of the multiplier A1 is connected with zsgn (y), the output end of the operational amplifier L F347L (U4L) is connected with the negative input end of the operational amplifier L F347L (U4L) through a resistor R L, and the output end of the operational amplifier L F347L (U4) is connected with the output end of the multiplier (U L A L, the output end of the operational amplifier L A L, the operational amplifier L A L, the output end of the operational amplifier L (U L);
an absolute value circuit is designed according to the chaotic system ii, the circuit is composed of a resistor, a diode and an operational amplifier L F347BN, a negative input end of the operational amplifier L F347BN (U5A) is connected to an output end of the operational amplifier 1F347 1 (U5 1) through a resistor R23 and a diode D1, a negative input end of the operational amplifier 1F347 1 (U5 1) is connected to the negative input end of the operational amplifier 1F347 1 (U5 1) through a resistor R1 and a resistor R1, a positive input end of the operational amplifier 1F347 1 (U5F 347), a positive input end of the operational amplifier 1F347 1 (U5F 1) is connected to the ground through a resistor R1, an output end of the operational amplifier 1F347 1 (U5F 1) is connected to the negative input end of the operational amplifier 1F347 1F (U1F) through a resistor R1F, a 1F347, a negative input end of the operational amplifier 1F 1, a negative input end (U5F 347) is connected to the operational amplifier 1F347 1F 1, a negative input end of the operational amplifier 1F 1 (1) is connected to the operational amplifier 1F 72F 1F 347) and a negative input end of the operational amplifier 1F347 1F347, the negative input end (U5F 347) is connected to the negative input end of the operational amplifier 1F 347) of the operational amplifier 1F347 1 (U1F 347) is connected to the operational amplifier 1F 347) and the negative input end of the operational amplifier 1F347 1F 347U 1F347 1F347 1F347, the negative input end of the operational;
designing a multiplication circuit according to the chaotic system ii, wherein the circuit consists of a multiplier, the output end of the multiplier (A4) outputs-xy, and the output end of the multiplier (A4) is connected with the other input end of the multiplier (A5); the output end of the multiplier (A5) outputs-xy | y |; the output end of the multiplier (A6) outputs x | x |; the output end of the multiplier (A3) is connected with yz; the output end of the multiplier (A7) outputs-y |;
designing a power supply circuit according to the chaotic system ii, wherein the circuit consists of a-1V power supply, the anode of the power supply is grounded, and the cathode of the power supply is connected with P1;
when S1 is connected with yz, S2 is connected with the first path of inverted output, S3 is connected with the second path of integral output, F (x) is connected with P1, G (x) is connected with xy, the circuit realizes a Sprotet B chaotic system i;
when S1 is connected with zsgn (y), S2 is connected with the first path of inverted output, S3 is connected with the second path of integral output, F (x) is connected with | x | and G (x) is connected with-xy | y |, the circuit realizes the chaotic system ii.
Has the advantages that: the invention provides a novel chaotic signal linearization method based on a differential geometric theory. As long as the chaotic signal has the relative order, any chaotic signal can be partially linearized or accurately linearized through local coordinate transformation and feedback transformation without losing any information of the original signal, so that the chaotic system has important work application prospects in chaotic control, synchronization and the like, enriches the types of the chaotic system, and provides more choices for applying the chaotic system to engineering practice.
Drawings
Fig. 1 is a circuit diagram for implementing the Sprott B chaotic system.
Fig. 2 is a circuit diagram for implementing the X symbolization.
Fig. 3 is a circuit diagram for implementing Y symbolization.
Fig. 4 is a circuit diagram for realizing the absolute value of X.
Fig. 5 is a circuit diagram for realizing the absolute value of Y.
Fig. 6 is a circuit diagram for implementing a multiplication operation.
Fig. 7 is a power supply circuit implementing integer input.
Detailed Description
The invention will be described in further detail below with reference to the drawings and preferred embodiments, and with reference to fig. 1-7.
1. The linear Sprott B chaotic system is a circuit with first and third terms, and is characterized in that:
(1) the original Sprott B chaotic system i is as follows:
in the formula, x, y and z are state variables, and a and m are parameters; system i has two balance points
And
the characteristic values at the equilibrium points are each lambda1＝-1.3532,λ2,30.1766 ± 1.2028j and λ1＝-1.3532,λ2,30.1766 + -1.2028 j, Lee index L1＝0.2101,L2＝0,L3-1.2102, fractal dimension 2.1736;
(2) the first equation is linearized into a first order term, and the third equation is a third order term: system i becomes
In the formula, x, y and z are state variables, and a and m are parameters; system ii has three equilibrium points
And
characteristic value at equilibrium point is λ1＝-1.8637,λ2,3＝0.4319±1.1930j，λ1＝0,λ2＝0，λ 31 and λ ═ 1 and1＝-1.8637,λ2,30.4319 ± 1.1930j, and a lith index of L1＝0.1486,L2＝0,L3-1.1486, fractal dimension 2.1294;
designing a circuit according to the chaotic system ii, wherein the circuit consists of three resistors, a capacitor and operational amplifier L F347BN and a multiplier AD633JN, the resistor and operational amplifier L F347BN realizes inverse addition and inverse operation, the capacitor and operational amplifier L F347BN realizes integral operation, and the multiplication is realized by the multiplier AD633 JN;
the input end of the second path of inverting adder is connected with the function S through a resistor R, the input end of the second path of inverting adder is connected with the other input end of the multiplier (A) through a resistor R, the integral output end of the second path of inverting adder is connected with the other input end of the multiplier (A) and is connected with one input end of the multiplier (A), the inverting output end of the second path of inverting adder is connected with the negative input end of the operational amplifier F347 (U4) and is connected with one input end of the multiplier (A), the inverting output end of the second path of inverting adder is connected with the negative input end of the operational amplifier F347 (U5) through a resistor R, the inverting output end of the operational amplifier F347 (U5) is connected with the other input end of the multiplier (A), the inverting input end of the third path of inverting adder is connected with the function F x through a resistor R, the inverting output end of the operational amplifier F347 (U5) is connected with the other input end of the multiplier (A), and the inverting adder (A) is connected with the other input end of the third path of inverting adder (R);
the sign circuit is designed according to the chaotic system ii, and comprises a resistor, an operational amplifier L F347BN and a multiplier, wherein the output end of the operational amplifier L F347BN (U4A) is connected with the negative input end of the operational amplifier L0F 347BN (U4B) through a resistor R20, the negative input end of the operational amplifier L F347BN (U4B) is connected with the output end of the operational amplifier L F347BN (U4B) through a resistor R22, the output end of the operational amplifier L F347BN (U4B) is connected with the other input end of the multiplier (A1), the output end of the multiplier A1 is connected with zsgn (y), the output end of the operational amplifier L F347L (U4L) is connected with the negative input end of the operational amplifier L F347L (U4L) through a resistor R L, and the output end of the operational amplifier L F347L (U4) is connected with the output end of the multiplier (U L A L, the output end of the operational amplifier L A L, the operational amplifier L A L, the output end of the operational amplifier L (U L);
an absolute value circuit is designed according to the chaotic system ii, the circuit is composed of a resistor, a diode and an operational amplifier L F347BN, a negative input end of the operational amplifier L F347BN (U5A) is connected to an output end of the operational amplifier 1F347 1 (U5 1) through a resistor R23 and a diode D1, a negative input end of the operational amplifier 1F347 1 (U5 1) is connected to the negative input end of the operational amplifier 1F347 1 (U5 1) through a resistor R1 and a resistor R1, a positive input end of the operational amplifier 1F347 1 (U5F 347), a positive input end of the operational amplifier 1F347 1 (U5F 1) is connected to the ground through a resistor R1, an output end of the operational amplifier 1F347 1 (U5F 1) is connected to the negative input end of the operational amplifier 1F347 1F (U1F) through a resistor R1F, a 1F347, a negative input end of the operational amplifier 1F 1, a negative input end (U5F 347) is connected to the operational amplifier 1F347 1F 1, a negative input end of the operational amplifier 1F 1 (1) is connected to the operational amplifier 1F 72F 1F 347) and a negative input end of the operational amplifier 1F347 1F347, the negative input end (U5F 347) is connected to the negative input end of the operational amplifier 1F 347) of the operational amplifier 1F347 1 (U1F 347) is connected to the operational amplifier 1F 347) and the negative input end of the operational amplifier 1F347 1F 347U 1F347 1F347 1F347, the negative input end of the operational;
designing a multiplication circuit according to the chaotic system ii, wherein the circuit consists of a multiplier, the output end of the multiplier (A4) outputs-xy, and the output end of the multiplier (A4) is connected with the other input end of the multiplier (A5); the output end of the multiplier (A5) outputs-xy | y |; the output end of the multiplier (A6) outputs x | x |; the output end of the multiplier (A3) is connected with yz; the output end of the multiplier (A7) outputs-y |;
designing a power supply circuit according to the chaotic system ii, wherein the circuit consists of a-1V power supply, the anode of the power supply is grounded, and the cathode of the power supply is connected with P1;
when S1 is connected with yz, S2 is connected with the first path of inverted output, S3 is connected with the second path of integral output, F (x) is connected with P1, G (x) is connected with xy, the circuit realizes a Sprotet B chaotic system i;
when S1 is connected with zsgn (y), S2 is connected with the first path of inverted output, S3 is connected with the second path of integral output, F (x) is connected with | x | and G (x) is connected with-xy | y |, the circuit realizes the chaotic system ii.
It is to be understood that the above description is not intended to limit the invention, and the invention is not limited to the above examples, and that various changes, modifications, additions and substitutions which may be made by one skilled in the art within the spirit and scope of the invention are included therein.
Claims (1)
1. The linear Sprott B chaotic system is a circuit with first and third terms, and is characterized in that:
(1) the original Sprott B chaotic system i is as follows:
in the formula, x, y and z are state variables, and a and m are parameters; system i has two balance points
And
the characteristic values at the equilibrium points are each lambda1＝-1.3532,λ2,30.1766 ± 1.2028j and λ1＝-1.3532,λ2,30.1766 + -1.2028 j, Lee index L1＝0.2101,L2＝0,L3-1.2102, fractal dimension 2.1736;
(2) the first equation is linearized into a first order term, and the third equation is a third order term: system i becomes
In the formula, x, y and z are state variables, and a and m are parameters; system ii has three equilibrium points
(0,0, z) and
characteristic value at equilibrium point is λ1＝-1.8637,λ2,3＝0.4319±1.1930j，λ1＝0,λ2＝0，λ31 and λ ═ 1 and1＝-1.8637,λ2,30.4319 ± 1.1930j, and a lith index of L1＝0.1486,L2＝0,L3-1.1486, fractal dimension 2.1294;
designing a circuit according to the chaotic system ii, wherein the circuit consists of three resistors, a capacitor and operational amplifier L F347BN and a multiplier AD633JN, the resistor and operational amplifier L F347BN realizes inverse addition and inverse operation, the capacitor and operational amplifier L F347BN realizes integral operation, and the multiplication is realized by the multiplier AD633 JN;
the input end of the second path of inverting adder is connected with the function S through a resistor R, the input end of the second path of inverting adder is connected with the other input end of the multiplier (A) through a resistor R, the integral output end of the second path of inverting adder is connected with the other input end of the multiplier (A) and is connected with one input end of the multiplier (A), the inverting output end of the second path of inverting adder is connected with the negative input end of the operational amplifier F347 (U4) and is connected with one input end of the multiplier (A), the inverting output end of the second path of inverting adder is connected with the negative input end of the operational amplifier F347 (U5) through a resistor R, the inverting output end of the operational amplifier F347 (U5) is connected with the other input end of the multiplier (A), the inverting input end of the third path of inverting adder is connected with the function F x through a resistor R, the inverting output end of the operational amplifier F347 (U5) is connected with the other input end of the multiplier (A), and the inverting adder (A) is connected with the other input end of the third path of inverting adder (R);
the sign circuit is designed according to the chaotic system ii, and comprises a resistor, an operational amplifier L F347BN and a multiplier, wherein the output end of the operational amplifier L F347BN (U4A) is connected with the negative input end of the operational amplifier L0F 347BN (U4B) through a resistor R20, the negative input end of the operational amplifier L F347BN (U4B) is connected with the output end of the operational amplifier L F347BN (U4B) through a resistor R22, the output end of the operational amplifier L F347BN (U4B) is connected with the other input end of the multiplier (A1), the output end of the multiplier A1 is connected with zsgn (y), the output end of the operational amplifier L F347L (U4L) is connected with the negative input end of the operational amplifier L F347L (U4L) through a resistor R L, and the output end of the operational amplifier L F347L (U4) is connected with the output end of the multiplier (U L A L, the output end of the operational amplifier L A L, the operational amplifier L A L, the output end of the operational amplifier L (U L);
an absolute value circuit is designed according to the chaotic system ii, the circuit is composed of a resistor, a diode and an operational amplifier L F347BN, a negative input end of the operational amplifier L F347BN (U5A) is connected to an output end of the operational amplifier 1F347 1 (U5 1) through a resistor R23 and a diode D1, a negative input end of the operational amplifier 1F347 1 (U5 1) is connected to the negative input end of the operational amplifier 1F347 1 (U5 1) through a resistor R1 and a resistor R1, a positive input end of the operational amplifier 1F347 1 (U5F 347), a positive input end of the operational amplifier 1F347 1 (U5F 1) is connected to the ground through a resistor R1, an output end of the operational amplifier 1F347 1 (U5F 1) is connected to the negative input end of the operational amplifier 1F347 1F (U1F) through a resistor R1F, a 1F347, a negative input end of the operational amplifier 1F 1, a negative input end (U5F 347) is connected to the operational amplifier 1F347 1F 1, a negative input end of the operational amplifier 1F 1 (1) is connected to the operational amplifier 1F 72F 1F 347) and a negative input end of the operational amplifier 1F347 1F347, the negative input end (U5F 347) is connected to the negative input end of the operational amplifier 1F 347) of the operational amplifier 1F347 1 (U1F 347) is connected to the operational amplifier 1F 347) and the negative input end of the operational amplifier 1F347 1F 347U 1F347 1F347 1F347, the negative input end of the operational;
designing a multiplication circuit according to the chaotic system ii, wherein the circuit consists of a multiplier, the output end of the multiplier (A4) outputs-xy, and the output end of the multiplier (A4) is connected with the other input end of the multiplier (A5); the output end of the multiplier (A5) outputs-xy | y |; the output end of the multiplier (A6) outputs x | x |; the output end of the multiplier (A3) is connected with yz; the output end of the multiplier (A7) outputs-y |;
designing a power supply circuit according to the chaotic system ii, wherein the circuit consists of a-1V power supply, the anode of the power supply is grounded, and the cathode of the power supply is connected with P1;
when S1 is connected with yz, S2 is connected with the first path of inverted output, S3 is connected with the second path of integral output, F (x) is connected with P1, G (x) is connected with xy, the circuit realizes a Sprotet B chaotic system i;
when S1 is connected with zsgn (y), S2 is connected with the first path of inverted output, S3 is connected with the second path of integral output, F (x) is connected with | x | and G (x) is connected with-xy | y |, the circuit realizes the chaotic system ii.
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| CN109167658B (en) * | 2018-10-31 | 2024-08-09 | 史林鑫 | Three-order hysteresis nonlinear chaotic circuit |
| CN112152773B (en) * | 2019-06-28 | 2022-08-02 | 天津科技大学 | A three-dimensional improved Sprott-A chaotic system and its circuit implementation |
| CN112422264B (en) * | 2019-08-23 | 2022-05-20 | 天津科技大学 | Generalized Sprott-A system with three clusters of conservative chaotic streams and circuit implementation thereof |
| CN112422259B (en) * | 2019-08-23 | 2022-08-02 | 天津科技大学 | A Construction Method of Generalized Sprott-A System with Eight Conservative Chaos Flows |
| CN112422258B (en) * | 2019-08-23 | 2022-07-29 | 天津科技大学 | A Construction Method of Improved Sprott-A System with Single-cluster Conservative Chaotic Flow |
| CN112422261B (en) * | 2019-08-23 | 2022-05-20 | 天津科技大学 | Generalized Sprotet-A system with four cluster conservative chaotic streams and construction method thereof |
| CN112422263B (en) * | 2019-08-23 | 2022-05-20 | 天津科技大学 | Generalized Sprott-A system with three-dimensional 3 x 2 cluster conservative chaotic stream and circuit implementation thereof |
| CN112422766B (en) * | 2019-08-23 | 2022-07-29 | 天津科技大学 | Generalized Sprott-A system with three-dimensional 2 x 1 cluster conservative chaotic stream and circuit implementation thereof |
| CN113078995A (en) * | 2021-04-23 | 2021-07-06 | 上海理工大学 | High-complexity four-dimensional hyperchaotic circuit |
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| CN107483176B (en) | 2020-06-05 |
| CN107483176A (en) | 2017-12-15 |
| CN106059744A (en) | 2016-10-26 |
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| CN107453859A (en) | 2017-12-08 |
| CN107453860A (en) | 2017-12-08 |
| CN107483175A (en) | 2017-12-15 |
| CN107453859B (en) | 2020-06-02 |
| CN107483175B (en) | 2020-06-05 |
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| CN107437989A (en) | 2017-12-05 |
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