CN107170810A - A kind of inverse-impedance type gallium nitride device - Google Patents
A kind of inverse-impedance type gallium nitride device Download PDFInfo
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- 229910002601 GaN Inorganic materials 0.000 title claims abstract description 50
- JMASRVWKEDWRBT-UHFFFAOYSA-N Gallium nitride Chemical compound [Ga]#N JMASRVWKEDWRBT-UHFFFAOYSA-N 0.000 title claims abstract description 19
- 229910052710 silicon Inorganic materials 0.000 claims abstract description 14
- 239000010703 silicon Substances 0.000 claims abstract description 14
- 229910052751 metal Inorganic materials 0.000 claims description 48
- 239000002184 metal Substances 0.000 claims description 48
- 239000000463 material Substances 0.000 claims description 10
- 239000000758 substrate Substances 0.000 claims description 7
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 6
- 230000004888 barrier function Effects 0.000 claims description 6
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 claims description 4
- 239000010931 gold Substances 0.000 claims description 4
- 229910052737 gold Inorganic materials 0.000 claims description 4
- 229910017083 AlN Inorganic materials 0.000 claims description 3
- 229910052581 Si3N4 Inorganic materials 0.000 claims description 3
- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 claims description 3
- 229910052681 coesite Inorganic materials 0.000 claims description 3
- 229910052593 corundum Inorganic materials 0.000 claims description 3
- 229910052906 cristobalite Inorganic materials 0.000 claims description 3
- CPLXHLVBOLITMK-UHFFFAOYSA-N magnesium oxide Inorganic materials [Mg]=O CPLXHLVBOLITMK-UHFFFAOYSA-N 0.000 claims description 3
- 229910052594 sapphire Inorganic materials 0.000 claims description 3
- 239000010980 sapphire Substances 0.000 claims description 3
- HYXGAEYDKFCVMU-UHFFFAOYSA-N scandium(III) oxide Inorganic materials O=[Sc]O[Sc]=O HYXGAEYDKFCVMU-UHFFFAOYSA-N 0.000 claims description 3
- 229910010271 silicon carbide Inorganic materials 0.000 claims description 3
- 239000000377 silicon dioxide Substances 0.000 claims description 3
- 229910052682 stishovite Inorganic materials 0.000 claims description 3
- 229910052905 tridymite Inorganic materials 0.000 claims description 3
- 229910001845 yogo sapphire Inorganic materials 0.000 claims description 3
- 238000009413 insulation Methods 0.000 claims 6
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 abstract description 13
- 238000000034 method Methods 0.000 abstract description 13
- 238000005516 engineering process Methods 0.000 abstract description 12
- 239000004065 semiconductor Substances 0.000 abstract description 12
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- 238000004519 manufacturing process Methods 0.000 abstract description 8
- 239000010410 layer Substances 0.000 description 41
- 238000010586 diagram Methods 0.000 description 8
- 229910018072 Al 2 O 3 Inorganic materials 0.000 description 5
- 230000000903 blocking effect Effects 0.000 description 5
- 230000005669 field effect Effects 0.000 description 5
- 239000003989 dielectric material Substances 0.000 description 4
- 229910001385 heavy metal Inorganic materials 0.000 description 4
- 238000000137 annealing Methods 0.000 description 3
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- 238000002488 metal-organic chemical vapour deposition Methods 0.000 description 2
- 238000005036 potential barrier Methods 0.000 description 2
- HBMJWWWQQXIZIP-UHFFFAOYSA-N silicon carbide Chemical compound [Si+]#[C-] HBMJWWWQQXIZIP-UHFFFAOYSA-N 0.000 description 2
- 235000012239 silicon dioxide Nutrition 0.000 description 2
- 230000005641 tunneling Effects 0.000 description 2
- 235000012431 wafers Nutrition 0.000 description 2
- 229910005191 Ga 2 O 3 Inorganic materials 0.000 description 1
- -1 Si 3 N 4 Inorganic materials 0.000 description 1
- 229910004298 SiO 2 Inorganic materials 0.000 description 1
- 229910010413 TiO 2 Inorganic materials 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 230000005540 biological transmission Effects 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 230000015556 catabolic process Effects 0.000 description 1
- 230000008859 change Effects 0.000 description 1
- 239000002131 composite material Substances 0.000 description 1
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- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/40—FETs having zero-dimensional [0D], one-dimensional [1D] or two-dimensional [2D] charge carrier gas channels
- H10D30/47—FETs having zero-dimensional [0D], one-dimensional [1D] or two-dimensional [2D] charge carrier gas channels having 2D charge carrier gas channels, e.g. nanoribbon FETs or high electron mobility transistors [HEMT]
- H10D30/471—High electron mobility transistors [HEMT] or high hole mobility transistors [HHMT]
- H10D30/475—High electron mobility transistors [HEMT] or high hole mobility transistors [HHMT] having wider bandgap layer formed on top of lower bandgap active layer, e.g. undoped barrier HEMTs such as i-AlGaN/GaN HEMTs
- H10D30/4755—High electron mobility transistors [HEMT] or high hole mobility transistors [HHMT] having wider bandgap layer formed on top of lower bandgap active layer, e.g. undoped barrier HEMTs such as i-AlGaN/GaN HEMTs having wide bandgap charge-carrier supplying layers, e.g. modulation doped HEMTs such as n-AlGaAs/GaAs HEMTs
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- H10D30/67—Thin-film transistors [TFT]
- H10D30/6729—Thin-film transistors [TFT] characterised by the electrodes
- H10D30/6737—Thin-film transistors [TFT] characterised by the electrodes characterised by the electrode materials
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Abstract
本发明属于半导体技术领域,具体的说是涉及一种逆阻型氮化镓器件。本发明针对常规的逆阻型AlGaN/GaN异质结高电子迁移率晶体管与传统硅CMOS工艺不兼容以及器件制备温度高等问题,本发明提出了一种无欧姆接触的逆阻型氮化镓器件。本发明所提出的逆阻型氮化镓器件具有与传统硅工艺兼容、可低温制备等优点。
The invention belongs to the technical field of semiconductors, and in particular relates to a reverse-resistance gallium nitride device. Aiming at the incompatibility between the conventional reverse-resistance AlGaN/GaN heterojunction high electron mobility transistor and the traditional silicon CMOS process and the high temperature of device fabrication, the present invention proposes a reverse-resistance gallium nitride device without ohmic contact . The reverse-resistance gallium nitride device proposed by the invention has the advantages of being compatible with traditional silicon technology, being able to be prepared at low temperature, and the like.
Description
技术领域technical field
本发明属于半导体技术领域,具体的说是涉及一种逆阻型氮化镓器件。The invention belongs to the technical field of semiconductors, and in particular relates to a reverse-resistance gallium nitride device.
背景技术Background technique
电力电子技术是现代科学、工业和国防的重要支撑技术,其中功率半导体器件既是电力电子技术的基础,也是电力电子技术发展的强大动力,功率半导体器件的发展对电力电子技术的发展起着决定性作用。其中,以功率MOS场效应管(MOSFET)和绝缘栅晶体管(IGBT)为代表的新型功率半导体器件占据了主导地位,在4C电子产品、工业控制、国防装备等领域发挥着重要作用。然而,以硅材料为基础的功率MOSFET器件越来越显示出其不足和局限性。宽禁带半导体材料具有更优的材料特性,有望解决当今功率半导体器件发展所面临的“硅极限”问题。Power electronics technology is an important supporting technology for modern science, industry and national defense. Among them, power semiconductor devices are not only the foundation of power electronics technology, but also a powerful driving force for the development of power electronics technology. The development of power semiconductor devices plays a decisive role in the development of power electronics technology. . Among them, new power semiconductor devices represented by power MOS field effect transistors (MOSFETs) and insulated gate transistors (IGBTs) occupy a dominant position and play an important role in the fields of 4C electronic products, industrial control, and national defense equipment. However, power MOSFET devices based on silicon materials are increasingly showing their shortcomings and limitations. Wide bandgap semiconductor materials have better material properties and are expected to solve the "silicon limit" problem faced by the development of power semiconductor devices today.
宽禁带半导体材料GaN具有宽带隙、高电子饱和漂移速度、高热导率、高临界击穿电场等突出优点,极大地提高了GaN电力电子器件耐压容量、工作频率和电流密度,大大降低了器件导通损耗,使器件可以在大功率和高温等恶劣条件下工作。特别是硅基氮化镓技术结合了GaN材料的性能优势和硅技术的成本优势,已成为国际功率半导体领域战略制高点,受到世界各国政府高度重视。与传统的Si基电力电子器件相比,目前已实用化的宽禁带半导体电力电子器件可将功耗降低一半,从而减少甚至取消冷却系统,大幅度降低电力变换器的体积和重量。The wide bandgap semiconductor material GaN has outstanding advantages such as wide band gap, high electron saturation drift velocity, high thermal conductivity, high critical breakdown electric field, etc., which greatly improves the withstand voltage capacity, operating frequency and current density of GaN power electronic devices, and greatly reduces The conduction loss of the device enables the device to work under harsh conditions such as high power and high temperature. In particular, gallium nitride on silicon technology combines the performance advantages of GaN materials and the cost advantages of silicon technology. It has become a strategic commanding height in the field of international power semiconductors and has been highly valued by governments around the world. Compared with traditional Si-based power electronic devices, the wide-bandgap semiconductor power electronic devices that have been practical at present can reduce power consumption by half, thereby reducing or even eliminating cooling systems, and greatly reducing the size and weight of power converters.
宽禁带半导体电力电子器件具有非常广泛的军用和民用价值,如坦克、舰艇、飞机、火炮等军事设备的功率电子系统领域、以及民用电力电子设备、家用电器、列车牵引设备、高压直流输电设备,也正在应用到PC、混合动力车辆、电动汽车,太阳能发电等系统。在这些新型电力电子系统中,GaN电力电子器件是最核心的关键技术之一,可大大降低电能的消耗,因此也被誉为带动“新能源革命”的“绿色能源”器件。Wide bandgap semiconductor power electronic devices have a very wide range of military and civilian values, such as tanks, ships, aircraft, artillery and other military equipment in the field of power electronic systems, as well as civilian power electronic equipment, household appliances, train traction equipment, high-voltage direct current transmission equipment , It is also being applied to systems such as PCs, hybrid vehicles, electric vehicles, and solar power generation. In these new power electronic systems, GaN power electronic devices are one of the core key technologies, which can greatly reduce power consumption, so they are also known as "green energy" devices that drive the "new energy revolution".
基于AlGaN/GaN异质结的高电子迁移率晶体管(HEMT)(或异质结场效应晶体管HFET)在半导体领域已经取得广泛应用。但是常规的AlGaN/GaN异质结高电子迁移率晶体管不具备反向阻断能力,当漏极电压反向时,会出现较大的反向电流。这种情况在实际工作中可能会导致器件或者系统的损坏。为解决这些问题,近年来人们提出了几种逆阻型AlGaN/GaN异质结高电子迁移率晶体管。但是常规的逆阻型AlGaN/GaN异质结高电子迁移率晶体管都存在欧姆接触,需要金等重金属以及在高温条件下制备,使得器件与传统的硅工艺不兼容。并且在高温欧姆退火过程中,器件表面将会被氧化,这会导致表面态的产生。这些表面陷阱会俘获电子,使得器件在动态开关过程中会产生较大动态电阻。AlGaN/GaN heterojunction-based high electron mobility transistors (HEMTs) (or heterojunction field effect transistors HFETs) have been widely used in the semiconductor field. However, conventional AlGaN/GaN heterojunction high electron mobility transistors do not have reverse blocking capability, and when the drain voltage is reversed, a large reverse current will appear. This situation may cause damage to devices or systems in actual work. To solve these problems, several reverse-resistance AlGaN/GaN heterojunction high electron mobility transistors have been proposed in recent years. However, conventional reverse-resistance AlGaN/GaN heterojunction high electron mobility transistors have ohmic contacts, require heavy metals such as gold, and are prepared under high temperature conditions, making the device incompatible with traditional silicon processes. And during the high-temperature ohmic annealing process, the surface of the device will be oxidized, which will lead to the generation of surface states. These surface traps trap electrons, resulting in a large dynamic resistance during dynamic switching of the device.
发明内容Contents of the invention
本发明的目的,是针对常规的逆阻型AlGaN/GaN异质结高电子迁移率晶体管与传统硅CMOS工艺不兼容以及器件制备温度高等问题,本发明提出了一种无欧姆接触的逆阻型氮化镓器件。本发明所提出的逆阻型氮化镓器件具有与传统硅工艺兼容、可低温制备等优点。The purpose of the present invention is to solve the problems that the conventional reverse resistance type AlGaN/GaN heterojunction high electron mobility transistor is not compatible with the traditional silicon CMOS process and the device preparation temperature is high. The present invention proposes a reverse resistance type without ohmic contact GaN devices. The reverse-resistance gallium nitride device proposed by the invention has the advantages of being compatible with traditional silicon technology, being able to be prepared at low temperature, and the like.
本发明的技术方案是:一种逆阻型氮化镓器件,包括从下至上依次层叠设置的衬底1、GaN层2和MGaN层3,所述GaN层2和MGaN层3形成异质结;所述M为除Ga之外的Ⅲ族元素;所述MGaN层3上表面一端具有漏极金属5,所述漏极金属5与MGaN层3形成肖特基势垒接触;其特征在于,在所述MGaN层3另一端具有绝缘栅极结构6,所述绝缘栅极结构6由绝缘栅介质8和金属栅电极9构成,其中金属栅电极9位于绝缘栅凹槽7中,所述绝缘栅凹槽7为贯穿MGaN层3并延伸入GaN层2上表面的凹槽,金属栅电极9与MGaN层3和GaN层2之间通过绝缘栅介质8隔离;与绝缘栅极结构6相邻的MGaN层3上表面具有源极金属4,所述源极金属4与金属栅电极9之间通过绝缘栅介质8隔离,且绝缘栅介质8完全覆盖源极金属4的表面并沿MGaN层3上表面延伸至与部分漏极金属5的下表面接触。The technical solution of the present invention is: a reverse-resistance gallium nitride device, including a substrate 1, a GaN layer 2 and an MGaN layer 3 stacked sequentially from bottom to top, and the GaN layer 2 and MGaN layer 3 form a heterojunction The M is a Group III element other than Ga; one end of the upper surface of the MGaN layer 3 has a drain metal 5, and the drain metal 5 forms a Schottky barrier contact with the MGaN layer 3; it is characterized in that, There is an insulating gate structure 6 at the other end of the MGaN layer 3, and the insulating gate structure 6 is composed of an insulating gate dielectric 8 and a metal gate electrode 9, wherein the metal gate electrode 9 is located in the insulating gate groove 7, and the insulating gate The gate groove 7 is a groove that penetrates the MGaN layer 3 and extends into the upper surface of the GaN layer 2, and the metal gate electrode 9 is isolated from the MGaN layer 3 and the GaN layer 2 by an insulating gate dielectric 8; it is adjacent to the insulating gate structure 6 The upper surface of the MGaN layer 3 has a source metal 4, the source metal 4 is isolated from the metal gate electrode 9 by an insulating gate dielectric 8, and the insulating gate dielectric 8 completely covers the surface of the source metal 4 and along the MGaN layer 3 The upper surface extends to contact with a portion of the lower surface of the drain metal 5 .
进一步的,所述漏极金属5底部不与绝缘栅介质8接触的部分,向下延伸至嵌入GaN层2上层。Further, the part of the bottom of the drain metal 5 that is not in contact with the insulating gate dielectric 8 extends down to the upper layer of the embedded GaN layer 2 .
进一步的,所述衬底1采用的材料为硅、蓝宝石、碳化硅和氮化镓中的一种。Further, the material used for the substrate 1 is one of silicon, sapphire, silicon carbide and gallium nitride.
进一步的,所述绝缘栅介质8采用的材料为SiO2、Si3N4、AlN、Al2O3、MgO和Sc2O3中的一种。Further, the material used for the insulating gate dielectric 8 is one of SiO 2 , Si 3 N 4 , AlN, Al 2 O 3 , MgO and Sc 2 O 3 .
本发明的有益效果是:针对常规的逆阻型AlGaN/GaN异质结高电子迁移率晶体管存在的与传统硅CMOS工艺不兼容以及器件制备温度高等问题,本发明提出了一种无欧姆接触的逆阻型氮化镓器件,该器件由于不存在欧姆接触,能与传统硅工艺兼容、可低温制备。The beneficial effects of the present invention are: for the problems of conventional reverse resistance AlGaN/GaN heterojunction high electron mobility transistors being incompatible with the traditional silicon CMOS process and high device manufacturing temperature, the present invention proposes a non-ohmic contact Reverse-resistance gallium nitride device, because there is no ohmic contact, the device is compatible with traditional silicon technology and can be prepared at low temperature.
附图说明Description of drawings
图1为本发明的器件结构示意图;Fig. 1 is a device structure schematic diagram of the present invention;
图2为本发明的器件工作原理示意图;Fig. 2 is a schematic diagram of the working principle of the device of the present invention;
图3为本发明的器件制造工艺流程中外延片示意图;Fig. 3 is a schematic diagram of epitaxial wafers in the device manufacturing process flow of the present invention;
图4为本发明的器件制造工艺流程中生长源极肖特基金属和漏极肖特基金属后结构示意图;Fig. 4 is a schematic diagram of the structure after growing source Schottky metal and drain Schottky metal in the device manufacturing process flow of the present invention;
图5为本发明的器件制造工艺流程中刻蚀MGaN形成绝缘栅凹槽后结构示意图;5 is a schematic diagram of the structure after etching MGaN to form insulating gate grooves in the device manufacturing process flow of the present invention;
图6为本发明的器件制造工艺流程中生长绝缘层后结构示意图;6 is a schematic diagram of the structure after growing an insulating layer in the device manufacturing process flow of the present invention;
图7为本发明的器件制造工艺流程中生长绝缘栅金属后结构示意图。FIG. 7 is a schematic diagram of the structure after growing an insulating gate metal in the device manufacturing process flow of the present invention.
图8为本发明的另一种器件结构示意图。FIG. 8 is a schematic diagram of another device structure of the present invention.
具体实施方式detailed description
下面结合附图,详细描述本发明的技术方案:Below in conjunction with accompanying drawing, describe technical scheme of the present invention in detail:
如图1所示,为本发明的逆阻型氮化镓器件,包括从下至上依次层叠设置的衬底1、GaN层2和MGaN层3,所述GaN层2和MGaN层3形成异质结;所述M为除Ga之外的Ⅲ族元素;所述MGaN层3上表面一端具有漏极金属5,所述漏极金属5与MGaN层3形成肖特基势垒接触;其特征在于,在所述MGaN层3另一端具有绝缘栅极结构6,所述绝缘栅极结构6由绝缘栅介质8和金属栅电极9构成,其中金属栅电极9位于绝缘栅凹槽7中,所述绝缘栅凹槽7为贯穿MGaN层3并延伸入GaN层2上表面的凹槽,金属栅电极9与MGaN层3和GaN层2之间通过绝缘栅介质8隔离;与绝缘栅极结构6相邻的MGaN层3上表面具有源极金属4,所述源极金属4与金属栅电极9之间通过绝缘栅介质8隔离,且绝缘栅介质8完全覆盖源极金属4的表面并沿MGaN层3上表面延伸至与部分漏极金属5的下表面接触。As shown in FIG. 1, it is a reverse-resistance gallium nitride device of the present invention, which includes a substrate 1, a GaN layer 2, and an MGaN layer 3 that are sequentially stacked from bottom to top, and the GaN layer 2 and MGaN layer 3 form a heterogeneous Junction; the M is a group III element except Ga; one end of the upper surface of the MGaN layer 3 has a drain metal 5, and the drain metal 5 forms a Schottky barrier contact with the MGaN layer 3; it is characterized in that , there is an insulating gate structure 6 at the other end of the MGaN layer 3, the insulating gate structure 6 is composed of an insulating gate dielectric 8 and a metal gate electrode 9, wherein the metal gate electrode 9 is located in the insulating gate groove 7, the The insulating gate groove 7 is a groove that penetrates the MGaN layer 3 and extends into the upper surface of the GaN layer 2, and the metal gate electrode 9 is isolated from the MGaN layer 3 and the GaN layer 2 by an insulating gate dielectric 8; The upper surface of the adjacent MGaN layer 3 has a source metal 4, the source metal 4 is isolated from the metal gate electrode 9 by an insulating gate dielectric 8, and the insulating gate dielectric 8 completely covers the surface of the source metal 4 and along the MGaN layer 3. The upper surface extends to contact with the lower surface of part of the drain metal 5.
传统的逆阻型氮化镓场效应晶体管存在欧姆接触,需要金等重金属并在高温条件下制备,使得器件与传统的硅工艺不兼容。并且在高温欧姆退火过程中,器件表面将会被氧化,这会导致表面态的产生。这些表面陷阱会俘获电子,使得器件在动态开关过程中会产生较大动态电阻。为解决这些问题,本发明提出了一种无欧姆接触的逆阻型氮化镓场效应晶体管(如图1所示)。本发明器件的源极和漏极都是肖特基接触结构而非传统的欧姆接触结构,同时在肖特基源极结构附近的引入一个栅极结构以控制源极肖特基接触下方势垒层的能带结构来实现器件的实现开启与关断。由于本发明的逆阻型氮化镓场效应晶体管不存在欧姆接触,不需要利用重金属,可以与CMOS工艺兼容。同时,本发明不需要高温退火工艺,器件可以在较低的温度下制备,可以避免器件表面被氧化等问题。Traditional reverse-resistance GaN field effect transistors have ohmic contacts, require heavy metals such as gold, and are prepared under high temperature conditions, making the device incompatible with traditional silicon processes. And during the high-temperature ohmic annealing process, the surface of the device will be oxidized, which will lead to the generation of surface states. These surface traps trap electrons, resulting in a large dynamic resistance during dynamic switching of the device. In order to solve these problems, the present invention proposes a reverse-resistance gallium nitride field effect transistor without ohmic contact (as shown in FIG. 1 ). The source and the drain of the device of the present invention are both Schottky contact structures instead of traditional ohmic contact structures, and at the same time, a gate structure is introduced near the Schottky source structure to control the potential barrier below the source Schottky contact The energy band structure of the layer is used to realize the turn-on and turn-off of the device. Since the reverse-resistance gallium nitride field effect transistor of the present invention has no ohmic contact, it does not need to use heavy metals and is compatible with CMOS technology. At the same time, the invention does not require a high-temperature annealing process, the device can be prepared at a lower temperature, and problems such as oxidation of the device surface can be avoided.
在如图1所示的结构中,在AlGaN层表面生长SiO2、Si3N4、AlN、Al2O3、MgO或Sc2O3作为钝化层,可以进一步降低漏电,提高性能。源极肖特基接触电极嵌入GaN层上层的凹槽深度为几百纳米。肖特基源极结构与绝缘栅结构用绝缘介质隔开,介质质量的好坏直接影响器件的性能。In the structure shown in Figure 1, growing SiO2, Si3N4, AlN, Al2O3, MgO or Sc2O3 on the surface of the AlGaN layer as a passivation layer can further reduce leakage and improve performance. The groove depth of the source Schottky contact electrode embedded in the upper layer of the GaN layer is hundreds of nanometers. The Schottky source structure and the insulated gate structure are separated by an insulating medium, and the quality of the medium directly affects the performance of the device.
本发明的基本工作原理是:Basic working principle of the present invention is:
首先通过肖特基源极接触附近的绝缘栅结构控制肖特基接触下方势垒层的能带结构来改变器件的工作状态,实现器件的开启和关断。当栅极加上正电压时,源极肖特基下方的势垒厚度变薄(图2),电子的隧穿几率增加,可以使得器件具有类似欧姆接触的电流特性;当在栅极负电压时,肖特基势垒厚度变厚,电子的隧穿几率降低,电子几乎无法通过势垒,器件可以实现正向阻断能力。同时本发明利用肖特基漏极实现器件的反向阻断。First, the energy band structure of the barrier layer under the Schottky contact is controlled by the insulated gate structure near the Schottky source contact to change the working state of the device, and the device is turned on and off. When a positive voltage is applied to the gate, the thickness of the potential barrier under the source Schottky becomes thinner (Figure 2), and the tunneling probability of electrons increases, which can make the device have a current characteristic similar to an ohmic contact; when a negative voltage on the gate When , the Schottky barrier thickness becomes thicker, the electron tunneling probability decreases, electrons can hardly pass through the barrier, and the device can achieve forward blocking capability. At the same time, the invention utilizes the Schottky drain to realize the reverse blocking of the device.
本发明的器件与传统CMOS工艺兼容,可以利用传统的CMOS工艺线制备该器件,需要特别说明的是:The device of the present invention is compatible with the traditional CMOS process, and can utilize the traditional CMOS process line to prepare the device. It should be noted that:
1、衬底1可以是硅、蓝宝石,碳化硅或者氮化镓。1. The substrate 1 can be silicon, sapphire, silicon carbide or gallium nitride.
2、衬底1和GaN层2之间可以存在其他的材料。2. Other materials may exist between the substrate 1 and the GaN layer 2 .
3、漏极金属5可延伸至GaN层2。3. The drain metal 5 can extend to the GaN layer 2 .
4、源极金属4及漏极金属5和MGaN层3之间形成的是肖特基接触而非传统的欧姆接触。4. A Schottky contact rather than a traditional ohmic contact is formed between the source metal 4 and the drain metal 5 and the MGaN layer 3 .
5、所述绝缘栅介质8采用的材料为SiO2、Si3N4、AlN、Al2O3、MgO或Sc2O3中的一种。5. The material used for the insulating gate dielectric 8 is one of SiO2, Si3N4, AlN, Al2O3, MgO or Sc2O3.
6、绝缘栅极结构6必须在源极金属4附近。6. The insulating gate structure 6 must be near the source metal 4 .
7、绝缘栅极结构6须延伸至GaN层2。7. The insulating gate structure 6 must extend to the GaN layer 2 .
8、延长肖特基漏极金属5在绝缘栅介质8的金属长度形成漏极场板可以提高器件的反向阻断能力。8. Extending the metal length of the Schottky drain metal 5 on the insulating gate dielectric 8 to form a drain field plate can improve the reverse blocking capability of the device.
9、延长肖特基漏极金属4在绝缘栅介质8表面的金属长度形成源极场板可以提高器件的正向阻断能力。9. Extending the metal length of the Schottky drain metal 4 on the surface of the insulating gate dielectric 8 to form a source field plate can improve the forward blocking capability of the device.
10、源极金属4、漏极金属5以及金属栅电极9可以不包含金等重金属。10. The source metal 4 , the drain metal 5 and the metal gate electrode 9 may not contain heavy metals such as gold.
在本发明中,可采用以下两种方案来制备绝缘介质材料。In the present invention, the following two schemes can be used to prepare the insulating dielectric material.
(a)采用原子层淀积(ALD)制备Al2O3、HfO2、TiO2等介质材料。ALD所生长的薄膜是自限制的,能精确地控制薄膜的厚度和化学组分,而且淀积的薄膜具有很好的均匀性和保形性。应考虑采用复合叠层的办法来实现,比如HfO2/Al2O3等。(a) Al 2 O 3 , HfO 2 , TiO 2 and other dielectric materials were prepared by atomic layer deposition (ALD). The film grown by ALD is self-limiting, can precisely control the thickness and chemical composition of the film, and the deposited film has good uniformity and shape retention. It should be considered to realize the method of composite lamination, such as HfO 2 /Al 2 O 3 and so on.
(b)采用MOCVD设备制备Ga2O3、Al2O3、AlGaO或AlGaO/Al2O3等各种单层、混合层以及各种叠层结构,以制备高性能绝缘栅介质。采用MOCVD方法具有介质材料成膜状态致密、厚度控制精准、易于形成混合膜和多层膜重复性好等优点,特别是对界面态控制的可控空间较大。(b) Using MOCVD equipment to prepare Ga 2 O 3 , Al 2 O 3 , AlGaO or AlGaO/Al 2 O 3 various single layers, mixed layers and various stacked structures to prepare high-performance insulating gate dielectrics. The MOCVD method has the advantages of dense film-forming state of dielectric materials, precise thickness control, easy formation of mixed films and good repeatability of multi-layer films, especially the large controllable space for interface state control.
本发明的制造工艺流程如图3-图7所示,主要包括:The manufacturing process flow of the present invention is shown in Fig. 3-Fig. 7, mainly comprises:
图3为具有异质结结构的外延片,图4生长肖特基源极金属和肖特基漏极金属,图5和图6为刻蚀绝缘栅浅凹槽并生长绝缘栅介质,图7生长绝缘栅极金属。Figure 3 is an epitaxial wafer with a heterojunction structure, Figure 4 grows Schottky source metal and Schottky drain metal, Figure 5 and Figure 6 are etching shallow grooves of the insulating gate and growing insulating gate dielectric, Figure 7 Grow insulating gate metal.
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