CN106919404B - PCIE double-control server system and method for automatically configuring parameters thereof - Google Patents
PCIE double-control server system and method for automatically configuring parameters thereof Download PDFInfo
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- CN106919404B CN106919404B CN201710258576.1A CN201710258576A CN106919404B CN 106919404 B CN106919404 B CN 106919404B CN 201710258576 A CN201710258576 A CN 201710258576A CN 106919404 B CN106919404 B CN 106919404B
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- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/44—Arrangements for executing specific programs
- G06F9/4401—Bootstrapping
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- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/30—Monitoring
- G06F11/32—Monitoring with visual or acoustical indication of the functioning of the machine
- G06F11/324—Display of status information
- G06F11/325—Display of status information by lamps or LED's
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
- Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management
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Abstract
The invention provides a PCIE double-control server system and a method for automatically configuring parameters, wherein the system comprises a controller main board A, a controller main board B and a back board, GPIO1 on PCH of the controller main board A and the controller main board B are respectively grounded through a first resistor R and a second resistor R, and GPIO1 of the controller main board A and the controller main board B are connected to contacts of the respective main boards; the side A of the backboard is connected to the contact of the backboard through a first indicator light; and the second power supply is connected with the input end of the second indicator lamp, and the output end of the second indicator lamp is connected to the contact of the backboard through the input end of the NOT gate. According to the technical scheme, the PCIE NTB link parameters are automatically set through the cooperation of the BIOS and the hardware, and after the controller main board is replaced or the BIOS is restored to the default value, no professional is required to manually set the link parameters, so that the method is simple and convenient.
Description
Technical Field
The invention belongs to the technical field of servers, and particularly relates to a PCIE dual-control server system and a method for automatically configuring parameters thereof.
Background
In the field of storage servers, the dual-control is that the disk array is controlled by two controller mainboards, which are redundant, each controller mainboard manages respective logic volumes at ordinary times, and once the other controller is found to be faulty or offline, all logic volumes are automatically taken over, the current task is not influenced, and the high reliability of the system is ensured. Based on the PCIE connected dual-control platform, in the NTB/NTB mode, link parameters must be configured in the BIOS stage, the NTB of one controller mainboard is set to be USD/DSP, the NTB of the other controller mainboard is set to be DSD/USP, and the link parameter setting is exactly the precondition that the dual-control platform can be correctly connected without conflict, and the setting work needs a professional to enter a BIOS setting interface for manual setting.
While current manual settings can accomplish this function, there are a number of drawbacks. Firstly, the requirement on operators is high, and the setting method of the BIOS needs to be mastered; secondly, the setting work is only needed to be carried out when the double-control platform is built for the first time, and the operation frequency is low; in daily work, when one controller main board breaks down and needs to be replaced by a new controller main board, an operator easily ignores the setting work, so that the connection cannot be realized. Thirdly, when a controller main board fails and needs to be replaced with a new one, or when the BIOS default value is restored for some reason, if the operator does not know the link parameters of the opposite controller main board NTB, there is no way to set the link parameters of the opposite controller main board NTB, and the opposite controller main board comprehensively takes over the work and can not stop to check the NTB link parameters, so that trouble is caused.
Disclosure of Invention
Aiming at the technical problems, the invention discloses a PCIE dual-control server system and an automatic parameter configuration method thereof, which effectively solve the defects of manually setting PCIE NTB link parameters in an NTB-NTB mode, and avoid the problem that links of two controller mainboards are not communicated due to parameter setting errors because professionals are not needed to manually set the link parameters after a controller mainboard or BIOS is replaced to a default value.
In this regard, the invention adopts the following technical scheme:
the PCIE double-control server system comprises a controller main board A, a controller main board B and a back board, and further comprises a first resistor R, a second resistor R, a first power supply, a second power supply, a first indicator light, a second indicator light and a NOT gate, wherein GPIO1 on PCH of the controller main board A and the controller main board B are respectively grounded through the first resistor R and the second resistor R, and GPIO1 of the controller main board A and the controller main board B are connected to contacts of the respective main boards; the A side of the backboard is connected with the input end of the first power supply and the first indicator lamp, and the output end of the first indicator lamp is connected to the contact of the backboard; and the B side of the backboard, the second power supply is connected with the input end of the second indicator lamp, the output end of the second indicator lamp is connected with the input end of the NOT gate, and the output end of the NOT gate is connected to the contact of the backboard. Wherein, first pilot lamp, second pilot lamp are GPIO pilot lamp. The controller main board A and the controller main board B are respectively provided with a main board contact electrically connected with a back board, and the back board is provided with a back board contact electrically connected with the main board. The side A and the side B of the backboard respectively correspond to the insertion areas of the controller main board A and the controller main board B. The controller main board A and the controller main board B are identical and can exchange positions.
By adopting the technical scheme, when the double-control system is built, the controller main board A is inserted into the backboard, the backboard supplies power to the main board A, the first indicator light is on or off to indicate whether the main board GPIO signal is in good contact with the backboard, the operation is completed on the main board A, and the controller main board B is operated by the same method. The NTB communication between the controller mainboard A and the controller mainboard B is completed through the backboard, and after the controller mainboard A and the controller mainboard B are successfully linked, the NTB-NTB function can be performed. According to the technical scheme, the GPIO indicator lamp is used for indicating the connection condition of GPIO and displaying the connection state of the main board and the backboard, so that the effectiveness of GPIO signals between the main board and the backboard is ensured.
As a further improvement of the invention, the first power supply and the second power supply are 3.3V.
As a further improvement of the invention, the first indicator light and the second indicator light are light-emitting diodes.
As a further improvement of the present invention, the PCIE dual-control server system performs automatic configuration parameters of the NTB-NTB mode by adopting the following steps, including the following steps:
step S1, after a controller main board A or a controller main board B is inserted into a backboard, checking whether an indicator lamp is lighted, and if not, re-plugging the main board until the indicator lamp is lighted;
step S2, starting a BIOS program, initializing a GPIO function by the BIOS program, setting GPIO1 as an input function, reading PCIE port mode selection from a BIOS setting interface, setting the PCIE port mode according to a read value, and judging whether the mode is an NTB-NTB mode or not; ending the operation if not the NTB-NTB mode; if the mode is the NTB-NTB mode, the BIOS program initializes the NTB device, allocates resources, then reads the PPD register of the NTB device, puts the register value into a temporary storage area, and carries out the content of the step S3;
step S3, the BIOS program reads the input state of the GPIO1 again, judges whether the input of the GPIO1 is high level or low level, and if the input of the GPIO1 is low level, sets the PPD cross link part as a USD/DSP; if the input is high level, setting the PPD cross link part as DSD/USP, storing the value of USD/DSP or DSD/USP into a temporary storage area, and writing the value of the temporary storage area back into a PPD register to carry out the content of the step S4;
step S4: the BIOS program continues to configure other parameters of the NTB device, completes the NTB parameter configuration, and waits for linking.
By adopting the technical scheme, through the cooperation of the BIOS and hardware, the PCIE NTB link parameters are automatically set, and after the controller main board is replaced or the BIOS is restored to the default value, no professional is required to manually set the link parameters, so that the method is simple and convenient, and the problem that the links of the two controller main boards are not communicated due to parameter setting errors is completely avoided.
The invention also discloses a method for automatically configuring parameters of the PCIE double-control server system, which comprises the following steps:
step S1, after a main board is inserted into a backboard, checking whether an indicator lamp is lighted, and if not, re-plugging the main board until the indicator lamp is lighted;
s2, parameter automatic configuration is carried out; the BIOS program of the main board reads PCIE port mode selection through the input signal of the GPIO so as to judge whether the setting type of the link parameter is NTB-NTB mode;
ending the operation if not the NTB-NTB mode; if the mode is the NTB-NTB mode, the BIOS program initializes the NTB device, allocates resources, then reads the PPD register of the NTB device, puts the register value into a temporary storage area, and carries out the content of the step S3;
step S3, the BIOS program reads the input state of the GPIO1 again, judges whether the input of the GPIO1 is high level or low level, sets a PPD cross link part, stores the value of the set PPD cross link part into a temporary storage area, and writes the value of the temporary storage area back into a PPD register to carry out the content of the step S4;
step S4: the BIOS program continues to configure other parameters of the NTB device, completes the NTB parameter configuration, and waits for linking.
In step S2, the BIOS program initializes the GPIO function, sets the GPIO1 as an input function, reads PCIE port mode selection from the BIOS setting interface, sets the PCIE port mode according to the read value, and then determines whether the GPIO is in the NTB-NTB mode.
As a further improvement of the present invention, in step S3, if the input of GPIO1 is low, the PPD cross section is set to USD/DSP; if the input is high, the PPD cross section is set as DSD/USP, the values of USD/DSP or DSD/USP are stored in the temporary storage area, and then the values of the temporary storage area are written back into the PPD register, and the content of the step S4 is carried out.
Compared with the prior art, the invention has the beneficial effects that:
by adopting the technical scheme of the invention, the BIOS program on the main board inserted into the backboard judges the setting type of the link parameter through the input signal of the hardware GPIO, and simultaneously, the GPIO indicator lamp is used for indicating the connection condition of the GPIO, thereby ensuring the validity of the GPIO signal between the main board and the backboard. Through the cooperation of BIOS program and hardware, link parameter setting between NTB and the NTB can not appear wrong, does not receive the change mainboard, does not receive the restriction of BIOS recovery default, and is also very low to operating personnel's technical requirement, convenient and fast.
Drawings
Fig. 1 is a schematic diagram of a connection structure of a PCIE dual-control server system according to the present invention.
Fig. 2 is a schematic diagram of a new circuit of a PCIE dual-control server system according to the present invention.
Fig. 3 is a flowchart of an automatic configuration parameter of an NTB-NTB mode of a PCIE dual-control server system according to the present invention.
Detailed Description
Preferred embodiments of the present invention are described in further detail below.
As shown in fig. 1 and fig. 2, a PCIE dual-control server system includes a controller motherboard a, a controller motherboard B, and a back board, where the PCIE dual-control server system further includes a first resistor R, a second resistor R, a first power supply, a second power supply, a GPIO indicator A, GPIO indicator B, and a not gate, GPIO1 on a PCH of the controller motherboard a is grounded through the first resistor R, and GPIO1 on a PCH of the controller motherboard B is grounded through the second resistor R; and GPIO1 of the controller main board A and the controller main board B are connected to contacts of the respective main boards and the back board. The first power supply is connected with the input end of the GPIO indicator lamp A, and the output end of the GPIO indicator lamp A is connected to the contact of the backboard; and the second power supply is connected with the input end of the GPIO indicator lamp B, the output end of the GPIO indicator lamp B is connected with the input end of the NOT gate, and the output end of the NOT gate is connected to the contact of the backboard. The first power supply and the second power supply are both 3.3V power supplies, and the GPIO indicator A, GPIO indicator B is a light emitting diode.
When the controller main board A is not inserted into the backboard, or is inserted into the backboard to be electrified and started, but the contact between the main board contact and the backboard contact is bad, the GPIO indicator lamp A on the backboard is in an open circuit state and is not lightened, the GPIO1 is connected with the ground through the resistor R, and the input of the GPIO1 is in a low level; when the controller main board A is inserted into the side of the backboard A, the main board A is electrified and started, and when the main board contact and the backboard contact are well connected, the output end of the GPIO indicator lamp A is connected to the ground through the resistor R, and at the moment, the GPIO indicator lamp A is turned on. The resistor R is grounded on one side, the other side is at a high level, and the GPIO1 input level and the R side level are identical and at a high level.
As in the case of the controller motherboard a, when the controller motherboard B is not inserted into the back plate, or is already inserted into the back plate to be electrically started, but the contact between the motherboard contact and the back plate contact is poor, the light emitting diode on the back plate is in an off state and is not bright, the GPIO1 is connected with the ground through the resistor R, and the input is low level; when the controller main board B is inserted into the side of the backboard B, the main board B is electrified and started, when the main board contact and the backboard contact are well connected, the output end of the light-emitting diode is connected to the ground through the NOT gate and the resistor R, and the light-emitting diode is lightened when the controller main board B is connected to the passageway. The input end of the NOT gate is high level, the output end is low level, one side of the resistor R is grounded, the other side of the resistor R is connected with the output end of the NOT gate and is low level, and therefore the input level of the GPIO1 is low level. In the technical scheme, the position of the GPIO indicator lamp can be flexibly set, and the GPIO indicator lamp can be placed at a position convenient for a user to watch.
As shown in fig. 3, the PCIE dual-control server system performs automatic configuration parameters of the NTB-NTB mode using the following steps, which include the following steps,
step S1, after a controller main board A or a controller main board B is inserted into a backboard, checking whether a GPIO indicator lamp on the backboard is lighted, and if not, unplugging the main board again until the GPIO indicator lamp is lighted;
step S2, starting a BIOS program of the main board, initializing a GPIO function by the BIOS program, setting GPIO1 as an input function, reading PCIE port mode selection from a BIOS setting interface, setting the PCIE port mode according to a read value, and judging whether the mode is an NTB-NTB mode or not; ending the operation if not the NTB-NTB mode; if the mode is the NTB-NTB mode, the BIOS program initializes the NTB device, allocates resources, then reads the PPD register of the NTB device, puts the register value into a temporary storage area, and carries out the content of the step S3;
step S3, the BIOS program reads the input state of the GPIO1 again, judges whether the input of the GPIO1 is high level or low level, and if the input of the GPIO1 is low level, sets the PPD cross link part as a USD/DSP; if the input is high level, setting the PPD cross link part as DSD/USP, storing the value of USD/DSP or DSD/USP into a temporary storage area, and writing the value of the temporary storage area back into a PPD register to carry out the content of the step S4;
step S4: the BIOS program continues to configure other parameters of the NTB device, completes the NTB parameter configuration, and waits for linking.
Through the cooperation of BIOS program and hardware, and carry out parameter automatic configuration through above-mentioned step, link parameter setting between NTB and the NTB can not appear the mistake like this, does not receive the mainboard of changing, does not receive the restriction of BIOS recovery default, and is also very low to operating personnel's technical requirement, convenient and fast.
The foregoing is a further detailed description of the invention in connection with the preferred embodiments, and it is not intended that the invention be limited to the specific embodiments described. It will be apparent to those skilled in the art that several simple deductions or substitutions may be made without departing from the spirit of the invention, and these should be considered to be within the scope of the invention.
Claims (5)
1. The PCIE double-control server system comprises a controller main board A, a controller main board B and a back board, and is characterized in that: the PCIE double-control server system comprises a first resistor R, a second resistor R, a first power supply, a second power supply, a first indicator light, a second indicator light and an NOT gate, wherein GPIO1 on PCH of a controller main board A and a controller main board B are respectively grounded through the first resistor R and the second resistor R, and GPIO1 of the controller main board A and the controller main board B are connected to contacts of the respective main boards; the A side of the backboard is connected with the input end of the first power supply and the first indicator lamp, and the output end of the first indicator lamp is connected to the contact of the backboard; the second power supply is connected with the input end of a second indicator lamp, the output end of the second indicator lamp is connected with the input end of a NOT gate, and the output end of the NOT gate is connected to a contact of the backboard;
the PCIE double-control server system automatically configures parameters according to the following steps:
step S1, after a main board is inserted into a backboard, checking whether an indicator lamp is lighted, and if not, re-plugging the main board until the indicator lamp is lighted;
s2, parameter automatic configuration is carried out; the BIOS program reads PCIE port mode selection through the input signal of the GPIO so as to judge whether the mode is an NTB-NTB mode;
ending the operation if not the NTB-NTB mode; if the mode is the NTB-NTB mode, the BIOS program initializes the NTB device, allocates resources, then reads the PPD register of the NTB device, puts the register value into a temporary storage area, and carries out the content of the step S3;
step S3, the BIOS program reads the input state of the GPIO1 again, judges whether the input of the GPIO1 is high level or low level, sets a PPD cross link part, stores the set value of the PPD cross link part into a temporary storage area, and writes the value of the temporary storage area back into a PPD register to carry out the content of the step S4;
step S4: the BIOS program continues to configure other parameters of the NTB device, completes the NTB parameter configuration, and waits for linking.
2. The PCIE dual-control server system of claim 1 wherein: the first power supply and the second power supply are 3.3V; the first indicator light and the second indicator light are light-emitting diodes.
3. The method for automatically configuring parameters of the PCIE double-control server system is characterized by comprising the following steps:
step S1, after a main board is inserted into a backboard, checking whether an indicator lamp is lighted, and if not, re-plugging the main board until the indicator lamp is lighted;
s2, parameter automatic configuration is carried out; the BIOS program reads PCIE port mode selection through the input signal of the GPIO so as to judge whether the mode is an NTB-NTB mode;
ending the operation if not the NTB-NTB mode; if the mode is the NTB-NTB mode, the BIOS program initializes the NTB device, allocates resources, then reads the PPD register of the NTB device, puts the register value into a temporary storage area, and carries out the content of the step S3;
step S3, the BIOS program reads the input state of the GPIO1 again, judges whether the input of the GPIO1 is high level or low level, sets a PPD cross link part, stores the set value of the PPD cross link part into a temporary storage area, and writes the value of the temporary storage area back into a PPD register to carry out the content of the step S4;
step S4: the BIOS program continues to configure other parameters of the NTB device, completes the NTB parameter configuration, and waits for linking.
4. The method for automatically configuring parameters of a PCIE dual-control server system according to claim 3 wherein: in step S2, the BIOS program initializes the GPIO function, sets the GPIO1 as an input function, reads PCIE port mode selection from the BIOS setting interface, sets the PCIE port mode according to the read value, and then determines whether the GPIO is in the NTB-NTB mode.
5. The method for automatically configuring parameters of a PCIE dual-control server system according to claim 4 wherein: in step S3, if the input of GPIO1 is low level, setting the PPD cross link part as USD/DSP; if the input is high, the PPD cross section is set as DSD/USP, the values of USD/DSP or DSD/USP are stored in the temporary storage area, and then the values of the temporary storage area are written back into the PPD register, and the content of the step S4 is carried out.
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| CN107703387A (en) * | 2017-09-27 | 2018-02-16 | 郑州云海信息技术有限公司 | A kind of system for showing node error message |
| CN109614356B (en) * | 2018-12-10 | 2023-02-28 | 浪潮(北京)电子信息产业有限公司 | Double-control system communication device |
| TWI718618B (en) * | 2019-08-12 | 2021-02-11 | 英業達股份有限公司 | Bios and method for automatically configuring pcie slot |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN201302715Y (en) * | 2008-11-11 | 2009-09-02 | 英业达科技有限公司 | Device for computers |
| CN206975628U (en) * | 2017-04-19 | 2018-02-06 | 深圳市同泰怡信息技术有限公司 | A kind of PCIE dual controls server system |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN201302715Y (en) * | 2008-11-11 | 2009-09-02 | 英业达科技有限公司 | Device for computers |
| CN206975628U (en) * | 2017-04-19 | 2018-02-06 | 深圳市同泰怡信息技术有限公司 | A kind of PCIE dual controls server system |
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