CN106876872A - Preparation method of Ge-based reconfigurable dipole antenna based on AlAs/Ge/AlAs structure - Google Patents

Abstract

The invention relates to a method for preparing a Ge-based reconfigurable dipole antenna based on an AlAs/Ge/AlAs structure, wherein the reconfigurable dipole antenna includes: a GeOI substrate, a first antenna arm, a second Antenna arm, coaxial feeder and DC bias line; the preparation method includes: selecting a GeOI substrate; making a Ge-based SPiN diode of AlAs/Ge/AlAs structure on the GeOI substrate; The Ge-based SPiN diodes of the Ge/AlAs structure are connected end-to-end in turn to form an SPiN diode string; the first antenna arm and the second antenna arm are fabricated from a plurality of the SPiN diode strings; the DC bias is fabricated on the GeOI substrate line; make a coaxial feeder on the first antenna arm and the second antenna arm to form the reconfigurable dipole antenna, the reconfigurable dipole antenna prepared by the present invention, through the metal DC bias line Control the conduction of the SPiN diode to form an adjustable length of the plasma antenna arm, so as to realize the reconfigurable antenna operating frequency, which has the characteristics of easy integration, stealth, and fast frequency jump.

Description

Preparation method of Ge-based reconfigurable dipole antenna based on AlAs/Ge/AlAs structure

technical field

The invention belongs to the technical field of semiconductors, and in particular relates to a preparation method of a Ge-based reconfigurable dipole antenna based on an AlAs/Ge/AlAs structure.

Background technique

Today, with the rapid development of antenna technology, the development trend of the new generation of wireless communication systems includes the realization of high-speed data transmission, the interconnection of multiple wireless systems, the effective use of limited spectrum resources, and the ability to adapt to the surrounding environment. . The concept of reconfigurable antennas has been paid attention to and developed in order to break through the fact that the fixed performance of traditional antennas is difficult to meet diverse system requirements and complex and changeable application environments. Reconfigurable microstrip antennas have become a hotspot in the research of reconfigurable antennas because of their small size and low profile.

With the development of wireless systems in the direction of large-capacity, multi-function, multi-band/ultra-broadband, and the integration of different communication systems, the number of information subsystems carried on the same platform has increased, and the number of antennas has also increased accordingly. However, the increase in the number of antennas It has a relatively large negative impact on the electromagnetic compatibility, cost, weight, etc. of the communication system. Therefore, the wireless communication system requires the antenna to change its electrical characteristics according to the actual use environment, that is, to realize "reconfigurable" antenna characteristics. The reconfigurable antenna has the function of multiple antennas, reducing the number of antennas in the system. Among them, the reconfigurable microstrip antenna has attracted the attention of the reconfigurable antenna research field because of its small size and low profile.

The various parts of the current frequency reconfigurable microstrip antenna have mutual coupling effects, slow frequency hopping, complex feed structure, poor stealth performance, high profile, and high difficulty in integrated processing.

Contents of the invention

In order to solve the above-mentioned problems in the prior art, the present invention provides a method for preparing a Ge-based reconfigurable dipole antenna based on an AlAs/Ge/AlAs structure. The technical problem to be solved in the present invention is realized through the following technical solutions:

An embodiment of the present invention provides a method for preparing a Ge-based reconfigurable dipole antenna based on an AlAs/Ge/AlAs structure, wherein the reconfigurable dipole antenna includes: a GeOI substrate, a first antenna arm, second antenna arm, coaxial feeder and DC bias line; the preparation method includes:

Select GeOI substrate;

making a Ge-based SPiN diode of AlAs/Ge/AlAs structure on the GeOI substrate;

A plurality of Ge-based SPiN diodes of the AlAs/Ge/AlAs structure are sequentially connected end-to-end to form an SPiN diode string;

fabricating the first antenna arm and the second antenna arm from a plurality of the SPiN diode strings;

Fabricating the DC bias line on the GeOI substrate; fabricating a coaxial feeder line on the first antenna arm and the second antenna arm to form the reconfigurable dipole antenna.

In one embodiment of the present invention, the Ge-based SPiN diode of AlAs/Ge/AlAs structure is made on described GeOI substrate, comprises:

(a) selecting a GeOI substrate, and setting an isolation region in the GeOI substrate;

(b) etching the GeOI substrate to form a P-type trench and an N-type trench;

(c) oxidizing the P-type trench and the N-type trench to form an oxide layer on the inner walls of the P-type trench and the N-type trench;

(d) etching the oxide layer on the inner wall of the P-type trench and the N-type trench by a wet etching process to complete the planarization of the inner wall of the P-type trench and the N-type trench;

(e) Deposit AlAs material in the P-type trench and the N-type trench, and carry out ion implantation to the AlAs material in the P-type trench and the N-type trench to form a P-type active area and N-type active area;

(f) generating _SiO2 material on the entire substrate surface; using an annealing process to activate impurities in the P-type active region and the N-type active region;

(g) forming leads on the surface of the P-type active region and the N-type active region to complete the preparation of the AlAs/Ge/AlAs-based plasma pin diode.

Wherein, step (a) comprises:

(a1) forming a first protective layer on the surface of the GeOI substrate;

(a2) forming a first isolation region pattern on the first protective layer by using a photolithography process;

(a3) using a dry etching process, etching the first protective layer and the GeOI substrate at a designated position of the first isolation region pattern to form isolation grooves, and the depth of the isolation grooves is greater than or equal to The thickness of the top layer Ge of the GeOI substrate;

(a4) Filling the isolation trench to form the isolation region.

On the basis of above-mentioned embodiment, step (b) comprises:

(b1) forming a second protective layer on the surface of the GeOI substrate;

(b2) forming a second isolation region pattern on the second protective layer by using a photolithography process;

(b3) etching the second protective layer and the top layer Ge layer of the GeOI substrate at the designated position of the second isolation region pattern by a dry etching process to form the top layer Ge layer in the top layer Ge layer. P-type trenches and the N-type trenches.

Wherein, step (e) comprises:

(e1) Depositing an AlAs material in the P-type trench and the N-type trench and on the entire substrate surface by using an MOCVD process;

(e2) using a CMP process to planarize the GeOI substrate, and then forming an AlAs layer on the GeOI substrate;

(e3) photoetching the AlAs layer, and implanting P-type impurities and N-type impurities into the positions of the P-type trench and the N-type trench by using glued ion implantation to form the P-type active region forming a P-type contact region and an N-type contact region simultaneously with the N-type active region;

(e4) removing photoresist;

(e5) Using wet etching to remove the AlAs material other than the P-type contact region and the N-type contact region.

Wherein, step (g) comprises:

(g1) using an anisotropic etching process to etch away the _SiO2 material at the specified position on the surface of the P-type contact region and the N-type contact region to form the lead hole;

(g2) Depositing metal material into the lead hole, passivating the entire substrate material and photoetching the PAD to form the Ge-based SPiN diode with the AlAs/Ge/AlAs structure.

In one embodiment of the present invention, the DC bias line includes a first DC bias line (5), a second DC bias line (6), a third DC bias line (7), a fourth DC bias line The bias line (8), the fifth DC bias line (9), the sixth DC bias line (10), the seventh DC bias line (11), the eighth DC bias line (12), the DC The bias line is fixed on the GeOI substrate (1) by chemical vapor deposition.

In one embodiment of the present invention, it is characterized in that,

The first antenna arm (2) and the second antenna arm (3) are respectively arranged on both sides of the coaxial feeder (4), and the first antenna arm (2) includes first SPiN diodes connected in series string (w1), a second SPiN diode string (w2) and a third SPiN diode string (w3), and the second antenna arm (3) includes a fourth SPiN diode string (w4) and a fifth SPiN diode string connected in series in sequence a string (w5) and a sixth SPiN diode string (w6);

Wherein, the length of the first SPiN diode string (w1) is equal to the length of the sixth SPiN diode string (w6), and the length of the second SPiN diode string (w2) is equal to the fifth SPiN diode string (w5 ), the length of the third SPiN diode string (w3) is equal to the length of the fourth SPiN diode string (w4); the first antenna arm (2) and the second antenna arm (3) The length is a quarter of the wavelength of the electromagnetic wave it receives or transmits.

In one embodiment of the present invention, the SPiN diode in the SPiN diode string includes a P+ region (27), an N+ region (26) and an intrinsic region (22), and also includes a first metal contact region (23) and The second metal contact area (24); wherein,

The first metal contact area (23) is electrically connected to the P+ area (27) and the anode of the DC bias voltage respectively, and the second metal contact area (24) is electrically connected to the N+ area (26) respectively. and the negative electrode of the DC bias voltage, so that all the SPiN diodes of the corresponding SPiN diode string are in a forward conduction state after the DC bias voltage is applied.

In one embodiment of the present invention, the inner core wire of the coaxial feeder (4) is welded to the metal sheet of the first antenna arm (2), and the metal sheet of the first antenna arm (2) is connected to the DC The bias line (5) is connected; the shielding layer of the coaxial feeder (4) is welded to the metal sheet of the second antenna arm (3), and the metal sheet of the second antenna arm (3) is connected to the second DC The bias line (6) is connected; the first DC bias line (5) and the second DC bias line (6) are both connected to the negative pole of the DC bias voltage to form a common negative pole;

The first DC bias line group (7, 12) is formed by the third DC bias line (7) and the eighth DC bias line (12), and the fourth DC bias line (8) and the seventh DC bias line The line (11) forms the second DC bias line group (8, 11), and the fifth DC bias line (9) and the sixth DC bias line (10) form the third DC bias line group (9, 10), select only the first DC bias line group (7, 12), the second DC bias line group (8, 11) and the third DC bias line group ( 9, 10), one group is connected with the anode of the DC bias voltage, so that the diode strings of different lengths are in a conduction state, and the diodes produce a solid state with metal-like properties in the intrinsic region (22). Plasma is used in the radiation structure of the antenna to form antenna arms of different lengths to achieve reconfigurable antenna operating frequency.

Compared with prior art, the beneficial effect of the present invention:

The Ge-based reconfigurable dipole antenna of the AlAs/Ge/AlAs structure prepared by the present invention has small volume, low profile, simple structure, easy processing, no complicated feed source structure, rapid frequency jump, and the antenna will be turned off when the antenna is closed. In the state of electromagnetic wave stealth, it can be used in various frequency hopping stations or equipment; because all its components are on the side of the semiconductor substrate, it is a planar structure, easy to form an array, and can be used as the basic component of a phased array antenna.

Description of drawings

FIG. 1 is a schematic structural diagram of a Ge-based reconfigurable dipole antenna with an AlAs/Ge/AlAs structure provided by an embodiment of the present invention;

2 is a schematic diagram of a method for preparing a Ge-based reconfigurable dipole antenna with an AlAs/Ge/AlAs structure provided by an embodiment of the present invention;

Fig. 3 is the schematic diagram of the preparation method of a kind of SPiN diode provided by the embodiment of the present invention;

4a-4r are schematic diagrams of a method for preparing a Ge-based SPiN diode with an AlAs/Ge/AlAs structure according to an embodiment of the present invention;

FIG. 5 is a schematic structural diagram of a Ge-based SPiN diode with an AlAs/Ge/AlAs structure provided by an embodiment of the present invention;

FIG. 6 is a schematic structural diagram of a Ge-based SPiN diode string with an AlAs/Ge/AlAs structure provided by an embodiment of the present invention.

detailed description

The present invention will be described in further detail below in conjunction with specific examples, but the embodiments of the present invention are not limited thereto.

Embodiment one

Please refer to Fig. 1. Fig. 1 is a structural diagram of a Ge-based reconfigurable dipole antenna based on an AlAs/Ge/AlAs structure provided by an embodiment of the present invention, wherein the reconfigurable dipole antenna includes: GeOI Substrate, first antenna arm, second antenna arm, coaxial feeder and DC bias line; please refer to Figure 2, Figure 2 is the preparation of the Ge-based reconfigurable dipole antenna based on the AlAs/Ge/AlAs structure Method flow chart:

Select GeOI substrate;

making a Ge-based SPiN diode of AlAs/Ge/AlAs structure on the GeOI substrate;

A plurality of Ge-based SPiN diodes of the AlAs/Ge/AlAs structure are sequentially connected end-to-end to form an SPiN diode string;

fabricating the first antenna arm and the second antenna arm from a plurality of the SPiN diode strings;

Fabricating the DC bias line on the GeOI substrate; fabricating a coaxial feeder line on the first antenna arm and the second antenna arm to form the reconfigurable dipole antenna.

Please refer to Fig. 3, Fig. 3 is the flow chart of the Ge-based SPiN diode preparation method of making AlAs/Ge/AlAs structure on the GeOI substrate: including:

(a) selecting a GeOI substrate, and setting an isolation region in the GeOI substrate;

(b) etching the GeOI substrate to form a P-type trench and an N-type trench;

(c) oxidizing the P-type trench and the N-type trench to form an oxide layer on the inner walls of the P-type trench and the N-type trench;

(d) etching the oxide layer on the inner wall of the P-type trench and the N-type trench by a wet etching process to complete the planarization of the inner wall of the P-type trench and the N-type trench;

(e) Deposit AlAs material in the P-type trench and the N-type trench, and carry out ion implantation to the AlAs material in the P-type trench and the N-type trench to form a P-type active area and N-type active area;

(f) generating _SiO2 material on the entire substrate surface; using an annealing process to activate impurities in the P-type active region and the N-type active region;

(g) forming leads on the surface of the P-type active region and the N-type active region to complete the preparation of the AlAs/Ge/AlAs-based plasma pin diode.

Among them, for step (a), the reason for using the GeOI substrate is that the solid-state plasma antenna needs good microwave characteristics, and the solid-state plasma pin diode needs to have good isolation characteristics and carriers that are solid state in order to meet this requirement. Plasma confinement ability, and GeOI substrate is preferably used because it has a pin isolation region that can be easily formed with the isolation groove, and silicon dioxide (SiO ₂ ) can also confine carriers, that is, solid-state plasma, in the top layer Ge. GeOI is used as a substrate for solid-state plasmonic pin diodes. Moreover, since the carrier mobility of the germanium material is relatively large, a relatively high plasma concentration can be formed in the I region, thereby improving the performance of the device.

In one embodiment of the invention, step (a) includes:

(a1) forming a first protective layer on the surface of the GeOI substrate;

(a2) forming a first isolation region pattern on the first protective layer by using a photolithography process;

(a3) using a dry etching process, etching the first protective layer and the GeOI substrate at a designated position of the first isolation region pattern to form isolation grooves, and the depth of the isolation grooves is greater than or equal to The thickness of the top layer Ge of the GeOI substrate;

(a4) Filling the isolation trench to form the isolation region.

Specifically, the first protective layer includes a first silicon dioxide (SiO ₂ ) layer and a first silicon nitride (SiN) layer; then the formation of the first protective layer includes: generating silicon dioxide (SiO ₂ ) to form a first silicon dioxide (SiO ₂ ) layer; generating silicon nitride (SiN) on the surface of the first silicon dioxide (SiO ₂ ) layer to form a first silicon nitride (SiN) layer. The advantage of doing this is that the stress of silicon nitride (SiN) is isolated by using the loose characteristics of silicon dioxide (SiO ₂ ), so that it cannot be conducted into the top layer Ge, which ensures the stability of the performance of the top layer Ge; based on silicon nitride (SiN) SiN) and Ge have a high selectivity ratio during dry etching, and silicon nitride (SiN) is used as a masking film for dry etching, which is easy to process. Of course, it can be understood that the number of layers of the protective layer and the material of the protective layer are not limited here, as long as the protective layer can be formed.

Wherein, the depth of the isolation groove is greater than or equal to the thickness of the top Ge layer, which ensures the connection of silicon dioxide (SiO ₂ ) and the oxide layer of the GeOI substrate in the subsequent groove, forming a complete insulation isolation.

In one embodiment of the invention, step (b) includes:

(b1) forming a second protective layer on the surface of the GeOI substrate;

(b2) forming a second isolation region pattern on the second protective layer by using a photolithography process;

(b3) etching the second protective layer and the top layer Ge layer of the GeOI substrate at the designated position of the second isolation region pattern by a dry etching process to form the top layer Ge layer in the top layer Ge layer. P-type trenches and the N-type trenches.

Specifically, the second protective layer includes a second silicon dioxide (SiO ₂ ) layer and a second silicon nitride (SiN) layer; then the formation of the second protective layer includes: generating silicon dioxide (SiO ₂ ) to form a second silicon dioxide (SiO ₂ ) layer; generating silicon nitride (SiN) on the surface of the second silicon dioxide (SiO ₂ ) layer to form a second silicon nitride (SiN) layer. The benefits of doing this are similar to the role of the first protective layer, so I won't repeat them here.

Wherein, the depths of the P-type trench and the N-type trench are greater than the thickness of the second protection layer and less than the sum of the thickness of the second protection layer and the top Ge layer of the GeOI substrate. Preferably, the distance between the bottom of the P-type trench and the bottom of the N-type trench is 0.5 micron to 30 micron from the bottom of the top layer Ge of the GeOI substrate, forming a generally considered deep trench, so that when forming the P-type and N-type active regions When the impurity distribution is uniform, the P and N regions with high doping concentration and the steep Pi-Ni junction can be formed to facilitate the increase of the plasma concentration in the i region.

In one embodiment of the invention, step (e) includes:

(e1) Depositing an AlAs material in the P-type trench and the N-type trench and on the entire substrate surface by using an MOCVD process;

(e2) using a CMP process to planarize the GeOI substrate, and then forming an AlAs layer on the GeOI substrate;

(e3) photoetching the AlAs layer, and implanting P-type impurities and N-type impurities into the positions of the P-type trench and the N-type trench by using glued ion implantation to form the P-type active region forming a P-type contact region and an N-type contact region simultaneously with the N-type active region;

(e4) removing photoresist;

(e5) Using wet etching to remove the AlAs material other than the P-type contact region and the N-type contact region.

In one embodiment of the invention, step (g) comprises:

(g1) using an anisotropic etching process to etch away the _SiO2 material at the specified position on the surface of the P-type contact region and the N-type contact region to form the lead hole;

(g2) Depositing metal material into the lead hole, passivating the entire substrate material and photoetching the PAD to form the Ge-based SPiN diode with the AlAs/Ge/AlAs structure.

In one embodiment of the present invention, the DC bias line includes a first DC bias line (5), a second DC bias line (6), a third DC bias line (7), a fourth DC bias line The bias line (8), the fifth DC bias line (9), the sixth DC bias line (10), the seventh DC bias line (11), the eighth DC bias line (12), the DC The bias line is fixed on the GeOI substrate (1) by chemical vapor deposition.

In one embodiment of the present invention, the first antenna arm (2) and the second antenna arm (3) are respectively arranged on both sides of the coaxial feeder (4), and the first antenna arm (2) It includes a first SPiN diode string (w1), a second SPiN diode string (w2) and a third SPiN diode string (w3) connected in series, and the second antenna arm (3) includes a fourth SPiN diode connected in series string (w4), fifth SPiN diode string (w5) and sixth SPiN diode string (w6);

Wherein, the length of the first SPiN diode string (w1) is equal to the length of the sixth SPiN diode string (w6), and the length of the second SPiN diode string (w2) is equal to the fifth SPiN diode string (w5 ), the length of the third SPiN diode string (w3) is equal to the length of the fourth SPiN diode string (w4); the first antenna arm (2) and the second antenna arm (3) The length is a quarter of the wavelength of the electromagnetic wave it receives or transmits.

In an embodiment of the present invention, please refer to FIG. 4 and FIG. 5 together. FIG. 4 is a schematic structural diagram of an SPiN diode provided by the present invention; FIG. 5 is a schematic structural diagram of an SPiN diode string provided by an embodiment of the present invention. The SPiN diode in the SPiN diode string includes a P+ region (27), an N+ region (26) and an intrinsic region (22), and also includes a first metal contact region (23) and a second metal contact region (24); in,

The first metal contact area (23) is electrically connected to the P+ area (27) and the anode of the DC bias voltage respectively, and the second metal contact area (24) is electrically connected to the N+ area (26) respectively. and the negative electrode of the DC bias voltage, so that all the SPiN diodes of the corresponding SPiN diode string are in a forward conduction state after the DC bias voltage is applied.

In one embodiment of the present invention, the inner core wire of the coaxial feeder (4) is welded to the metal sheet of the first antenna arm (2), and the metal sheet of the first antenna arm (2) is connected to the DC The bias line (5) is connected; the shielding layer of the coaxial feeder (4) is welded to the metal sheet of the second antenna arm (3), and the metal sheet of the second antenna arm (3) is connected to the second DC The bias line (6) is connected; the first DC bias line (5) and the second DC bias line (6) are both connected to the negative pole of the DC bias voltage to form a common negative pole;

The first DC bias line group (7, 12) is formed by the third DC bias line (7) and the eighth DC bias line (12), and the fourth DC bias line (8) and the seventh DC bias line The line (11) forms the second DC bias line group (8, 11), and the fifth DC bias line (9) and the sixth DC bias line (10) form the third DC bias line group (9, 10), select only the first DC bias line group (7, 12), the second DC bias line group (8, 11) and the third DC bias line group ( 9, 10), one group is connected with the anode of the DC bias voltage, so that the diode strings of different lengths are in a conduction state, and the diodes produce a solid state with metal-like properties in the intrinsic region (22). Plasma is used in the radiation structure of the antenna to form antenna arms of different lengths to achieve reconfigurable antenna operating frequency.

The preparation method of the Ge-based reconfigurable dipole antenna based on the AlAs/Ge/AlAs structure provided by the present invention has the following advantages:

1. Small size, low profile, simple structure and easy processing.

2. Coaxial cable is used as the feed source without complicated feed source structure.

3. The SPiN diode is used as the basic unit of the antenna, and the reconfigurable frequency can be realized only by controlling its conduction or disconnection.

4. All components are on the side of the semiconductor substrate, which is easy for plate making and processing.

Embodiment two

Please refer to Fig. 4a-Fig. 4r, Fig. 4a-Fig. 4r is a schematic diagram of the preparation method of an AlAs/Ge/AlAs structure-based plasmonic pin diode according to the embodiment of the present invention, on the basis of the above-mentioned embodiment 1, to prepare the channel An AlAs/Ge/AlAs-based plasmonic pin diode with a length of 22nm (the length of the solid-state plasma region is 100 microns) will be described in detail as an example. The specific steps are as follows:

Step 1, substrate material preparation steps:

(1a) As shown in Figure 4a, select the (100) crystal orientation, the doping type is p-type, the GeOI substrate sheet 101 with a doping concentration of 10 ¹⁴ cm ^-3 , and the thickness of the top layer Ge is 50 μm;

(1b) As shown in FIG. 4b, a first SiO layer 201 with a thickness of 40nm is deposited on the GeOI substrate by chemical vapor deposition (Chemical vapor deposition, CVD for short) _;

(1c) Depositing a first Si ₃ N ₄ /SiN layer 202 with a thickness of 2 μm on the substrate by chemical vapor deposition;

Step 2, isolation preparation steps:

(2a) As shown in FIG. 4c, an isolation region is formed on the protective layer by a photolithography process, and the first Si ₃ N ₄ /SiN layer 202 in the isolation region is wet-etched to form an isolation region pattern; dry etching is used, forming a deep isolation trench 301 with a width of 5 μm and a depth of 50 μm in the isolation region;

(2b) As shown in FIG. 4d , deposit SiO ₂ 401 by CVD to fill up the deep isolation trench;

(2c) As shown in FIG. 4e, the first Si ₃ N ₄ /SiN layer 202 and the first SiO ₂ layer 201 on the surface are removed by using a chemical mechanical polishing (CMP) method to make the surface of the GeOI substrate smooth;

Step 3, preparation steps of deep grooves in P and N regions:

(3a) As shown in FIG. 4f, adopt CVD method to continuously deposit two layers of materials on the substrate, the first layer is the second SiO ₂ layer 601 with a thickness of 300nm, and the second layer is the second SiO with a thickness _of 500nm. _N4 /SiN layer 602;

(3b) As shown in Figure 4g, photolithography of deep grooves in the P and N regions, wet etching of the second Si ₃ N ₄ /SiN layer 602 and the second SiO ₂ layer 601 in the P and N regions, to form patterns in the P and N regions ;Use dry etching to form a deep groove 701 with a width of 4 μm and a depth of 5 μm in the P and N regions, and the length of the grooves in the P and N regions is determined according to the application in the prepared antenna;

(3c) As shown in Figure 4h, at 850° C., high temperature treatment for 10 minutes, an oxide layer 801 is formed on the inner wall of the oxidation tank, so that the inner wall of the tank in the P and N regions is smooth;

(3d) As shown in FIG. 4i , remove the oxide layer 801 on the inner walls of the trenches in the P and N regions by using a wet etching process.

Step 4, P, N contact region preparation steps:

(4a) As shown in FIG. 4j , using a Metal-organic Chemical Vapor Deposition (MOCVD) process, deposit polycrystalline AlAs1001 in the grooves of the P and N regions, and fill the grooves;

(4b) As shown in FIG. 4k, use CMP to remove the surface polycrystalline AlAs1001 and the second Si ₃ N ₄ /SiN layer 602 to make the surface smooth;

(4c) As shown in Figure 4l, a layer of polycrystalline AlAs12O1 is deposited on the surface by CVD method, with a thickness of 200-500nm;

(4d) As shown in Figure 4m, photoresist the active region of the P region, and perform P ⁺ implantation using the ion implantation method with glue, so that the doping concentration of the active region of the P region reaches 0.5×10 ²⁰ cm ^-3 , and remove the photoresist , forming a P-contact 1301;

(4e) Lithographically etching the active region of the N region, performing N ⁺ implantation by using the ion implantation method with glue, so that the doping concentration of the active region of the N region is 0.5×10 ²⁰ cm ^-3 , removing the photoresist, and forming the N contact 1302;

(4f) As shown in FIG. 4n, wet etching is used to etch away the polycrystalline AlAs1201 outside the P and N contact regions to form P and N contact regions;

(4g) As shown in Fig. 4o, adopt CVD method to deposit SiO ₂ 1501 on the surface with a thickness of 800nm;

(4h) Annealing at 1000°C for 1 minute to activate the ion-implanted impurities and advance the impurities in AlAs;

Step 5, forming the PIN diode steps:

(5a) As shown in FIG. 4p, photolithographic lead holes 1601 are formed in the P and N contact areas;

(5b) As shown in Figure 4q, metal is sputtered on the surface of the substrate, a metal silicide 1701 is formed at 750° C., and the metal on the surface is etched away;

(5c) sputtering metal on the surface of the substrate, and photoetching leads;

(5d) As shown in FIG. 4r , deposit Si ₃ N ₄ /SiN to form a passivation layer 1801 , photolithographically PAD, and form a PIN diode as a solid-state plasma antenna material.

In this embodiment, the above-mentioned various process parameters are all examples, and the transformations made according to the conventional means of those skilled in the art are within the protection scope of the present application.

The Ge-based reconfigurable dipole antenna based on the AlAs/Ge/AlAs structure prepared by the present invention, first of all, the germanium material used improves the pin diode due to its high mobility and large carrier lifetime characteristics. solid-state plasma concentration; secondly, due to the poor thermal stability of the germanium oxide GeO, the sidewall planarization of the P-region and N-region deep grooves can be automatically completed in a high-temperature environment, which simplifies the preparation method of the material; thirdly, The GeOI-based pin diode applied to the solid-state plasma reconfigurable antenna prepared by the present invention adopts a deep groove dielectric isolation process based on etching, which effectively improves the breakdown voltage of the device and suppresses the influence of leakage current on device performance .

In summary, this paper uses specific examples to illustrate the principle and implementation of the method for preparing the Ge-based reconfigurable dipole antenna based on the AlAs/Ge/AlAs structure of the present invention. The descriptions of the above examples are only used To help understand the method of the present invention and its core idea; at the same time, for those of ordinary skill in the art, according to the idea of the present invention, there will be changes in the specific implementation and scope of application. In summary, this specification The content should not be construed as limiting the present invention, and the scope of protection of the present invention should be based on the appended claims.

Claims (10)

1. A method for preparing a Ge-based reconfigurable dipole antenna based on AlAs/Ge/AlAs structure, characterized in that, the reconfigurable dipole antenna comprises: a GeOI substrate, a first antenna arm, a second Two antenna arms, a coaxial feeder and a DC bias line; wherein, the preparation method includes: Select GeOI substrate; making a Ge-based SPiN diode of AlAs/Ge/AlAs structure on the GeOI substrate; A plurality of Ge-based SPiN diodes of the AlAs/Ge/AlAs structure are sequentially connected end-to-end to form an SPiN diode string; fabricating the first antenna arm and the second antenna arm from a plurality of the SPiN diode strings; Fabricating the DC bias line on the GeOI substrate; fabricating a coaxial feeder line on the first antenna arm and the second antenna arm to form the reconfigurable dipole antenna. 2. preparation method as claimed in claim 1, is characterized in that, on described GeOI substrate, make the Ge base SPiN diode of AlAs/Ge/AlAs structure, comprising: (a) selecting a GeOI substrate, and setting an isolation region in the GeOI substrate; (b) etching the GeOI substrate to form a P-type trench and an N-type trench; (c) oxidizing the P-type trench and the N-type trench to form an oxide layer on the inner walls of the P-type trench and the N-type trench; (d) Etching the oxide layer on the inner walls of the P-type trench and the N-type trench by using a wet etching process to complete the planarization of the inner walls of the P-type trench and the N-type trench. (e) Deposit AlAs material in the P-type trench and the N-type trench, and carry out ion implantation to the AlAs material in the P-type trench and the N-type trench to form a P-type active region and N-type active region; (f) generating SiO ₂ material on the entire substrate surface; using an annealing process to activate impurities in the P-type active region and the N-type active region. (g) forming leads on the surface of the P-type active region and the N-type active region to complete the preparation of the AlAs/Ge/AlAs-based plasma pin diode. 3. preparation method as claimed in claim 2, is characterized in that, step (a) comprises: (a1) forming a first protective layer on the surface of the GeOI substrate; (a2) forming a first isolation region pattern on the first protective layer by using a photolithography process; (a3) using a dry etching process, etching the first protective layer and the GeOI substrate at a designated position of the first isolation region pattern to form isolation grooves, and the depth of the isolation grooves is greater than or equal to The thickness of the top layer Ge of the GeOI substrate; (a4) Filling the isolation trench to form the isolation region. 4. preparation method as claimed in claim 2 is characterized in that, step (b) comprises: (b1) forming a second protective layer on the surface of the GeOI substrate; (b2) forming a second isolation region pattern on the second protective layer by using a photolithography process; (b3) etching the second protective layer and the top layer Ge layer of the GeOI substrate at the designated position of the second isolation region pattern by a dry etching process to form the top layer Ge layer in the top layer Ge layer. P-type trenches and the N-type trenches. 5. preparation method as claimed in claim 2, is characterized in that, step (e) comprises: (e1) Depositing an AlAs material in the P-type trench and the N-type trench and on the entire substrate surface by using an MOCVD process; (e2) using a CMP process to planarize the GeOI substrate, and then forming an AlAs layer on the GeOI substrate; (e3) photoetching the AlAs layer, and implanting P-type impurities and N-type impurities into the positions of the P-type trench and the N-type trench by using glued ion implantation to form the P-type active region forming a P-type contact region and an N-type contact region simultaneously with the N-type active region; (e4) removing photoresist; (e5) Using wet etching to remove the AlAs material other than the P-type contact region and the N-type contact region. 6. preparation method as claimed in claim 2, is characterized in that, step (g) comprises: (g1) using an anisotropic etching process to etch away the _SiO2 material at the specified position on the surface of the P-type contact region and the N-type contact region to form the lead hole; (g2) Depositing metal material into the lead hole, passivating the entire substrate material and photoetching the PAD to form the Ge-based SPiN diode with the AlAs/Ge/AlAs structure. 7. The preparation method according to claim 1, characterized in that, the DC bias line comprises a first DC bias line (5), a second DC bias line (6), a third DC bias line (7), the fourth DC bias line (8), the fifth DC bias line (9), the sixth DC bias line (10), the seventh DC bias line (11), the eighth DC bias line (12), the DC bias line is fixed on the GeOI substrate (1) by chemical vapor deposition. 8. preparation method as claimed in claim 1, is characterized in that, The first antenna arm (2) and the second antenna arm (3) are respectively arranged on both sides of the coaxial feeder (4), and the first antenna arm (2) includes first SPiN diodes connected in series string (w1), a second SPiN diode string (w2) and a third SPiN diode string (w3), and the second antenna arm (3) includes a fourth SPiN diode string (w4) and a fifth SPiN diode string connected in series in sequence a string (w5) and a sixth SPiN diode string (w6); Wherein, the length of the first SPiN diode string (w1) is equal to the length of the sixth SPiN diode string (w6), and the length of the second SPiN diode string (w2) is equal to the fifth SPiN diode string (w5 ), the length of the third SPiN diode string (w3) is equal to the length of the fourth SPiN diode string (w4); the first antenna arm (2) and the second antenna arm (3) The length is a quarter of the wavelength of the electromagnetic wave it receives or transmits. 9. preparation method as claimed in claim 1 is characterized in that, the SPiN diode in described SPiN diode string comprises P+ area (27), N+ area (26) and intrinsic area (22), and also comprises first Metal contact area (23) and second metal contact area (24); Wherein, The first metal contact area (23) is electrically connected to the P+ area (27) and the anode of the DC bias voltage respectively, and the second metal contact area (24) is electrically connected to the N+ area (26) respectively. and the negative electrode of the DC bias voltage, so that all the SPiN diodes of the corresponding SPiN diode string are in a forward conduction state after the DC bias voltage is applied. 10. preparation method as claimed in claim 1 is characterized in that, the inner core wire of described coaxial feeder (4) is welded on the sheet metal of described first antenna arm (2), and described first antenna arm ( 2) the metal sheet is connected to the DC bias line (5); the shielding layer of the coaxial feeder (4) is welded to the metal sheet of the second antenna arm (3), and the second antenna arm (3) The metal sheet is connected to the second DC bias line (6); the first DC bias line (5) and the second DC bias line (6) are connected to the negative pole of the DC bias voltage to form a common negative electrode; The first DC bias line group (7, 12) is formed by the third DC bias line (7) and the eighth DC bias line (12), and the fourth DC bias line (8) and the seventh DC bias line The line (11) forms the second DC bias line group (8, 11), and the fifth DC bias line (9) and the sixth DC bias line (10) form the third DC bias line group (9, 10), select only the first DC bias line group (7, 12), the second DC bias line group (8, 11) and the third DC bias line group ( 9, 10), one group is connected with the anode of the DC bias voltage, so that the diode strings of different lengths are in a conduction state, and the diodes produce a solid state with metal-like properties in the intrinsic region (22). Plasma is used in the radiation structure of the antenna to form antenna arms of different lengths to achieve reconfigurable antenna operating frequency.