CN106876457A - A kind of enhanced MIS structure AlGaN/GaN HFETs of groove grid - Google Patents

Abstract

The invention discloses a novel trench gate enhanced MIS structure AlGaN/GaN heterojunction field effect transistor with part of the intrinsic GaN cap layer. This new type of transistor structure introduces an intrinsic GaN cap layer at the edge of the gate of the transistor. The intrinsic GaN cap layer will reduce the two-dimensional electron gas concentration of the conductive channel in this region and realize the electric field modulation effect. By generating a new electric field peak, the high electric field at the edge of the gate is reduced, and the electric field distribution on the surface of the transistor is more uniform. Compared with the traditional trench-gate enhanced MIS structure, the breakdown voltage and reliability of the new structure are significantly improved. Improve and improve.

Description

A Trench Gate Enhanced MIS Structure AlGaN/GaN Heterojunction Field Effect Transistor

technical field

The invention relates to the technical field of semiconductor devices, in particular to a trench gate enhanced MIS structure AlGaN/GaN heterojunction field effect transistor.

Background technique

Due to the limitations of the first-generation and second-generation semiconductor materials represented by Si and GaAs, the third-generation wide-bandgap semiconductor materials have been developed rapidly because of their excellent performance. As one of the cores of the third-generation semiconductor materials, GaN material is special in its polarization effect compared with Si, GaAs and SiC. Taking advantage of this particularity, people have developed AlGaN/GaN high electron mobility transistors, and AlGaN/GaN HEMTs are GaN-based microelectronic devices based on AlGaN/GaN heterojunction materials. AlGaN/GaN heterojunction forms a high-density two-dimensional electron gas (2DEG) at the heterojunction interface through spontaneous polarization and piezoelectric polarization effects, and this two-dimensional electron gas has high mobility. , so that AlGaN/GaN HEMTs have very low on-resistance. Compared with traditional field-effect transistor (FET) devices, AlGaN/GaN HEMTs have excellent characteristics such as high transconductance, high saturation current, and high cut-off frequency. Moreover, experiments have proved that GaN-based HEMTs still maintain good DC characteristics at a high temperature of 1000K, thus providing a reliable guarantee for high-temperature environment applications.

Due to the unique advantages of AlGaN/GaN heterojunction, the growth of AlGaN/GaN heterojunction materials and the development of AlGaN/GaN HEMTs devices have always occupied the main position in the research of GaN electronic devices. However, most of the research on GaN-based electronic devices in the past decade has focused on depletion-mode AlGaN/GaN HEMTs devices. This is due to the existence of strong polarized charges in the AlGaN/GaN heterojunction, making GaN-based enhancement mode Devices become very difficult, so the study of high-performance enhancement mode AlGaN/GaN HEMTs is of great significance.

For GaN-based enhancement-mode devices, the trench-gate MIS structure is easier to realize in terms of technology. Tohru Oka et al. have fabricated an enhancement-mode device with a threshold voltage as high as 5.2V using trench gate technology. The device structure includes from bottom to top: Si substrate, 800nm thick Al _0.05 Ga _0.95 N buffer layer, 40nm thick GaN channel layer, 1nm AlN insertion layer, 34nm thick Al _0.25 Ga _0.75 N barrier layer, 1nm GaN cap layer. This technology makes the barrier layer under the gate thinner or even disappears by etching the barrier layer under the gate to a certain depth, so that the 2DEG concentration under the gate is reduced or even zero, while the carrier concentration in the source and drain regions remains relatively large. At the same time, a SiN insulating layer with a thickness of 20nm is deposited between the gate electrode and the AlGaN barrier layer to form a MIS structure. In this way, the enhanced characteristics of the device can be realized, and a certain current density can be guaranteed. For details, see the literature:

Tohru Oka, Tomohiro Nozawa, "AlGaN/GaN Recessed MIS-Gate HFET With High-Threshold-Voltage Normally-Off Operation for Power Electronics Applications", Electron Device Letters, Vol.29, No.7, July 2008.

However, there is often a peak electric field at the gate edge of AlGaN/GaN HEMTs with trench gate enhanced MIS structure, which will bring the following adverse effects on the device: 1. It will cause electron-hole pair ionization. When the critical In the avalanche condition of the breakdown electric field, the device breaks down at the edge of the gate electrode. 2. Even if the critical breakdown electric field of the GaN material is not reached, the high electric field effect will still cause the field emission of the gate electrode electrons to tunnel into the surface passivation layer, and these tunneling electrons will neutralize the surface polarized positive charges of the AlGaN layer, These surface polarized positive charges are directly related to the concentration of 2DEG at the heterojunction interface. The neutralization of part of the surface positive charges will reduce the concentration of high-density 2DEG, thereby significantly reducing the output current of AlGaN/GaN HEMTs, which is current collapse effect. 3. The ionization probability of electron-hole pairs is increased, and the ionized holes enter the channel and 2DEG under the action of the longitudinal electric field, which will also reduce the concentration of 2DEG and further reduce the output current; and the ionized electrons enter The AlGaN polarization layer will adversely affect the threshold voltage of the device, reducing the reliability of the device.

Therefore, designing a new trench gate enhanced MIS structure AlGaN/GaN HEMTs device, by introducing a new electric field peak, thereby reducing the peak electric field at the edge of the device gate is an important means to optimize its performance and improve its breakdown voltage and reliability. .

Contents of the invention

In order to solve the device avalanche breakdown and current collapse effect caused by the peak electric field at the gate edge of the AlGaN/GaN heterojunction field effect transistor with a trench-gate enhanced MIS structure in the prior art, the threshold voltage and output current are reduced, and the reliability To solve a series of problems such as reduced performance, the present invention provides a novel trench gate enhanced MIS structure AlGaN/GaN heterojunction field effect transistor.

The solution is as follows:

A trench gate enhanced MIS structure AlGaN/GaN heterojunction field effect transistor, comprising:

semi-insulating substrate;

A heteroepitaxially grown AlN nucleation layer located on the semi-insulating substrate;

a GaN buffer layer epitaxially grown on the AlN nucleation layer;

an AlGaN barrier layer epitaxially grown on the GaN buffer layer;

a source electrode, a gate groove, and a drain electrode arranged on the AlGaN layer;

a gate groove between the source and the drain;

an insulating dielectric layer on the gate groove;

A gate located on the insulating dielectric layer (that is, the gate is connected to the AlGaN barrier layer through an insulating dielectric layer);

Its special features are:

An intrinsic GaN cap layer adjacent to the edge of the gate is epitaxially grown on the AlGaN barrier layer, and the intrinsic GaN cap layer partially or completely covers the region between the gate and the drain.

Based on the above solution, the present invention further makes the following optimization limitations and improvements:

The above-mentioned intrinsic GaN cap layer is formed by epitaxially growing an intrinsic GaN layer on the surface of the AlGaN barrier layer, and then etching.

The intrinsic GaN cap layer is located between the gate and drain and can be partially covered or completely covered. This is because the effect of the intrinsic GaN cap layer on channel 2DEG concentration modulation is related to its length, and the etching area can be flexibly selected.

Preferably, the above-mentioned intrinsic GaN cap layer length should not exceed 20% of the gate-to-drain distance.

The gate groove is formed by partially etching the intrinsic GaN cap layer and the AlGaN barrier layer.

The above insulating dielectric layer is formed by plasma enhanced chemical vapor deposition dielectric layer, and the material is silicon nitride or aluminum oxide.

The gate is formed by depositing metal on the insulating dielectric layer.

Both the source and the drain are connected to the AlGaN barrier layer through ohmic contacts.

The epitaxially grown GaN buffer layer has n-type resistance characteristics or semi-insulation characteristics.

The aforementioned semi-insulating substrate is a semi-insulating material capable of heteroepitaxy with the AlN nucleation layer, preferably silicon or silicon carbide; or, the semi-insulating substrate is replaced by sapphire.

The beneficial effects of above-mentioned technical scheme of the present invention are as follows:

An intrinsic GaN cap layer is introduced at the edge of the gate of the transistor, and the intrinsic GaN cap layer will reduce the concentration of the conductive channel 2DEG in this region to realize the electric field modulation effect. By generating new electric field peaks, the high electric field at the gate edge is reduced, making the electric field distribution on the surface of the transistor more uniform. With the increase of the intrinsic GaN cap layer length, the electric field modulation effect is enhanced, which makes the peak value of the new electric field increase, and the drop of the peak electric field at the gate edge increases; and because the surface electric field distribution is more uniform, the device reaches the critical breakdown electric field of the GaN material. The drain terminal voltage that needs to be applied is larger, the breakdown voltage is increased, and the reliability of the device is also significantly improved compared with the traditional trench-gate enhanced structure.

At the same time, the structure is easy to manufacture in terms of process, does not cause additional adverse effects on the AlGaN barrier layer, and ensures the stability and reliability of the device during the process of manufacturing.

Description of drawings

FIG. 1 is a schematic diagram of a novel trench gate enhanced MIS structure AlGaN/GaN heterojunction field effect transistor with a part of intrinsic GaN cap layer according to the present invention.

Figure 2 shows the breakdown of the AlGaN/GaN heterojunction field effect transistor structure of the traditional trench gate enhanced MIS structure and the trench gate enhanced MIS structure AlGaN/GaN heterojunction field effect transistor structure of the present invention with part of the intrinsic GaN cap layer Comparison diagram of channel electric field distribution and voltage value.

detailed description

In order to make the technical problems, technical solutions and advantages to be solved by the present invention clearer, a detailed description will be given below in conjunction with the accompanying drawings and specific embodiments.

This embodiment is a novel trench gate enhanced MIS structure AlGaN/GaN heterojunction field effect transistor with part of the intrinsic GaN cap layer. Its structure is shown in Figure 1, mainly including: a semi-insulating substrate 0; a heteroepitaxially grown AlN nucleation layer 1 on the semi-insulating substrate; a GaN buffer layer 2 epitaxially grown on the AlN nucleation layer; AlGaN barrier layer 3 epitaxially grown on the buffer layer; gate groove 4, drain 5 and source 6 located on the AlGaN barrier layer; insulating dielectric layer 7 located on the gate groove; located on the insulating dielectric layer The gate 8; the intrinsic GaN cap layer 9 located on the AlGaN barrier layer and adjacent to the edge of the gate.

The trench gate MIS structure is a commonly used method to realize the enhancement mode. By etching the barrier layer under the gate to a certain depth, the barrier layer under the gate becomes thinner or even disappears, so that the concentration of 2DEG under the gate is reduced or even zero, thereby realizing enhanced characteristics. The threshold voltage of the device depends on the etch depth.

The introduction of an intrinsic GaN cap layer induces negative polarization charges at the GaN/AlGaN interface. This layer of negative charges reduces the channel 2DEG concentration and generates a new electric field peak, which reduces the high electric field at the edge of the gate and makes the surface electric field distribution tend to be uniform. . With the increase of the intrinsic GaN cap layer length, the electric field modulation effect is enhanced, which makes the peak value of the new electric field increase, and the drop of the peak electric field at the gate edge increases; and because the surface electric field distribution is more uniform, the device reaches the critical breakdown electric field of the GaN material. The drain terminal voltage that needs to be applied is larger, the breakdown voltage is improved, and the reliability of the device is also significantly improved compared with the traditional trench-gate enhanced MIS structure.

As shown in Figure 2, the breakdown voltage of the traditional structure is only 46V due to the peak electric field at the edge of the gate, while the new structure can effectively reduce the peak electric field at the edge of the gate and generate a new GaN cap near the drain. The electric field peak of , the breakdown voltage increases to 78V, where X=3.0μm is the position of the gate near the edge of the drain, the length of the intrinsic GaN cap layer is 2.0μm, and the thickness is 100nm.

The specific implementation method takes inductively coupled plasma etching (ICP) as an example: after completing the etching and metal electrode deposition process of the intrinsic GaN cap layer AlGaN/GaN heterojunction field effect transistor, use ICP to close the gate The intrinsic GaN cap layer is etched out at the edge. The etching area can be flexibly selected.

Here, the thickness of the intrinsic GaN cap layer is only related to the specific requirements of the channel corresponding to the cap layer. Where the channel carrier concentration needs to be reduced, there should be an intrinsic GaN cap layer. The thicker the cap layer is, The larger the carrier concentration is, the greater the reduction of the carrier concentration is. The specific channel carrier concentration is mainly determined according to the adverse effects that need to be curbed, such as:

If a concentration distribution of LDD is required to increase the breakdown voltage to curb the hot carrier injection effect, different depths can be sequentially etched from the gate to the drain to produce a stepped intrinsic GaN cap layer.

If it is necessary to fully improve the breakdown characteristics of the device, the intrinsic GaN cap layer can be completely covered between the gate and the drain.

If it is necessary to reduce the peak electric field generated by the drain of the device near the edge of the gate, an intrinsic GaN cap layer can be etched on the edge of the drain according to specific requirements, and so on.

In order to obtain "intrinsic GaN cap layer with modulated channel carrier concentration", it is not limited to the intrinsic GaN cap layer ICP etching technology used in the above-mentioned embodiments, and other methods can also be used to achieve the same result. technical effect.

There are many etching techniques and methods to obtain the intrinsic GaN cap layer, such as reactive ion etching (RIE), electron cyclotron resonance plasma etching (ECR), etc., which can etch the intrinsic GaN cap layer, can be applied to this scheme.

What has been described above is a preferred embodiment of the present invention. For those of ordinary skill in the art, based on the principle of the present invention, some improvements and perfections can also be carried out. The products of these improvements and perfections should also be regarded as the protection of the present invention. scope.

Claims (9)

1. enhanced MIS structure AlGaN/GaN HFETs of a kind of groove grid, including：

SI-substrate；

The AlN nucleating layers of heteroepitaxial growth on the SI-substrate；

Positioned at the GaN cushions of the AlN nucleating layers Epitaxial growth；

Positioned at the AlGaN potential barrier of the GaN cushions Epitaxial growth；

It is respectively in source electrode in the AlGaN potential barrier, grid recess and drain electrode；The grid recess is located at the source electrode with drain electrode Between；

Insulating medium layer on the grid recess；

Grid on the insulating medium layer；

It is characterized in that：

Also epitaxial growth has the intrinsic GaN cap abutted with gate edge, the intrinsic GaN cap portion in AlGaN potential barrier The region divided covering or be completely covered between grid and drain electrode.

2. enhanced MIS structure AlGaN/GaN HFETs of groove grid as claimed in claim 1, its feature exists In：The intrinsic GaN cap is by the intrinsic GaN layer of AlGaN potential barrier surface epitaxial growth, then etching what is formed.

3. enhanced MIS structure AlGaN/GaN HFETs of groove grid as claimed in claim 1, its feature exists In：20 the percent of the of length no more than grid leak spacing of intrinsic GaN cap.

4. enhanced MIS structure AlGaN/GaN HFETs of groove grid as claimed in claim 1, its feature exists In：The grid recess is formed by intrinsic GaN cap and AlGaN potential barrier local etching.

5. enhanced MIS structure AlGaN/GaN HFETs of groove grid as claimed in claim 1, its feature exists In：The insulating medium layer is formed by plasma-reinforced chemical vapor deposition dielectric layer, and material is silicon nitride or oxidation Aluminium.

6. enhanced MIS structure AlGaN/GaN HFETs of groove grid as claimed in claim 1, its feature exists In：The grid is formed by depositing metal on insulating medium layer.

7. enhanced MIS structure AlGaN/GaN HFETs of groove grid as claimed in claim 1, its feature exists In：The source electrode and the drain electrode are connected by Ohmic contact with the AlGaN potential barrier.

8. enhanced MIS structure AlGaN/GaN HFETs of groove grid as claimed in claim 1, its feature exists In：The GaN cushions of the epitaxial growth have N-shaped resistance characteristic or semi-insulating characteristic.

9. enhanced MIS structure AlGaN/GaN HFETs of groove grid as claimed in claim 1, its feature exists In：The material of the SI-substrate is silicon or carborundum, or SI-substrate replaces with Sapphire Substrate.