CN106842003A - Hardware adjustment method and device based on level regulation and control chip - Google Patents

Abstract

The present invention relates to hardware debugging field, a kind of hardware adjustment method for regulating and controlling chip based on level is disclosed, comprised the following steps：Voltage range of the preset number signal under counterlogic, and be written in level regulation and control chip；The voltage of the data signal that level regulation and control chip sends to the first digit chip regulates and controls, and keeps it in the voltage range under counterlogic；Second digit chip receives the data signal of regulation and control.Also disclose a kind of hardware debugging device for regulating and controlling chip based on level, presetting module, for voltage range of the preset number signal under counterlogic；Level regulates and controls chip module, and the voltage of the data signal for being sent to the first digit chip regulates and controls；Second digit chip module, for receiving the data signal of regulation and control.The present invention regulates and controls regulation and control of the chip to voltage under data signal counterlogic by level, makes data signal that correct logic is kept in transmitting procedure.

Description

Hardware debugging method and device based on level regulation chip

technical field

The invention relates to the technical field of hardware debugging, in particular to a hardware debugging method and device based on a level control chip.

Background technique

Noise tolerance, which means the anti-interference ability of the gate circuit, is the maximum noise range allowed to ensure the normal operation of the next pole when the output of the previous pole is the worst. In digital circuits, the minimum value of the upper limit noise margin of the "1" state and the lower limit noise margin of the "0" state is generally used to represent the noise margin of the circuit. The greater the noise margin, the greater the allowable noise and the better the anti-interference of the circuit. The input signal of the binary digital logic circuit allows a certain tolerance. In the digital system, the connection between the logic circuits may be disturbed by various noises, such as the noise caused by signal transmission, and the high-low level conversion of the signal. noise, or random pulse noise caused by adjacent switching signals, these noises will be superimposed on the operating signal, as long as its amplitude does not exceed the minimum or maximum logic level, the output logic state will not be affected, if the amplitude is too large Large, the output logic level will change.

As single boards have higher and higher requirements for circuit power consumption constraints, the power supply voltage of current digital chips is getting lower and lower, and the corresponding digital signal level noise tolerance is correspondingly smaller. Therefore, slight level voltage fluctuations in the process of digital signal transmission will cause complete logical opposition of digital signals, which will cause some system problems that are difficult to check.

Contents of the invention

Aiming at the current needs and the shortcomings of the existing technology development, the present invention provides a hardware debugging method and device based on a level regulation chip, based on the requirement of maintaining a stable level and voltage of the digital signal during the transmission process, to meet the requirements during the debugging process. The corresponding digital signal needs to maintain correct logic during transmission.

In order to achieve the above object, the present invention adopts the following technical solutions:

A hardware debugging method based on a level control chip, comprising the following steps:

Preset the voltage interval of the digital signal under the corresponding logic, and write it into the level control chip;

The level regulation chip regulates the voltage of the digital signal sent by the first digital chip to keep it within the voltage range under the corresponding logic;

The second digital chip receives the modulated digital signal.

Preferably, the voltage range of the preset digital signal under the corresponding logic is written into the level control chip, including:

The high level of the digital signal circuit state is recorded as logic 1, and the low level is recorded as logic 0;

A first voltage interval preset under logic 1 and a second voltage interval preset under logic 0;

Write the preset first voltage range and the second voltage range into the level regulation chip.

Preferably, after the voltage interval of the digital signal under the corresponding logic is preset and written into the level control chip, the method further includes: the first digital chip sends out the digital signal.

Preferably, before the level regulation chip regulates the voltage of the digital signal sent by the first digital chip to keep it in the voltage interval under the corresponding logic, it also includes: judging whether the voltage of the digital signal under the corresponding logic is within the preset The digital signal is within the voltage range of the corresponding logic, if yes, the digital signal does not need to be regulated; if not, the voltage of the digital signal is regulated.

A hardware debugging device based on a level regulation chip, comprising:

The preset module is used to preset the voltage interval of the digital signal under the corresponding logic, and write it into the level control chip;

The level control chip module is used to control the voltage of the digital signal sent by the first digital chip to keep it within the voltage range under the corresponding logic;

The second digital chip module is used for receiving regulated digital signals.

Preferably, it also includes: a first digital chip module, used to send out digital signals;

Preferably, it further includes: a judging module, configured to judge whether the voltage of the digital signal under the corresponding logic is within the preset voltage range of the digital signal under the corresponding logic.

Beneficial effects of the present invention:

1. The present invention proposes a hardware debugging method based on a level control chip. Aiming at a single board system, the level control chip is used for hardware debugging to keep the level voltage of the digital signal stable during the transmission process and meet the corresponding requirements during the debugging process. Digital signals need to maintain correct logic during transmission to avoid level logic errors;

2. By writing a level control program into the chip, the level voltage of the transmitted digital signal can be adjusted, effectively controlling the logical change of the level during the transmission process, and the operation is simple and feasible.

Description of drawings

FIG. 1 is one of the schematic flowcharts of the hardware debugging method based on the level regulation chip of the present invention.

FIG. 2 is a schematic structural diagram of a hardware debugging device based on a level control chip according to the present invention.

FIG. 3 is the second schematic flow diagram of the hardware debugging method based on the level regulation chip of the present invention.

detailed description

For ease of understanding, the following explanations are made to some nouns appearing in the present invention:

[2.7V, 5.5V] refers to the voltage range from 2.7V to 5.5V, including 2.7 V and 5.5V;

[0.9V, 2.7V) refers to the voltage range from 0.9 V to 2.7V, including 0.9 V, excluding 2.7 V.

Below in conjunction with accompanying drawing and embodiment, the specific embodiment of the present invention is described in further detail:

Embodiment 1: As shown in Figure 1, a kind of hardware debugging method based on level regulation chip of the present invention comprises the following steps:

Step S101, record the high level of the digital signal circuit state as logic 1, and record the low level as logic 0; preset the first voltage interval under logic 1 and the second voltage interval under logic 0; Write the first voltage interval and the second voltage interval to the level control chip.

Step S102, the first digital chip sends a digital signal.

Step S103, the level control chip judges the digital signal sent by the first digital chip, whether the voltage under the corresponding logic is within the voltage range of the preset digital signal under the corresponding logic, if yes, the digital signal does not need to be adjusted; if not, Regulate the voltage of the digital signal.

Step S104 , the level regulation chip regulates the voltage of the digital signal sent by the first digital chip to keep it within the voltage range under the corresponding logic.

Step S105, the second digital chip receives the regulated digital signal.

As an implementable manner, the first digital chip in this embodiment is TCA9517.

As an implementable manner, in this embodiment, the first voltage interval is set to [2.7V, 5.5V], and the second voltage interval is set to [0.9V, 2.7V).

Embodiment 2: As shown in FIG. 2, a hardware debugging device based on a level regulation chip of the present invention includes a first digital chip module 201, a judgment module 202, a level regulation chip module 203, and a second digital chip module 204 , the preset module 205 , the first digital chip module 201 is connected to the judging module 202 , the level regulation chip module 203 , and the second digital chip module 204 in sequence, and the preset module 205 is connected to the level regulation chip module 203 .

The first digital chip module 201 is used to send a digital signal; the judging module 202 is used to judge whether the voltage of the digital signal under the corresponding logic is within the voltage range of the preset digital signal under the corresponding logic; the level regulation chip module 203, It is used to regulate the voltage of the digital signal sent by the first digital chip to keep it within the voltage range under the corresponding logic; the second digital chip module 204 is used to receive the regulated digital signal; the preset module 205 is used to Based on the voltage range of the preset digital signal under the corresponding logic, and write it into the level control chip.

Embodiment 3: As shown in FIG. 3, another hardware debugging method based on a level regulation chip of the present invention includes the following steps:

Step S301, preset the voltage interval of the digital signal under the corresponding logic, and write it into the level control chip.

Step S302 , the level regulation chip regulates the voltage of the digital signal sent by the first digital chip to keep it within the voltage range under the corresponding logic.

Step S303, the second digital chip receives the regulated digital signal.

What is shown above is only a preferred embodiment of the present invention. It should be pointed out that for those of ordinary skill in the art, some improvements and modifications can also be made without departing from the principles of the present invention. It should be regarded as the protection scope of the present invention.

Claims (7)

1. A hardware debugging method based on a level regulation chip, is characterized in that, comprises the following steps: Preset the voltage interval of the digital signal under the corresponding logic, and write it into the level control chip; The level regulation chip regulates the voltage of the digital signal sent by the first digital chip to keep it within the voltage range under the corresponding logic; The second digital chip receives the modulated digital signal. 2. The hardware debugging method based on a level regulation chip according to claim 1, wherein the voltage range of the preset digital signal under the corresponding logic is written into the level regulation chip, including: The high level of the digital signal circuit state is recorded as logic 1, and the low level is recorded as logic 0; Preset the first voltage interval under logic 1 and the second voltage interval under logic 0; Write the preset first voltage range and the second voltage range into the level regulation chip. 3. The hardware debugging method based on the level regulation chip according to claim 1, characterized in that, after the voltage interval of the preset digital signal under the corresponding logic is written into the level regulation chip, it also includes: The first digital chip sends out digital signals. 4. the hardware debugging method based on the level regulation chip according to claim 1, is characterized in that, the voltage of the digital signal that the first digital chip sends is regulated in the level regulation chip, makes it remain under the corresponding logic Before the voltage interval, it also includes: judging whether the voltage of the digital signal under the corresponding logic is within the preset voltage interval of the digital signal under the corresponding logic, if yes, the digital signal does not need to be regulated; if not, the voltage of the digital signal is regulated. 5. A hardware debugging device based on a level control chip, characterized in that, comprising: The preset module is used to preset the voltage interval of the digital signal under the corresponding logic, and write it into the level control chip; The level control chip module is used to control the voltage of the digital signal sent by the first digital chip to keep it within the voltage range under the corresponding logic; The second digital chip module is used for receiving regulated digital signals. 6. The hardware debugging device based on level control chip according to claim 5, further comprising: The first digital chip module is used to send out digital signals. 7. The hardware debugging device based on level control chip according to claim 5, further comprising: The judging module is used to judge whether the voltage of the digital signal under the corresponding logic is within the preset voltage range of the digital signal under the corresponding logic.