CN106817584A - A kind of MJPEG compressions implementation method and FPGA based on FPGA - Google Patents

Abstract

The embodiment of the invention provides a kind of MJPEG compression methods and FPGA based on FPGA, video data stream to caching carries out discrete cosine transform, then video data stream is carried out into transform again, to be quantified by the video data stream of transform, then run length encoding, the size of compressed video data stream are carried out to video data stream.By implementation of the invention, the characteristics of there is abundant programmable resource using FPGA, realize that MJPEG compresses on FPGA, it is ensured that the real-time and scalability of compression.

Description

A FPGA-based MJPEG compression implementation method and FPGA

technical field

The invention relates to the field of video image processing, in particular to an FPGA-based MJPEG compression implementation method and the FPGA.

Background technique

In the video image transmission system, the transmission of a large number of video image data streams is called the system bottleneck; through the MJPEG compression algorithm, the storage space and network bandwidth required for video image data transmission can be greatly reduced. Due to the complexity of the MJPEG compression algorithm, the existing MJPEG compression algorithm is generally implemented by software; however, the real-time and scalability of the algorithm are greatly limited, especially for multi-channel high-resolution, high frame rate video image data. Stream compression processing, such as 1080p60f, 4k60f.

Contents of the invention

The invention aims to solve the problem of poor real-time performance and scalability of the MJPEG compression algorithm in the prior art.

For solving the problems of the technologies described above, the present invention provides a kind of FPGA-based MJPEG compression implementation method, comprising:

Discrete cosine transform is performed on the buffered video data stream;

Performing Z-transformation on the video data stream after the discrete cosine transform;

Quantizing the Z-transformed video data stream, and performing run-length encoding on the quantized video data stream;

Encoding the video data stream after length-length coding according to the size of entropy, compressing the size of the video data stream.

Optionally, said encoding the video data stream after the length-length encoding according to the size of entropy includes: performing Huffman encoding on the video data stream after the length-length encoding.

Optionally, said quantizing the Z-transformed video data stream includes:

Quantize the corresponding video data stream according to the reciprocal of the pre-stored quantization coefficient.

Optionally, before performing the discrete cosine transform on the cached video data stream, it also includes:

Judging whether the buffered video data stream is in YCbCr format, if not, converting the video data stream into YCbCr format.

Optionally, before performing the discrete cosine transform on the cached video data stream, it also includes:

Separately buffer the YY component and the CbCr component in the video data stream in the YCbCr format.

The present invention also provides a kind of FPGA, comprising:

Discrete cosine transform module, for carrying out discrete cosine transform to the video data stream of cache;

Z transformation module, for performing Z transformation on the video data stream after discrete cosine transformation;

Quantization module, used for quantizing the video data stream through Z transformation;

A first encoding module, configured to perform run-length encoding on the quantized video data stream;

The second encoding module is configured to encode the video data stream after the length-length encoding according to the size of entropy, and compress the size of the video data stream.

Optionally, the second coding module is further configured to: perform Huffman coding on the video data stream after length-length coding.

Optionally, the quantization module is also used for:

Quantize the corresponding video data stream according to the reciprocal of the pre-stored quantization coefficient.

Optionally, a conversion module is also included for:

Before the discrete cosine transform module performs discrete cosine transform on the buffered video data stream, it is judged whether the video data stream is in YCbCr format, and if not, the video data stream is converted into YCbCr format.

Optionally, a caching module is also included, configured to respectively cache the YY component and the CbCr component in the video data stream in the YCbCr format.

The beneficial effects of the present invention are:

The embodiment of the present invention provides an FPGA-based MJPEG compression implementation method and an FPGA to perform discrete cosine transform on the cached video data stream, and then perform Z-transform on the video data stream to quantize the Z-transformed video data stream, Then run-length encoding and Huffman encoding are performed on the video data stream to further compress the size of the video data stream. Through the implementation of the present invention, the MJPEG compression is realized on the FPGA by utilizing the feature that the FPGA has rich programmable logic resources, which ensures the real-time performance and scalability of the compression.

Description of drawings

Fig. 1 is the MJPEG compression method flowchart based on FPGA of the embodiment of the present invention one;

Fig. 2 is the FPGA composition schematic diagram of embodiment two of the present invention;

FIG. 3 is a schematic diagram of the composition of the FPGA-based MJPEG compression system according to Embodiment 3 of the present invention.

detailed description

Embodiments of the present invention will be further described in detail below through specific implementation methods in conjunction with the accompanying drawings.

Embodiment one:

The present embodiment provides a kind of MJPEG compression method based on FPGA, please refer to Fig. 1, specifically comprise:

S101. Perform discrete cosine transform on the buffered video data stream;

S102. Performing Z-transformation on the discrete cosine transformed video data stream;

S103. Quantize the Z-transformed video data stream, and perform run-length encoding on the quantized video data stream to compress the size of the video data stream.

From the perspective of information theory, compression is to remove redundancy in information, retain uncertain information, and replace the original redundant description with a description that is closer to the essence of information. Compression is mainly divided into two categories: lossy compression and lossless compression. Among them, if the loss of individual data does not cause much impact, it is a good idea to ignore them at this time. This is lossy compression. Lossy compression is widely used in animation, sound and image files, typical representatives are MPEG in video disc file format, mp3 in music file format and jpg in image file format. MJPEG in this embodiment is also a kind of lossy compression. In other cases, it may be required that the compressed data must be accurate, and then there are lossless compression formats, such as common zip, rar, and so on.

In this embodiment, since the MJPEG compression method uses macroblock MB=8*8bits as the basic unit, the input video data stream needs to be buffered first. The input video data stream is cached sequentially according to the increasing order of addresses. In this embodiment, the input video stream format is 1080p60f, and the sampling rate YCbCr is 4:2:2 as an example. The size of the cache should be 1920*8=15360@ 24bits. When the video data stream is cached according to the increasing order of addresses, when the write address exceeds 13455, two MB are filled, and the buffered video data stream can be read. Then, when the write address exceeds 15359, that is, 8 rows are filled, write data according to the original MB read address. And there should be a certain gap between the write address and the read address to avoid data loss caused by the cache being filled. Wherein, the range of the gap GAP can be set to be greater than or equal to 128.

Therefore, when the cached data exceeds 13455, the subsequent processing can be continued, and each subsequent processing flow can process the input MB data within unit time, that is, MB, to meet the requirement of real-time processing.

In this embodiment, discrete cosine transform is performed on the buffered video data stream. The video image data has a certain correlation with each other. This correlation is not intuitive enough to observe in the time domain. Through the discrete cosine transform (DCT), the correlation can be removed, and the video image data can be observed from the frequency domain. The output spectrum of video image data after DCT transformation is two-dimensional, the area in the upper left corner is the low frequency area, and the area in the lower right corner is the high frequency area.

Afterwards, after the DCT transformation, Z transformation is performed on the video data stream. The Z transformation is to scan the output of the DCT transformation in a Z-shape and concatenate the low-frequency data. Z-transform the DCT-transformed video data stream, take one MB as the basic unit, adopt the ping-pong storage method, write in order first, and then read out according to a specific address.

Then, quantize the Z-transformed video data stream. After quantization, all the data in the low-frequency area is left, and most of the data in the high-frequency area becomes 0. Based on this, further image compression can be performed. There are 256 quantization levels ranging from 0 to 255. In this embodiment, quantizing the Z-transformed video data stream may include: quantizing the corresponding video data stream according to the reciprocal of the pre-stored quantization coefficient. During quantization, the inverse of the quantization coefficient is multiplied by the Z-transformed video data stream. Wherein, the corresponding quantization coefficients of the video data streams at different addresses are also different.

The quantized video data stream will have a large number of zero data, that is, a large number of zero strings. For the zero string information, only the number of zeros needs to be recorded, which can greatly reduce the data transmission bandwidth. In this embodiment, through Run-Length Encoding (RLE), it is possible to record only the number of consecutive all-zero information, thereby achieving the purpose of compressing the size of the video data stream.

In addition, in this embodiment, after performing run-length encoding on the quantized video data stream, it may further include: encoding the video data stream after the run-length encoding according to the magnitude of entropy. In order to further reduce the data transmission bandwidth, codewords are assigned to the input video data stream according to the amount of information, so that the video data stream transmission bandwidth obtained after encoding can be reduced to a lower level. After RLE encoding, encoding is performed according to the size of entropy, that is, long codes are used to encode data with larger entropy, and short codes are used to encode data with smaller entropy. In this embodiment, Huffman coding can be used for entropy coding, and the codewords required by Huffman coding can be stored in a code table in advance. In addition, other compression coding methods such as arithmetic coding may also be used.

In addition, bit padding and BYTE Stuffer are performed on the code stream after Huffman encoding, and JFIFGEN Header is added at the same time.

In addition, in this embodiment, before performing discrete cosine transform on the buffered video data stream, it may also include: judging whether the buffered video data stream is in YCbCr format, and if not, converting the video data stream into YCbCr format.

When the sampling rate of the output video data stream is 4:2:2, in order to process the YY, Cb and Cr components in the video stream in parallel, before performing discrete cosine transform on the buffered video data stream, the video data in YCbCr format The YY component and CbCr component in the stream are buffered separately. After that, the YY component and the CbCr component can be processed separately, thereby realizing the parallel processing of the video data stream.

This embodiment provides a method for implementing MJPEG compression based on FPGA, which performs discrete cosine transform on the cached video data stream, then performs Z transform on the video data stream, quantizes the Z-transformed video data stream, and then converts the video data stream Run-length encoding and Huffman encoding are performed on the data stream to further compress the size of the video data stream. Through the implementation of the present invention, the MJPEG compression is realized on the FPGA by utilizing the feature of rich programmable resources of the FPGA, which ensures the real-time performance and scalability of the compression.

second embodiment

This embodiment provides an FPGA, please refer to Figure 1, specifically including:

Discrete cosine transform module 101, is used for carrying out discrete cosine transform to the video data stream of cache;

Z transformation module 102, for carrying out Z transformation to the video data stream after discrete cosine transformation;

A quantization module 103, configured to quantize the Z-transformed video data stream;

The first encoding module 104 is configured to perform run-length encoding on the quantized video data stream to compress the size of the video data stream.

In this embodiment, since the MJPEG compression method uses macroblock MB=8*8bits as the basic unit, the input video data stream needs to be buffered first. The input video data stream is cached sequentially according to the increasing order of addresses. In this embodiment, the input video stream format is 1080p60f, and the sampling rate YCbCr is 4:2:2 as an example. The size of the cache should be 1920*8=15360@ 24bits. When the video data stream is cached according to the increasing order of addresses, when the write address exceeds 13455, two MB are filled, and the buffered video data stream can be read. Then, when the write address exceeds 15359, that is, 8 rows are filled, write data according to the original MB read address. And there should be a certain gap between the write address and the read address to avoid data loss caused by the cache being filled. Wherein, the range of the gap GAP can be set to be greater than or equal to 128.

Therefore, when the cached data exceeds 13455, the subsequent processing can be continued, and each subsequent processing flow can process the input MB data within unit time, that is, MB, to meet the requirement of real-time processing.

In this embodiment, discrete cosine transform is performed on the buffered video data stream. The video image data has a certain correlation with each other. This correlation is not intuitive enough to observe in the time domain. Through the discrete cosine transform (DCT), the correlation can be removed, and the video image data can be observed from the frequency domain. The output spectrum of video image data after DCT transformation is two-dimensional, the area in the upper left corner is the low frequency area, and the area in the lower right corner is the high frequency area.

Afterwards, after the DCT transformation, Z transformation is performed on the video data stream. The Z transformation is to scan the output of the DCT transformation in a Z-shape and concatenate the low-frequency data. Z-transform the DCT-transformed video data stream, take one MB as the basic unit, adopt the ping-pong storage method, write in order first, and then read out according to a specific address.

Then, quantize the Z-transformed video data stream. After quantization, all the data in the low-frequency area is left, and most of the data in the high-frequency area becomes 0. Based on this, further image compression can be performed. There are 256 quantization levels 0-255 in total. In this embodiment, the quantization module 103 can also be used to quantize the corresponding video data stream according to the reciprocal of the pre-stored quantization coefficient. During quantization, the inverse of the quantization coefficient is multiplied by the Z-transformed video data stream. Wherein, the corresponding quantization coefficients of the video data streams at different addresses are also different.

The quantized video data stream will have a large number of zero data, that is, a large number of zero strings. For the zero string information, only the number of zeros needs to be recorded, which can greatly reduce the data transmission bandwidth. In this embodiment, through the length-length encoding RLE, only the number of consecutive all-zero information can be recorded, thereby achieving the purpose of compressing the size of the video data stream.

In addition, in this embodiment, a second encoding module 105 may also be included, configured to encode the length-length encoded video data stream according to the size of entropy. In order to further reduce the data transmission bandwidth, codewords are assigned to the input video data stream according to the amount of information, so that the video data stream transmission bandwidth obtained after encoding can be reduced to a lower level. After RLE encoding, encoding is performed according to the size of entropy, that is, long codes are used to encode data with larger entropy, and short codes are used to encode data with smaller entropy. In this embodiment, Huffman coding can be used for entropy coding, and the codewords required by Huffman coding can be stored in a code table in advance.

In addition, JFIF GENHeader is added to the bit padding and BYTE Stuffer of the Huffman-encoded code stream, thereby further improving the MJPEG compression of the entire video data stream.

In addition, in this embodiment, a conversion module 106 may also be included, which is used to determine whether the buffered video data stream is in the YCbCr format before performing discrete cosine transform on the buffered video data stream, and if not, convert the video data stream into YCbCr format.

When the sampling rate of the output video data stream is 4:2:2, in order to process the YY and Cb and Cr components in the video stream in parallel, a cache module 107 can also be included in this embodiment for converting the video data in the YCbCr format The YY component and CbCr component in the stream are buffered separately. After that, the YY component and the CbCr component can be processed separately, thereby realizing the parallel processing of the video data stream.

This embodiment provides an FPGA, which performs discrete cosine transform on the buffered video data stream, then performs Z-transform on the video data stream, quantizes the Z-transformed video data stream, and then performs run-length encoding and Huffman coding further compresses the size of the video data stream. Through the implementation of the present invention, the MJPEG compression is realized on the FPGA by utilizing the feature of rich programmable resources of the FPGA, which ensures the real-time performance and scalability of the compression.

Embodiment three

The present embodiment provides a kind of MJPEG compression system based on FPGA, please refer to Fig. 3, comprise:

1) cache module 107

Since the MJPEG compression algorithm uses macroblock MB=8*8bits as the basic unit for processing, the input video stream needs to be cached first; the cache size is 1920*8@24bits=15360@24bits.

The input video stream is first buffered to the cache module 107 in order of increasing address, and when the write address of the cache module 107 exceeds 13455, 2 MB is full, and the subsequent modules start to read data by MB; when the write address of the cache module 107 exceeds 15359 That is, if 8 lines are filled, write data in the order of the original MB read address, and the write address and read address must maintain a gap of GAP>=128 to avoid data loss caused by the input buffer module 107 being filled.

As can be seen from the above, when the cache module 107 is filled with data exceeding 13455, the subsequent core operation modules of MJPEG, etc. can start pipeline processing; subsequent sub-modules process the input MB data within unit time, that is, MB, to meet the requirements of real-time processing .

2) conversion module 106

This module mainly converts the video data stream in RGB format into the video data stream in YCbCr format. If the input is in YCbCr format, this module can bypass.

3) DCT module 101

Since the sampling rate of the input video stream is 4:2:2, in order to process the YY and CbCr components in the video stream in parallel, two cache modules 107 are needed, one for caching the YY component and the other for the CbCr component. When the cache exceeds 2 MB, take 1 MB as the basic unit, read the value of the Y component by row scanning, and perform DCT transformation; take 2 MB as the basic unit, and read the Cb value and Cr by row scanning twice value, DCT conversion is performed; in this way, within 2 MB, that is, 128 clock cycles, the DCT module 101 can process YCbCr4:2:2 in parallel.

4) Z transformation module 102

Perform Z transformation on the MB output by the DCT module 101, take 1 MB as the basic unit, adopt the ping-pong storage method, first write in order, and then read out according to a specific address.

5) quantization module 103

There are 256 quantization levels from 0 to 255, and the Q value storage module stores the reciprocal of the quantization coefficient; when performing Q quantization, first read the address according to the predetermined quantization level, read out the quantization coefficient, and then multiply it with the input data .

6) The first coding module 104

The quantized video stream will have a large number of consecutive zeros, and the number of consecutive zeros only needs to be recorded, which can reduce the data transmission bandwidth; RLE encoding uses MB as the basic unit, and the output is variable-length MB.

7) Polling module 108

In order to meet the requirements of real-time processing, the core computing module adopts full-speed pipeline processing, so that the variable-length MB output by the first encoding module 104 has 2 paths: YY and CbCr; before entering the second encoding module 105, parallel data streams need to be Convert to a serial data stream.

8) The second encoding module 105

In order to further reduce the data transmission bandwidth, it is necessary to perform entropy coding on the serial variable-length MB output by the polling module, that is, Huffman coding, and allocate codewords for the input video data stream according to the size of the information volume, so that the video obtained after coding The data stream transmission bandwidth is reduced to the minimum; the code words required by Huffman coding are pre-stored in the code table.

9) Byte stuffing module 109 & JFIF GEN module 110

Perform bit padding and BYTE Stuffer on the Huffman-encoded code stream and add JFIF GENHeader at the same time, which completes the MJPEG compression of the entire input video stream.

The above brief description takes the video stream 1080p60f sampling rate 4:2:2 as an example. If the sampling rate is 4:4:4, you only need to expand accordingly; if the input video stream is in RGB format, you only need to open the conversion module 106 is enough.

Obviously, those skilled in the art should understand that each module or each step of the above-mentioned embodiments of the present invention can be realized by a general-purpose computing device, and they can be concentrated on a single computing device, or distributed across multiple computing devices. Optionally, they can be implemented with executable program codes of computing devices, thus, they can be stored in computer storage media (ROM/RAM, magnetic disks, optical disks) to be executed by computing devices, and in some In some cases, the steps shown or described can be performed in a different order than here, or they can be fabricated into individual integrated circuit modules, or multiple modules or steps can be fabricated into a single integrated circuit module for implementation. . Therefore, the present invention is not limited to any specific combination of hardware and software.

The above content is a further detailed description of the embodiments of the present invention in conjunction with specific implementation modes, and it cannot be assumed that the specific implementation of the present invention is limited to these descriptions. For those of ordinary skill in the technical field of the present invention, without departing from the concept of the present invention, some simple deduction or replacement can be made, which should be regarded as belonging to the protection scope of the present invention.

Claims (10)

1. A method for realizing MJPEG compression based on FPGA, comprising: Discrete cosine transform is performed on the buffered video data stream; Performing Z-transformation on the video data stream after the discrete cosine transform; Quantizing the Z-transformed video data stream, and performing run-length encoding on the quantized video data stream; Encoding the video data stream after length-length coding according to the size of entropy, compressing the size of the video data stream. 2. the MJPEG compression implementation method based on FPGA as claimed in claim 1, is characterized in that, said described video data stream after run-length coding is encoded according to the size of entropy and comprises: described video stream data is carried out Fman coding. 3. the FPGA-based MJPEG compression implementation method as claimed in claim 1, is characterized in that, said quantizing the video data stream through Z transformation comprises: Quantize the corresponding video data stream according to the reciprocal of the pre-stored quantization coefficient. 4. the FPGA-based MJPEG compression implementation method according to any one of claims 1-3, is characterized in that, before the described video data stream of cache is carried out discrete cosine transform, also comprises: Judging whether the buffered video data stream is in YCbCr format, if not, converting the video data stream into YCbCr format. 5. FPGA-based MJPEG compression implementation method as claimed in claim 4, is characterized in that, before the described video data stream of cache is carried out discrete cosine transform, also comprises: Separately buffer the YY component and the CbCr component in the video data stream in the YCbCr format. 6. A kind of FPGA, is characterized in that, comprises: Discrete cosine transform module, for carrying out discrete cosine transform to the video data stream of cache; Z transformation module, for performing Z transformation on the video data stream after discrete cosine transformation; Quantization module, used for quantizing the video data stream through Z transformation; A first encoding module, configured to perform run-length encoding on the quantized video data stream; The second encoding module is configured to encode the video data stream after the length-length encoding according to the size of entropy, and compress the size of the video data stream. 7. The FPGA according to claim 6, wherein the second encoding module is further configured to: perform Huffman encoding on the video data stream after length-length encoding. 8. FPGA as claimed in claim 6, is characterized in that, described quantization module is also used for: Quantize the corresponding video data stream according to the reciprocal of the pre-stored quantization coefficient. 9. FPGA as claimed in claim 6-8, is characterized in that, also comprises conversion module, is used for: Before the discrete cosine transform module performs discrete cosine transform on the buffered video data stream, it is judged whether the video data stream is in YCbCr format, and if not, the video data stream is converted into YCbCr format. 10. The FPGA according to claim 9, further comprising a cache module, configured to cache the YY component and the CbCr component in the video data stream of the YCbCr format respectively.