CN106817258A - A kind of method and device chosen and verify PCIE link equalization parameters - Google Patents

Abstract

The present invention relates to the communications field, disclose a kind of method and device chosen and verify PCIE link equalization parameters, method includes choosing the inclined parameter of multigroup drawing of PCIE links, inclined parameter round will be drawn to be written in the corresponding register of PCIE chip receiving terminals, receive the wrong parameter for drawing inclined parameter to be produced during operation, and record in error code register, Selection Center parameter judges the concentration degree of Center Parameter；Device includes that first chooses module, the inclined parameter of multigroup drawing for choosing PCIE links；Writing module, for inclined parameter round will to be drawn to be written in the corresponding register of PCIE chip receiving terminals；Logging modle, for receiving the wrong parameter for drawing inclined parameter to be produced during operation, and records in error code register；Second chooses module, for Selection Center parameter；Judge module, the concentration degree for judging Center Parameter.The effective decay for avoiding signal of the invention, improves the quality of signal transmission.

Description

A method and device for selecting and verifying PCIE link equalization parameters

technical field

The invention relates to the field of communication, in particular to a method and device for selecting and verifying equalization parameters of a PCIE link.

Background technique

The PCIE bus (Peripheral Component Interconnect Express) has been widely used, from the speed of PCIE1.0 2.5Gbps to the speed of PCIE2.0 5Gbps to the speed of PCIE3. In order to achieve reliable transmission on the original cheap PCB and connectors, some new problems must be solved. The biggest problem is the loss of signals. In order to solve this problem, PCIE1.0 and PCIE2.0 use De-emphasis (De-emphasis) technology, that is, the transmitting end of the signal (TX) increases the amplitude of the jump bit when sending the signal, so that it can partially compensate for the attenuation of the high-frequency component by the transmission line, so as to obtain a better Eye diagram; for PCIE3.0, due to the higher signal rate, a more complex 2-stage de-emphasis technique is required. That is to say, in addition to sending the de-emphasis signal by increasing the amplitude of the hopping bit, the first bit of the hopping bit should also be sent with an increased amplitude. This method solves the problem of the transmitting end of the PCIE3.08Gbps transmission rate, but after research, it is found that It is not enough to compensate the high frequency of the signal at the transmitting end. For example, the PCIE3.0 standard stipulates that the signal should be equalized (Equalization) at the receiving end (RX end) of the chip, that is, an equalization is added inside the chip at the receiving end of the chip. Circuit, this equalization circuit can increase the high frequency component in the received signal, so as to further compensate for the loss of the line. During the link training phase, the transmitter and the chip receiver will negotiate an appropriate parameter. Due to the incomplete serial-parallel transceiver equalization algorithm of some chips, if the transmitter and the chip receiver adopt an adaptive method in full accordance with the PCIE3. cause link instability. It is urgent to find a method to effectively select the most suitable and stable equalization parameters of the receiving end of the chip and fix them.

Contents of the invention

The nouns appearing in the present invention are explained below:

PCIE: The English full name is Peripheral Component Interconnect Express, and the Chinese full name is Peripheral Component Interconnect Express. It is the latest bus and interface standard and belongs to high-speed serial point-to-point dual-channel high-bandwidth transmission. The connected devices are assigned exclusive channel bandwidth and are not shared. The bus bandwidth mainly supports functions such as active power management, error reporting, end-to-end reliable transmission, hot swapping, and quality of service.

Adaptive: Adaptive in this article refers to an adaptive filter, which is a digital filter that can automatically adjust its performance according to the input signal for digital signal processing.

Eye diagram: Due to the afterglow effect of the oscilloscope, each symbol waveform obtained by scanning is overlapped together to form an eye diagram, which refers to the observation on the oscilloscope when the performance of the transmission system is estimated and improved (by adjusting) by the experimental method to a graph. The way to observe the eye diagram is: connect an oscilloscope across the output end of the receiving filter, and then adjust the scanning period of the oscilloscope so that the horizontal scanning period of the oscilloscope is synchronized with the period of the received symbol. eye, so it is called "eye diagram".

De-emphasis: The English full name is De-emphasis, which is the process of restoring the aggravated transmitted signal to the original signal form. De-emphasis is relative to pre-emphasis. The pre-emphasized signal needs to be de-emphasized after analysis and processing, that is, the frequency characteristic of -6dB/octave is added to restore the original characteristic.

Equalization: The equalizer at the receiving end of the chip produces characteristics opposite to the channel, which is used to offset the intersymbol interference caused by the time-varying multipath propagation characteristics of the channel. Intersymbol interference is the main obstacle when transmitting high-speed data in mobile wireless communication channels, and equalization is an effective means to deal with intersymbol interference. Due to the randomness and time-varying nature of the mobile fading channel, it is required that the equalizer must be able to track the time-varying characteristics of the mobile communication channel in real time. This equalizer is called an adaptive equalizer.

In view of the above technical problems, the purpose of the present invention is to provide a method and device for selecting and verifying the equalization parameters of the PCIE link, which effectively selects the equalization parameters of the receiving end of the chip.

In order to achieve the above object, the present invention adopts the following technical solutions:

The present invention provides a method for selecting and verifying PCIE link equalization parameters, including:

Select multiple sets of deflection parameters for the PCIE link;

Write the pull bias parameter round into the register corresponding to the receiving end of the PCIE chip;

Receive the error parameters generated during the operation of the pull-off parameters, and record them in the error code register;

Select the center parameter;

Negotiate the PCIE link and judge the concentration of the central parameter. If the concentration is concentrated, the central parameter is valid, and the central parameter is the PCIE link equalization parameter. If the concentration is scattered, the central parameter is reselected.

Further, before selecting multiple sets of pull-off parameters of the PCIE link, it also includes: preset initial parameters of the PCIE link.

Further, before preset the initial parameters of the PCIE link, it also includes: closing the self-adaptive function of the receiving end of the PCIE chip.

Further, selecting multiple sets of pull-off parameters of the PCIE link includes: selecting multiple parameters within a certain range around the initial parameters of the preset PCIE link.

Further, write the pull bias parameter round into the register corresponding to the receiving end of the PCIE chip, specifically including:

Generate different register files for each set of pull-off parameters;

Use an automated script to write the register file rounds into the registers corresponding to the receiving end of the PCIE chip.

Further, the central parameters are selected, specifically including:

Export received error parameters;

Correspond the received error parameters with the biased parameters to form a visual table;

Select multiple parameters from the top, bottom, left, and right of the pull-off parameters within a certain range of the visual table to read the eye diagram, record the eye height, and draw the eye height curve;

Select the parameter in the ascending section of the eye height curve as the central parameter.

A device for selecting and verifying PCIE link equalization parameters, comprising:

The first selection module is used to select multiple sets of pull-off parameters of the PCIE link;

The write module is used to write the pull bias parameter round into the register corresponding to the receiving end of the PCIE chip;

The recording module is used to receive the error parameters generated during the operation of the pull-off parameters, and record them in the error code register;

The second selection module is used to select the central parameter;

The judging module is used for negotiating the PCIE link and judging the concentration of the center parameter. If the concentration is concentrated, the center parameter is valid, and the center parameter is a PCIE link equalization parameter. If the concentration is scattered, the center parameter is reselected. .

Further, it also includes:

The preset module presets the initial parameters of the PCIE link.

Further, it also includes:

The switch module is used to turn off the adaptive function of the receiving end of the PCIE chip.

Further, it also includes:

An error code export module is used to export received error parameters;

Preferably, it also includes: a table generation module, which is used to correspond the received error parameters with the pull-off parameters to form a visual table;

Preferably, it also includes: an eye-height curve drawing module, which is used to select multiple parameters of the pull-out parameters within a certain range in the visual form to read the eye diagram, record the eye height, and draw the eye-height curve.

Compared with the prior art, the beneficial effects of the present invention are as follows:

1. Use automated scripts to write the register file rounds into the registers corresponding to the receiving end of the PCIE chip instead of manually writing the register file rounds into the registers corresponding to the receiving end of the PCIE chip, reducing the labor intensity and risks, ensuring the accuracy of mechanical and repetitive work, and saving labor costs;

2. The effectiveness of the selection of bias parameters is confirmed by the concentration of parameters, which ensures the lowest bit error rate in the PCIE link transmission process, effectively avoids signal attenuation, improves the reliability of link transmission, and improves The quality of signal transmission.

Description of drawings

In order to illustrate the technical solutions in the embodiments of the present invention more clearly, the following will briefly introduce the drawings that need to be used in the description of the embodiments.

Fig. 1 is one of the flow diagrams of a method for selecting and verifying PCIE link equalization parameters in the present invention.

FIG. 2 is the second schematic flow diagram of a method for selecting and verifying PCIE link equalization parameters according to the present invention.

FIG. 3 is a schematic structural diagram of a device for selecting and verifying PCIE link equalization parameters according to the present invention.

detailed description

In order to enable those skilled in the art to better understand the solutions of the present invention, the technical solutions in the embodiments of the present invention are clearly and completely described below in conjunction with the accompanying drawings and specific embodiments. Obviously, the described embodiments are only the embodiments of the present invention. Some examples, but not all examples. Based on the embodiments of the present invention, all other embodiments obtained by persons of ordinary skill in the art without making creative efforts belong to the protection scope of the present invention.

Example 1

A method of selecting and verifying PCIE link equalization parameters of the present invention, as shown in Figure 1, comprises:

S101: Select multiple sets of deflection parameters of the PCIE link;

S102: Write the pulling bias parameter round into the register corresponding to the receiving end of the PCIE chip;

S103: Receive the error parameter generated during the operation of the pull-off parameter, and record it in the error code register;

S104: selecting a central parameter;

S105: Negotiate the PCIE link and judge the concentration of the center parameter. If the concentration is concentrated, the center parameter is valid, and the center parameter is the PCIE link equalization parameter. If the concentration is scattered, return to S104 to reselect the center parameter. .

As a possible implementation, the PCIE link is a PCIE3.0 link, and the PCIE3.0 link needs to select 20 sets of pull-off parameters in advance, and then write the selected 20 sets of pull-off parameters to the PCIE3.0 chip to receive In the register corresponding to the end, receive the error parameters generated during the operation of the pull-off parameters, and record them in the error code register, and then export the received error parameters, and compare the received error parameters with the pull-off parameters that were running at the time the result was obtained. Parameter correspondence, form a visual table, select 2 parameters for the pull-out parameters within the range of +/-6dB in the visual table to read the eye diagram, record the eye height, draw the eye height curve, and select the eye height curve The parameter in the ascending stage is the central parameter. Restart the experimental machine, negotiate the PCIE3.0 link repeatedly, and judge the concentration of the central parameter. If the concentration is concentrated, the central parameter is valid, and the central parameter is PCIE3.0 If the concentration of the link equalization parameters is scattered, it is necessary to re-select the central parameters until an effective central parameter is selected.

Example 2

Another method of selecting and verifying PCIE link equalization parameters of the present invention, as shown in Figure 2, includes:

S201: Turn off the adaptive function of the receiving end of the PCIE chip;

S202: preset multiple sets of initial parameters of the PCIE link;

S203: Select multiple parameters within a certain range around the initial parameters of the PCIE link as biasing parameters;

S204: Generate different register files for each set of offset parameters;

S205: Write the register file into the register corresponding to the receiving end of the PCIE chip in turn by using an automated script;

S206: Receive the error parameter generated during the operation of the pull-off parameter, and record it in the error code register;

S207: Export the received error parameters, and correspond the received error parameters with the biased parameters to form a visual table;

S208: Select a certain number of parameters from the top, bottom, left, and right sides of the deflection parameters within a certain range in the visual table to read the eye diagram, record the eye height, and draw the eye height curve;

S209: Select the parameter in the ascending segment of the eye height graph as the central parameter.

S210: Negotiate the PCIE link and judge the concentration of the center parameter. If the concentration is concentrated, the center parameter is valid, and the center parameter is the PCIE link equalization parameter. If the concentration is scattered, return to S209 to reselect the center parameter. .

As a possible implementation, the PCIE link is a PCIE3.0 link, and the certain range in the steps refers to the range of +/-4dB; first, it is necessary to turn off the self-adaptive function of the receiving end of the PCIE3.0 chip, and preset PCIE3 .0 link’s 20 sets of initial parameters, select the surrounding +/-4dB parameters of these 20 sets of initial parameters as the pull-off parameters, and generate different register files for the obtained 20 sets of pull-off parameters, and use automated scripts to convert the registers The file is written into the register corresponding to the receiving end of the PCIE3.0 chip in turn, and errors will occur during the operation of pulling the biased parameters, and the received error parameters will be recorded in the error register, and then the received error parameters will be exported, and the received The wrong parameters correspond to the set of pull-off parameters that were running when the result was obtained, forming a visual table; for all pull-off parameters within the range of +/-4dB in the visual table, select 3 sets of parameters to read the eye diagram , record the eye height, and draw the eye height curve; select the parameter in the rising section of the eye height curve as the central parameter, restart the experimental machine, and repeatedly negotiate the PCIE3.0 link to judge the concentration of the central parameter. If it is concentrated, the center parameter is valid, and the center parameter is the PCIE3.0 link equalization parameter. If the degree of concentration is scattered, return to S209 to reselect the center parameter.

Example 3

A device for selecting and verifying PCIE link equalization parameters of the present invention, as shown in Figure 3, includes: a first selection module 101, a write module 102, a recording module 103, a second selection module 104, a judgment module 105, a switch module 106 , an error code deriving module 107 , a table generating module 108 , an eye height curve drawing module 109 , and a preset module 110 .

The switch module 106 is used to close the adaptive function of the receiving end of the PCIE chip; the preset module 110 is used to preset the initial parameters of the PCIE link; the first selection module 101 is used to select 20 in a certain range around the initial parameters of the PCIE link The parameter is a pull bias parameter; the write module 102 is used to write the pull bias parameter round into the register corresponding to the receiving end of the PCIE chip; the recording module 103 is used to receive the error parameter that the pull bias parameter generates during operation, and Record in the error code register; Error code derivation module 107 is used for deriving the error parameter that receives; Table generation module 108 is used for corresponding with the error parameter that receives and pulling deviation parameter, forms visual table; Eye height curve drawing module 109: use Select 3 groups of parameters for the pull-off parameters within the range of +/-4dB in the visual table to read the eye diagram, record the eye height, and draw the eye height curve; the second selection module 104 is used to select the eye height curve The parameter in the figure in the ascending section is the central parameter; the judging module 105 is used to judge the concentration of the central parameter, if the concentration is concentrated, then the central parameter is valid, and the central parameter is the PCIE link equalization parameter, if the concentration is scattered, then re- Select the center parameter.

Those skilled in the art can understand that all or part of the steps in the above embodiments can be implemented by hardware, or can be implemented by instructing related hardware through programs. Finally, it should be noted that the above descriptions are only preferred embodiments of the present invention, and are only used to illustrate the technical solution of the present invention, and are not used to limit the protection scope of the present invention. Any modification, equivalent replacement, improvement, etc. made within the spirit and principles of the present invention are included in the protection scope of the present invention.

Claims (10)

1. it is a kind of choose and checking PCIE link equalization parameters method, it is characterised in that including：

Choose the inclined parameter of multigroup drawing of PCIE links；

Inclined parameter round will be drawn to be written in the corresponding register of PCIE chip receiving terminals；

The wrong parameter for drawing inclined parameter to be produced during operation is received, and is recorded in error code register；

Selection Center parameter；

PCIE links are held consultation, the concentration degree of Center Parameter is judged, if concentration degree is concentrated, the Center Parameter effectively, should Center Parameter is PCIE link equalization parameters, if concentration degree is disperseed, Selection Center parameter again.

2. it is according to claim 1 it is a kind of choose and checking PCIE link equalization parameters method, it is characterised in that choosing Before taking the inclined parameter of multigroup drawing of PCIE links, also include：The initial parameter of default PCIE links.

3. it is according to claim 2 it is a kind of choose and checking PCIE link equalization parameters method, it is characterised in that pre- If before the initial parameter of PCIE links, also including：Close the adaptation function of PCIE chip receiving terminals.

4. it is according to claim 2 it is a kind of choose and checking PCIE link equalization parameters method, it is characterised in that choose The inclined parameter of multigroup drawing of PCIE links, including：Choose a range of multiple in periphery of the initial parameter of default PCIE links Parameter.

5. it is according to claim 1 it is a kind of choose and checking PCIE link equalization parameters method, it is characterised in that will draw Inclined parameter round is written in the corresponding register of PCIE chip receiving terminals, is specifically included：

Every group of inclined parameter of drawing is generated into different register files；

Register file round is written in the corresponding register of PCIE chip receiving terminals using the mode of automatized script.

6. it is according to claim 1 it is a kind of choose and checking PCIE link equalization parameters method, it is characterised in that choose Center Parameter, specifically includes：

Derive the wrong parameter for receiving；

The wrong parameter that will be received is corresponding with inclined parameter is drawn, and forms visual form；

The multiple parameters of selection up and down for drawing inclined parameter a range of to visual form carry out eye pattern reading, record eye Height, draws eye curve map high；

Choose eye curve map high and be in parameter centered on the parameter of ascent stage.

7. it is a kind of choose and checking PCIE link equalization parameters device, it is characterised in that including：

First chooses module, the inclined parameter of multigroup drawing for choosing PCIE links；

Writing module, for inclined parameter round will to be drawn to be written in the corresponding register of PCIE chip receiving terminals；

Logging modle, for receiving the wrong parameter for drawing inclined parameter to be produced during operation, and records in error code register In；

Second chooses module, for Selection Center parameter；

Judge module, for being held consultation to PCIE links, judges the concentration degree of Center Parameter, if concentration degree is concentrated, in this Effectively, the Center Parameter is PCIE link equalization parameters to heart parameter, if concentration degree is disperseed, Selection Center parameter again.

8. it is according to claim 7 it is a kind of choose and checking PCIE link equalization parameters device, it is characterised in that also wrap Include：

Presetting module, presets the initial parameter of PCIE links.

9. it is according to claim 7 it is a kind of choose and checking PCIE link equalization parameters device, it is characterised in that also wrap Include：

Switch module, the adaptation function for closing PCIE chip receiving terminals.

10. it is according to claim 7 it is a kind of choose and checking PCIE link equalization parameters device, it is characterised in that also Including：

Error code export module, for deriving the wrong parameter for receiving；

Preferably, also include：Table generation module, the wrong parameter for that will receive is corresponding with inclined parameter is drawn, and forms visual table Lattice；

Preferably, also include：Eye Drawing of Curve module high, for drawing the upper and lower of inclined parameter to a range of in visual form Left and right selection multiple parameters carry out eye pattern reading, and record eye is high, draws eye curve map high.